Patents Assigned to dSpace GmbH
  • Publication number: 20240126608
    Abstract: A validation system for executing a method for prioritizing validation tasks, wherein the validation tasks are carried out by execution units of the validation system, wherein the execution units are divided into at least two groups and each group is assigned capabilities by the validation system and/or by a user of the validation system, so that execution units of a respective group have the capabilities of the group and, when the validation tasks are executed automatically by the validation system and/or by the user, a requirement of the respective validation task for the capability of the execution units and a priority for execution are specified and, taking into account the priorities and the capable execution units, an execution sequence is determined and the validation task is executed according to the execution sequence by the capable execution units.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 18, 2024
    Applicant: dSPACE GmbH
    Inventors: Thomas MISCH, Simon GORDON
  • Publication number: 20240121352
    Abstract: A recording device for a recording of a serialized image data stream from a sensor device. The recording device comprises a deserializer for deserializing the image data stream. To configure the first deserializer, the recording device comprises a configuration device, which records a configuration data stream transmitted by a receiving device for the purpose of configuring a serializer arranged in the sensor device and derives a configuration of the deserializer of the recording device by an analysis of the recording of the configuration data. In an example, the derivation takes place by an abstraction of the configuration of the serializer into a functionality of the serializer, a derivation of a functionality of the first deserializer from the functionality of the first serializer, and a concretization of the functionality of the first deserializer into a configuration of the first deserializer.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: dSPACE GmbH
    Inventors: Marco SPILKER, Gregor SIEVERS, Christian Lindemann
  • Publication number: 20240103508
    Abstract: A device for testing an electronic control unit with a hardware-in-the-loop simulator to simulate at least one sensor signal and equipped with a two-wire cable via which the sensor signal is outputted, and with a switchover device which is connected to the hardware-in-the-loop simulator via the two-wire cable, so that the sensor signal is receivable from the switchover device. The two-wire cable in the switchover device is routed to a two-pole interface of the switchover device to which the electronic control unit can be connected in order to receive the sensor signal, and the switchover device has two voltage sources, each of which is assigned to a wire of the two-wire cable and can be connected to the respective wire via a controllable switch. In this way, it is possible to continue to supply the sensor with electrical energy via two switchable voltage sources during diagnostics, thus avoiding diagnostic errors.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Applicant: dSPACE GmbH
    Inventors: Cedrik MUNK, Christian DIERKES, Andre KETHLER
  • Publication number: 20240103855
    Abstract: A method for testing at least one electronic control device as a virtual control device on a simulator, which includes at least one simulator computing unit. The electronic control device has a hardware configuration with at least one computing unit (and an external interface for exchanging data. A software configuration is assigned to the hardware configuration. The electronic control device is mapped to the virtual control device in that the internal functionality of the software configuration of the electronic control device is taken over as the internal functionality of a software configuration of the virtual control device. External interface functionality of the electronic control device is replaced by a data transfer functionality of the software configuration of the simulator computing unit. The software configuration of the virtual control device being translated into executable code for the simulator computing unit and executed on the simulator.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 28, 2024
    Applicant: dSPACE GmbH
    Inventors: Felix ENGEL, Andre HILDEBRANDT
  • Patent number: 11940556
    Abstract: A testing device for testing a distance sensor includes: a receiver for receiving an electromagnetic free-space wave as a receive signal; an analog-to-digital converter configured to, in a simulation mode, convert the receive signal into a sampled signal; a signal-processing unit configured to: delay the sampled signal or a modulated sampled signal to form a delayed sampled signal or a modulated delayed sampled signal; and modulate, upon the sampled signal or upon the delayed sampled signal, a predeterminable Doppler signature as a characteristic motion profile of a reflecting object to be simulated to form the modulated sampled signal or the modulated delayed sample signal; a digital-to-analog converter configured to convert the modulated or the modulated delayed sampled signal into a simulated reflected signal; and a transmitter configured to radiate the simulated reflected signal or a simulated reflected signal derived from the simulated reflected signal as an output signal.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: March 26, 2024
    Assignee: DSPACE GMBH
    Inventors: Tim Fisch, Jeffrey Paul, Jonathan Watkins
  • Publication number: 20240094294
    Abstract: A failure insertion unit for connection to an object under test connected to a bus or network interface, wherein the object under test can be subjected by means of the failure insertion unit to fault voltages that are greater than the maximum voltage for which the bus or network interface is designed, with a fuse circuit which protects a bus or network interface connected to the failure insertion unit from voltages that are greater than the maximum voltage for which the bus or network interface is designed. This provides a way to be able to use failure insertion units even in systems that work with buses with high bandwidths without the risk of damaging bus or network interfaces due to overvoltages.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 21, 2024
    Applicant: dSPACE GmbH
    Inventors: Bjoern MUELLER, Tobias Schaeffer
  • Patent number: 11935253
    Abstract: A method for automatically splitting visual sensor data comprising consecutive images, the method being executed by at least one processor of a host computer, the method comprising: a) assigning a scene number to each image, wherein a scene comprises a plurality of images taken in a single environment, wherein assigning a scene number to each image is performed based on a comparison between consecutive images; b) determining an accumulated effort for the images in each scene, wherein the accumulated effort is determined based on the number of objects in the images of the scene, wherein the number of objects is determined using one or more neural networks for object detection; and c) creating packages of images, wherein the images with the same scene number are assigned to the same package unless the accumulated effort of the images in the package surpasses a package threshold.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 19, 2024
    Assignee: DSPACE GMBH
    Inventor: Tim Raedsch
  • Publication number: 20240062592
    Abstract: A method and system for performing a virtual test of a device for the at least partial autonomous guidance of a motor vehicle, comprising performing the virtual test by an algorithm using the at least one parameter set of driving situation parameters, wherein the virtual test performed by the algorithm simulates the at least one parameter set of driving situation parameters; and, if a predetermined condition and/or a condition determined by the algorithm is fulfilled, changing the at least one first parameter, detected by the at least one vehicle sensor and/or a third parameter relating to a vehicle actuator during a runtime of the virtual test.
    Type: Application
    Filed: June 30, 2023
    Publication date: February 22, 2024
    Applicant: dSPACE GmbH
    Inventors: Thomas MISCH, Matthias WERTH
  • Publication number: 20240053965
    Abstract: A method for management of components of graphical diagrams in a platform for processing signals from multiple sensors, at least one component can be present in a first mode, for example Rapid Control Prototyping, and can be absent in a second mode, for example source code generation. Moreover, components that are used only by the absent component can also be deleted in the second mode. The information about the components can be stored in a configuration profile.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 15, 2024
    Applicant: dSPACE GmbH
    Inventor: Joerg NIERE
  • Publication number: 20240037022
    Abstract: A method for the analysis of test procedures of a device and/or function for at least partially autonomous guidance of a motor vehicle, comprising aggregating of the first characteristic value calculated for each of the plurality of test cases to form a second characteristic value representing a meta-test case; and evaluating the second characteristic value using a specified second criterion and the logical linking of the first evaluation results of the plurality of test cases to a second evaluation result of the meta-test case. A system for the analysis of test procedures of a device and/or function for at least partially autonomous guidance of a motor vehicle is also provided.
    Type: Application
    Filed: June 30, 2023
    Publication date: February 1, 2024
    Applicant: dSPACE GmbH
    Inventors: Robert TIMMERMANN, Jan Hendrik HAMMER, Christian GOERINGER
  • Publication number: 20240028457
    Abstract: In an FPGA, errors within an FPGA are detected by: providing at least one computation operation in the configurable logic block, a parity-invariant additional result being added, the parity-invariant additional result being provided by picking off an XOR bit of an XOR operation of the full adder, the XOR operation comprising at least two input signals; forming the parity of the XOR operation of the input signals with the aid of the following formula, and providing a parity signal: Parity(XOR(x1,x2)); calculating the XOR operation of the carried parities (Parity(x1), Parity(x2)) of the input signals with the aid of the device for checking the parity, using the following formula: XOR(Parity(x1), Parity(x2)); checking the parity, using a check of the truth of the following formula: XOR(Parity(x1), Parity(x2))==Parity(XOR(x1,x2); detecting an error in routes/calculations within the FPGA in the presence of an untrue statement of the formula of the preceding step.
    Type: Application
    Filed: July 21, 2023
    Publication date: January 25, 2024
    Applicant: dSPACE GmbH
    Inventors: Heiko KALTE, Dominik LUBELEY
  • Publication number: 20240011871
    Abstract: A computer-implemented method for configuring a virtual test system for testing vehicle functions of a motor vehicle, wherein for each of the plurality of input ports of the artifact under test, an assignment of the output port having the highest confidence value of the at least one other artifact under test depending on a first condition, a compiling of a list of output ports having the highest confidence values depending on a second condition, or a non-assignment of an output port depending on a third condition for configuring a connection of the input ports of the artifact under test to appropriate output ports of the at least one other artifact under test is made. A computer-implemented method is also provided for providing a trained machine learning algorithm for configuring a virtual test system for testing vehicle functions of a motor vehicle.
    Type: Application
    Filed: July 6, 2023
    Publication date: January 11, 2024
    Applicant: dSPACE GmbH
    Inventor: Andre HILDEBRANDT
  • Patent number: 11860301
    Abstract: A testing device for testing a distance sensor that operates using electromagnetic waves includes: a receiving element for receiving an electromagnetic free-space wave as a receive signal (SRX); and a radiating element for radiating an electromagnetic output signal (STX). In a test mode, a test signal unit generates a test signal (Stest), and the radiating element is configured to radiate the test signal (Stest) or a test signal (S?test) derived from the test signal (Stest) as the electromagnetic output signal (STX). In the test mode, an analysis unit is configured to analyze the receive signal (SRX) or the derived receive signal (S?RX) in terms of its phase angle (Phi) and/or amplitude (A) and store a determined value of phase angle (Phi) and/or amplitude (A) synchronously with the radiation of the test signal (Stest) or of the derived test signal (S?test) as the electromagnetic output signal (STX).
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 2, 2024
    Assignee: DSPACE GMBH
    Inventor: Jeffrey Paul
  • Publication number: 20230418324
    Abstract: A method for programming an FPGA, wherein a library with elementary operations and a respective latency table for each of the elementary operations of the library are provided. a data path is defined. The latencies are recorded for a multiplicity of clock rates that are different from one another and these latencies are added for every clock rate so that a total latency for the data path results for this multiplicity of different clock rates. The ratio between the lowest total latency and the total latency at a respective clock rate is determined. A utilization of the FPGA for each clock rate is identified. The ratio between the lowest utilization of the FPGA and the utilization of the FPGA at a respective clock rate is determined. A quality factor for each clock rate while taking into account the total latency and the utilization of the FPGA is determined.
    Type: Application
    Filed: June 14, 2023
    Publication date: December 28, 2023
    Applicant: dSPACE GmbH
    Inventors: Heiko KALTE, Dominik LUBELEY
  • Publication number: 20230415755
    Abstract: A computer-implemented method and system for generating a virtual environment for a vehicle for testing highly automated driving functions of a motor vehicle. The method comprises projecting the pixel-based classified camera image data onto the pre-acquired LiDAR point cloud data, wherein each point of the LiDAR point cloud, superimposed by classified pixels of the camera image data, in particular having the same image coordinates, is assigned an identical class and an instance segmentation of the classified LiDAR point cloud data for determining at least one real object comprised by a class. A computer program and a computer-readable data carrier are also provided.
    Type: Application
    Filed: June 21, 2023
    Publication date: December 28, 2023
    Applicant: dSPACE GmbH
    Inventors: Leon BOHNMANN, Frederik VIEZENS
  • Publication number: 20230419009
    Abstract: A method for simulating an electrical circuit via a real-time platform on the basis of a behavioral model in nodal form with an impedance matrix M or a topology-oriented behavioral model in state space with the matrices A, B, C, and D, and at least one impedance matrix M describing a circuit or at least one set for the matrices A, B, C, and D describing the circuit is stored on the real-time platform for this purpose. Thus, a more efficient sequence of operations is achieved as a result.
    Type: Application
    Filed: June 21, 2023
    Publication date: December 28, 2023
    Applicant: dSPACE GmbH
    Inventor: Johann MATIX
  • Publication number: 20230418752
    Abstract: In an FPGA, a memory of the FPGA is to be effectively increased. This is achieved by a computer-implemented method for implementing a model-adaptive cache memory having a model state-dependent memory look-ahead on the FPGA.
    Type: Application
    Filed: June 22, 2023
    Publication date: December 28, 2023
    Applicant: dSPACE GmbH
    Inventors: Heiko KALTE, Dominik LUBELEY
  • Publication number: 20230408648
    Abstract: A computer-implemented method and system for determining an arrangement of components of an over-the-air test chamber, comprising a determination of position data of an optimized arrangement of the components in the over-the-air test chamber in relation to each other and/or a grouping of position data of an optimized arrangement in the over-the-air test chamber, and an output of a second data set comprising the position of the optimized arrangement of the DUT, in particular the radar sensor, the reflector and the target simulator or the transmitting/receiving device of the target simulator in the over-the-air test chamber, and/or the grouping of the optimized arrangement in the over-the-air test chamber.
    Type: Application
    Filed: June 20, 2023
    Publication date: December 21, 2023
    Applicant: dSPACE GmbH
    Inventors: Dirk BERNECK, Andreas HIMMLER, Fabian HAPP
  • Patent number: 11846723
    Abstract: A method for calibrating a target simulator for an active environment detection system includes: calibrating a complete signal path comprising a first signal path and a second signal path by determining a first deviation of a first value of at least one signal parameter from a first reference value of the at least one signal parameter; calibrating one of the first signal path and the second signal path by determining a second deviation of a second value of the at least one signal parameter from a second reference value of the at least one signal parameter; and calibrating the other of the first signal path and the second signal path by offsetting of the first deviation with the second deviation.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: December 19, 2023
    Assignee: DSPACE GMBH
    Inventors: Tim Fisch, Albrecht Lohoefener, Jeffrey Paul
  • Publication number: 20230401145
    Abstract: A computer-implemented method for the use of stored specification parts of at least one test and/or simulation, comprising the steps: providing the at least one test to be specified and/or the one simulation for testing driving functions of a vehicle and the at least one test and/or the at least one simulation are determined by at least one parameter value and/or setting value; and performing a specification of the at least one test and/or the at least one simulation, wherein the specification comprises at least one specification part, wherein the parameter values and/or the setting values are selected and concrete parameter values and/or setting values are assigned by the specification for the test and/or the simulation, wherein the parameter values and/or setting values are selected manually or automatically, and wherein already stored specification parts are selected manually and/or automatically and integrated into the specification.
    Type: Application
    Filed: June 13, 2023
    Publication date: December 14, 2023
    Applicant: dSPACE GmbH
    Inventor: Dirk STICHLING