Patents Assigned to dSpace GmbH
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Patent number: 11935253Abstract: A method for automatically splitting visual sensor data comprising consecutive images, the method being executed by at least one processor of a host computer, the method comprising: a) assigning a scene number to each image, wherein a scene comprises a plurality of images taken in a single environment, wherein assigning a scene number to each image is performed based on a comparison between consecutive images; b) determining an accumulated effort for the images in each scene, wherein the accumulated effort is determined based on the number of objects in the images of the scene, wherein the number of objects is determined using one or more neural networks for object detection; and c) creating packages of images, wherein the images with the same scene number are assigned to the same package unless the accumulated effort of the images in the package surpasses a package threshold.Type: GrantFiled: August 31, 2021Date of Patent: March 19, 2024Assignee: DSPACE GMBHInventor: Tim Raedsch
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Publication number: 20240062592Abstract: A method and system for performing a virtual test of a device for the at least partial autonomous guidance of a motor vehicle, comprising performing the virtual test by an algorithm using the at least one parameter set of driving situation parameters, wherein the virtual test performed by the algorithm simulates the at least one parameter set of driving situation parameters; and, if a predetermined condition and/or a condition determined by the algorithm is fulfilled, changing the at least one first parameter, detected by the at least one vehicle sensor and/or a third parameter relating to a vehicle actuator during a runtime of the virtual test.Type: ApplicationFiled: June 30, 2023Publication date: February 22, 2024Applicant: dSPACE GmbHInventors: Thomas MISCH, Matthias WERTH
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Publication number: 20240053965Abstract: A method for management of components of graphical diagrams in a platform for processing signals from multiple sensors, at least one component can be present in a first mode, for example Rapid Control Prototyping, and can be absent in a second mode, for example source code generation. Moreover, components that are used only by the absent component can also be deleted in the second mode. The information about the components can be stored in a configuration profile.Type: ApplicationFiled: August 11, 2023Publication date: February 15, 2024Applicant: dSPACE GmbHInventor: Joerg NIERE
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Publication number: 20240037022Abstract: A method for the analysis of test procedures of a device and/or function for at least partially autonomous guidance of a motor vehicle, comprising aggregating of the first characteristic value calculated for each of the plurality of test cases to form a second characteristic value representing a meta-test case; and evaluating the second characteristic value using a specified second criterion and the logical linking of the first evaluation results of the plurality of test cases to a second evaluation result of the meta-test case. A system for the analysis of test procedures of a device and/or function for at least partially autonomous guidance of a motor vehicle is also provided.Type: ApplicationFiled: June 30, 2023Publication date: February 1, 2024Applicant: dSPACE GmbHInventors: Robert TIMMERMANN, Jan Hendrik HAMMER, Christian GOERINGER
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Publication number: 20240028457Abstract: In an FPGA, errors within an FPGA are detected by: providing at least one computation operation in the configurable logic block, a parity-invariant additional result being added, the parity-invariant additional result being provided by picking off an XOR bit of an XOR operation of the full adder, the XOR operation comprising at least two input signals; forming the parity of the XOR operation of the input signals with the aid of the following formula, and providing a parity signal: Parity(XOR(x1,x2)); calculating the XOR operation of the carried parities (Parity(x1), Parity(x2)) of the input signals with the aid of the device for checking the parity, using the following formula: XOR(Parity(x1), Parity(x2)); checking the parity, using a check of the truth of the following formula: XOR(Parity(x1), Parity(x2))==Parity(XOR(x1,x2); detecting an error in routes/calculations within the FPGA in the presence of an untrue statement of the formula of the preceding step.Type: ApplicationFiled: July 21, 2023Publication date: January 25, 2024Applicant: dSPACE GmbHInventors: Heiko KALTE, Dominik LUBELEY
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Publication number: 20240011871Abstract: A computer-implemented method for configuring a virtual test system for testing vehicle functions of a motor vehicle, wherein for each of the plurality of input ports of the artifact under test, an assignment of the output port having the highest confidence value of the at least one other artifact under test depending on a first condition, a compiling of a list of output ports having the highest confidence values depending on a second condition, or a non-assignment of an output port depending on a third condition for configuring a connection of the input ports of the artifact under test to appropriate output ports of the at least one other artifact under test is made. A computer-implemented method is also provided for providing a trained machine learning algorithm for configuring a virtual test system for testing vehicle functions of a motor vehicle.Type: ApplicationFiled: July 6, 2023Publication date: January 11, 2024Applicant: dSPACE GmbHInventor: Andre HILDEBRANDT
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Patent number: 11860301Abstract: A testing device for testing a distance sensor that operates using electromagnetic waves includes: a receiving element for receiving an electromagnetic free-space wave as a receive signal (SRX); and a radiating element for radiating an electromagnetic output signal (STX). In a test mode, a test signal unit generates a test signal (Stest), and the radiating element is configured to radiate the test signal (Stest) or a test signal (S?test) derived from the test signal (Stest) as the electromagnetic output signal (STX). In the test mode, an analysis unit is configured to analyze the receive signal (SRX) or the derived receive signal (S?RX) in terms of its phase angle (Phi) and/or amplitude (A) and store a determined value of phase angle (Phi) and/or amplitude (A) synchronously with the radiation of the test signal (Stest) or of the derived test signal (S?test) as the electromagnetic output signal (STX).Type: GrantFiled: June 22, 2021Date of Patent: January 2, 2024Assignee: DSPACE GMBHInventor: Jeffrey Paul
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Publication number: 20230415755Abstract: A computer-implemented method and system for generating a virtual environment for a vehicle for testing highly automated driving functions of a motor vehicle. The method comprises projecting the pixel-based classified camera image data onto the pre-acquired LiDAR point cloud data, wherein each point of the LiDAR point cloud, superimposed by classified pixels of the camera image data, in particular having the same image coordinates, is assigned an identical class and an instance segmentation of the classified LiDAR point cloud data for determining at least one real object comprised by a class. A computer program and a computer-readable data carrier are also provided.Type: ApplicationFiled: June 21, 2023Publication date: December 28, 2023Applicant: dSPACE GmbHInventors: Leon BOHNMANN, Frederik VIEZENS
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Publication number: 20230418752Abstract: In an FPGA, a memory of the FPGA is to be effectively increased. This is achieved by a computer-implemented method for implementing a model-adaptive cache memory having a model state-dependent memory look-ahead on the FPGA.Type: ApplicationFiled: June 22, 2023Publication date: December 28, 2023Applicant: dSPACE GmbHInventors: Heiko KALTE, Dominik LUBELEY
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Publication number: 20230418324Abstract: A method for programming an FPGA, wherein a library with elementary operations and a respective latency table for each of the elementary operations of the library are provided. a data path is defined. The latencies are recorded for a multiplicity of clock rates that are different from one another and these latencies are added for every clock rate so that a total latency for the data path results for this multiplicity of different clock rates. The ratio between the lowest total latency and the total latency at a respective clock rate is determined. A utilization of the FPGA for each clock rate is identified. The ratio between the lowest utilization of the FPGA and the utilization of the FPGA at a respective clock rate is determined. A quality factor for each clock rate while taking into account the total latency and the utilization of the FPGA is determined.Type: ApplicationFiled: June 14, 2023Publication date: December 28, 2023Applicant: dSPACE GmbHInventors: Heiko KALTE, Dominik LUBELEY
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Publication number: 20230419009Abstract: A method for simulating an electrical circuit via a real-time platform on the basis of a behavioral model in nodal form with an impedance matrix M or a topology-oriented behavioral model in state space with the matrices A, B, C, and D, and at least one impedance matrix M describing a circuit or at least one set for the matrices A, B, C, and D describing the circuit is stored on the real-time platform for this purpose. Thus, a more efficient sequence of operations is achieved as a result.Type: ApplicationFiled: June 21, 2023Publication date: December 28, 2023Applicant: dSPACE GmbHInventor: Johann MATIX
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Publication number: 20230408648Abstract: A computer-implemented method and system for determining an arrangement of components of an over-the-air test chamber, comprising a determination of position data of an optimized arrangement of the components in the over-the-air test chamber in relation to each other and/or a grouping of position data of an optimized arrangement in the over-the-air test chamber, and an output of a second data set comprising the position of the optimized arrangement of the DUT, in particular the radar sensor, the reflector and the target simulator or the transmitting/receiving device of the target simulator in the over-the-air test chamber, and/or the grouping of the optimized arrangement in the over-the-air test chamber.Type: ApplicationFiled: June 20, 2023Publication date: December 21, 2023Applicant: dSPACE GmbHInventors: Dirk BERNECK, Andreas HIMMLER, Fabian HAPP
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Patent number: 11846723Abstract: A method for calibrating a target simulator for an active environment detection system includes: calibrating a complete signal path comprising a first signal path and a second signal path by determining a first deviation of a first value of at least one signal parameter from a first reference value of the at least one signal parameter; calibrating one of the first signal path and the second signal path by determining a second deviation of a second value of the at least one signal parameter from a second reference value of the at least one signal parameter; and calibrating the other of the first signal path and the second signal path by offsetting of the first deviation with the second deviation.Type: GrantFiled: November 12, 2020Date of Patent: December 19, 2023Assignee: DSPACE GMBHInventors: Tim Fisch, Albrecht Lohoefener, Jeffrey Paul
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Publication number: 20230401145Abstract: A computer-implemented method for the use of stored specification parts of at least one test and/or simulation, comprising the steps: providing the at least one test to be specified and/or the one simulation for testing driving functions of a vehicle and the at least one test and/or the at least one simulation are determined by at least one parameter value and/or setting value; and performing a specification of the at least one test and/or the at least one simulation, wherein the specification comprises at least one specification part, wherein the parameter values and/or the setting values are selected and concrete parameter values and/or setting values are assigned by the specification for the test and/or the simulation, wherein the parameter values and/or setting values are selected manually or automatically, and wherein already stored specification parts are selected manually and/or automatically and integrated into the specification.Type: ApplicationFiled: June 13, 2023Publication date: December 14, 2023Applicant: dSPACE GmbHInventor: Dirk STICHLING
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Patent number: 11843514Abstract: A computer-implemented method for restructuring a predefined distributed real-time simulation network, wherein the simulation network has a plurality of network nodes and a plurality of data connections, wherein each network node has at least one data connection interface for connecting a data connection, wherein the network nodes are at least partially in communication via the data connections, and wherein during operation of the simulation network a simulation application is executed on at least one network node. The method permits a structure for the real-time simulation network to be automatically found in which the critical communication connections are reduced and avoided as much as possible by determining the topology of the simulation network so that topology information concerning the network nodes and the data connections between the network nodes is available by determining expected values for node data rates or node latencies for the network nodes of the simulation network.Type: GrantFiled: November 3, 2021Date of Patent: December 12, 2023Assignee: dSPACE GmbHInventors: Heiko Kalte, Dominik Lubeley
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Publication number: 20230394742Abstract: A method for parameterizing a program logic for image synthesis to adapt images synthesized by the program logic to a camera model. A digital photograph of a three-dimensional scene is processed by a neural network and an abstract first representation of the photograph is extracted from a selection of layers of the neural network. The program logic is parameterized according to an initial set of output parameters in order to synthesize an image that recreates the photograph from a three-dimensional model of the scene. The synthetic image is processed by the same neural network, an abstract second representation of the synthetic image is extracted from the same selection of layers, and a distance between the synthetic image and the photograph is calculated based on a metric that takes into account the first representation and the second representation.Type: ApplicationFiled: August 21, 2023Publication date: December 7, 2023Applicant: dSPACE GmbHInventors: Andre SKUSA, Nikolas HEMION, Sven BURDORF, Daniel HASENKLEVER
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Patent number: 11829129Abstract: A method for generating an executable simulation program and simulating control device communication between a control device to be tested and at least one further control device includes: transferring a description of transmit and receive interfaces into a database; identifying interfaces of the control device to be tested; generating interfaces of the at least one further control device for each interface of the control device to be tested; storing the generated interface elements in the database; providing a configuration for the simulation of the control device communication between the control device to be tested and the at least one further control device; generating the executable simulation program; and simulating the control device communication.Type: GrantFiled: March 8, 2021Date of Patent: November 28, 2023Assignee: DSPACE GMBHInventor: Matthias Gries
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Patent number: 11822466Abstract: A method provides an intervention point for manipulating a variable of a runtime environment for testing a control-device program component to be tested in a test environment. Software of the control-device program component, in accordance with the AUTOSAR standard, is divided into three layers, wherein the three layers include a layer of program components, a layer of the runtime environment, and a layer of device-related basic programs. The layer of the program components has a test scenario program component for providing input values and a program component for receiving output values and displaying the test result. The method includes: providing the control-device program component to be tested with interfaces that are each defined in accordance with the AUTOSAR standard; and creating an executable program of the control-device program component to be tested and of the test scenario program component.Type: GrantFiled: December 21, 2021Date of Patent: November 21, 2023Assignee: DSPACE GMBHInventor: Christian Becker
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Publication number: 20230367561Abstract: A method for generating source code from one or more blocks of a block diagram, wherein received changes to model elements of the block diagram are stored. The generation of source code includes transforming the block diagram into an intermediate representation, successively optimizing the intermediate representation, and translating the optimized intermediate representation into source code. In this case, at least one plausibility rule is checked for changed model elements. If the plausibility rule is not satisfied, a warning is issued. A user can check mark the change to avoid seeing warnings repeatedly. Furthermore, the invention relates to a method for configuring a control unit, a computer program product and a computer system.Type: ApplicationFiled: May 12, 2023Publication date: November 16, 2023Applicant: dSPACE GmbHInventor: Michael MAIR
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Publication number: 20230359785Abstract: A computer-implemented method for simulating an electric drive by means of at least one processing unit of a hardware-in-the-loop simulator, A model of the electric drive ha an inverter powered by a DC voltage source with at least one half-bridge having at least two semiconductor switches and an electric motor having an electrical winding resistance and a winding inductance. A center tap having a center tap voltage of the half-bridge is connected by means of a supply line having a supply line current to a motor connection of the electric motor. By actuating the semiconductor switches, the motor connection can be connected either to an electrical potential of the DC voltage source with an open semiconductor switch in a conductive state of the inverter or the motor connection can be unlocked in terms of potential in an open state of the inverter with at least two semiconductor switches open.Type: ApplicationFiled: May 5, 2023Publication date: November 9, 2023Applicant: dSPACE GmbHInventor: Nils HOLTHAUS