Abstract: The invention relates to a measuring circuit comprising a control block for controlling said circuit, a time base for providing a clock signal (fclk) in order to time said circuit, a sensor block which is designed to provide an output signal, said measuring circuit comprising in addition a first counting block which is timed to the clock frequency and a second counting block which is timed by the frequency of the output signal of the sensor block.

Abstract: The present invention concerns an electronic circuit comprising a control signal processing circuit with a control signal input and a control signal output circuit, the processing circuit being arranged to process a control signal applied to the control signal input, and to operate in at least one of a first power mode and a second power mode, the second power mode having a lower power consumption than the first power mode. The electronic circuit further comprises a control signal processing circuit bypass means for providing, when the processing circuit is in the second power mode, a bypass connection for conveying the control signal from the control signal input to the control signal output circuit, thereby bypassing the processing circuit.

Abstract: The invention concerns a method and device for processing UHF signals for an EPC communication. The method includes the steps of picking up UHF signals by an antenna of the device for processing UHF signals, creating an envelope signal from the UHF signals picked by the antenna in a demodulator, processing the envelope signal and decoding critical TRcal symbol and data in a logic unit of the device. Furthermore, the method includes the steps of interpreting the critical TRcal symbol and data, storing the interpreted data, encoding transmit data, modulating by encoded data in a modulator, and clocking the steps as above by a local oscillator. In the step of processing the envelope signal, the critical TRcal symbol is processed by a high frequency clock and data are processed by a low frequency clock.

Abstract: The present invention concerns a receiver unit comprising a first and a second input terminal to which are connected an antenna, a communication stage adapted to demodulate and/or modulate an incoming signal in said communication stage and a power stage comprising an AC/DC voltage converter for powering the rest of the circuit.

Abstract: The dual frequency RF identification device comprises an HF antenna for receiving an HF electromagnetic field, an HF interface, an UHF antenna for receiving an UHF electromagnetic field, an UHF interface, non-volatile memory means formed by a first non-volatile memory and a second non-volatile memory. The first non-volatile memory can be in an active state without the second non-volatile memory being powered and consumes substantially more power than this second non-volatile memory. The first non-volatile memory comprises all data needed for a device configuration allowing this device to carry out at least a communication mode of an UHF protocol, this communication mode having access to the first non-volatile memory but not to the second non-volatile memory. The first non-volatile memory further comprises all attributes needed for a configuration of this communication mode.

Abstract: The invention concerns a multi-frequency transponder for communicating at a first frequency according to a first communication protocol and at a second different frequency according to a second communication protocol. The transponder comprises a first physical memory for storing a first data of the first communication protocol; a second physical memory for storing a second data, different from the first data, of the second communication protocol; and a logic unit for accessing the first and second physical memories. The logic unit comprises a first control unit for handling communications according to the first protocol, and a second control unit for handling communications according to the second protocol. The transponder comprises a mapping memory to store a logical memory map of the first or second physical memories. The logical memory map comprises mapping information for the first or second control unit to access data items in first and second physical memories.

Abstract: This concerns a Bluetooth Low Energy (BLE) device, or system, or method of operating a BLE device and a respective computer program. The BLE device comprises a transceiver to broadcast the at least one advertising packet, a processor connected to the transceiver to generate the advertising packet and/or to trigger broadcasting thereof according to a broadcasting schedule. The device further comprises a verification element connected to the processor and being capable of ascertaining if a predefined condition is met, at least one of the verification element and the processor is capable of modifying the broadcasting schedule based on the predefined condition's ascertainment.

Abstract: The method is for measuring a physical parameter via an electronic circuit connected to a two differential capacitor sensor having two fixed electrodes and a common moving electrode. The circuit supplies first and second digital measuring signals. Each measuring cycle consists on biasing fixed electrodes by a first biasing and a second biasing reverse of the first biasing, alternated with biasing the electrodes by the measuring voltage based on first and second digital signals. Each conversion starts by a small step value added to or subtracted from each digital signal in each cycle. If the successive identical amplifier output states counted or counted down by a counter is higher than a threshold, a large step value is added to or subtracted from the digital signals in each cycle. Re-adaptation to the small step value occurs when a sign change is detected in the counter, until the conversion end.

Abstract: The Dual frequency HF-UHF identification device comprises a RFID integrated circuit with a power supply having a HF part, formed by a HF rectifier connected to a HF antenna, and a UHF part formed by a UHF rectifier connected to a UHF antenna. The RFID integrated circuit comprises a storage capacitor common to the HF and UHF parts of the power supply. The HF rectifier output and the UHF rectifier output are both continuously connected to the supply terminal of the common storage capacitor. Further, the supply terminal of the common storage capacitor is connected, on the one hand, to the output of the HF rectifier through a diode arranged so as to block a current from said supply terminal to the HF rectifier output and, on the other hand, directly to the output of the UHF rectifier formed by a charge pump.

Abstract: The electronic measurement circuit comprises a measurement sensor with two differential mounted capacitors each comprising a fixed electrode, and a common electrode arranged to move relative to the fixed capacitor electrode to alter the capacitive value when the physical parameter is measured.

Abstract: The present invention relates to a method, to a computer program and to a system to establish wireless communication between at least two Bluetooth Low Energy (BLE) devices the method comprising the steps of: switching a first BLE device (20) into a scanning mode (SM), switching a second BLE device (30) into an advertising mode (AM), and broadcasting a first advertising packet (31) from the second BLE device, switching the second BLE device (30) into the scanning mode (SM), receiving the first advertising packet (31) by first BLE device (20), and switching the first BLE device (20) into the advertising mode (AM), and broadcasting a second advertising packet (21) from the first BLE device (30).

Abstract: The protocol management method concerns a RFID transponder which comprises first and second field detectors respectively for first and second interrogation fields in order to watch for the reception of these first or second interrogation fields at least respectively during executions of corresponding first and second communication protocols. If during the execution of a communication protocol the reception of the corresponding interrogation field is no more detected by the corresponding field detector while the power provided by the power generator remains equal or superior to the requested power level, then this communication protocol is stopped and the RFID transponder enters a Standby state. When the transponder is in this Standby state, the corresponding field detector continues to watch for the reception of the corresponding interrogation field in order to detect if it is again received and, if this is the case, to trigger a restart of this corresponding communication protocol.

Abstract: The DC-DC converter includes an inductor cooperating with a first switch and a second switch operating alternately, in order to supply an output voltage of higher, equal or lower level than the level of an input voltage. The converter includes a switching control unit for the switches for determining a first switching time for the first switch and a second switching time for the second switch. The switching control unit includes a voltage-current conversion circuit for converting into current a comparison voltage, which is the difference between the output voltage and the input voltage, a first current being supplied by the conversion circuit for charging a first capacitor to a first voltage threshold to determine the first switching time and a second current being supplied by the conversion circuit for charging a second capacitor to a second voltage threshold to determine the second switching time.

Abstract: A system for detecting customer media comprising an RF transceiver in a public transport conveyance is proposed, where the system for each passenger compartment or car includes a number of reading devices, which are interconnected and connected to an on-board unit for the purpose of data communication, where the entire interior of passenger compartment or car is covered by a number of reading devices, where the reading devices are arranged in such a manner that any two reading devices are provided on opposite lateral walls of the passenger compartment or car, which cover the room up to the opposite wall, where each two reading units are arranged in the roof area or floor area symmetrically around the central longitudinal axis of the passenger compartment or vehicle, where the detection range of the respective two reading devices is substantially identical and substantially covers the entire width of the passenger compartment or car in the floor area or roof area, where the floor area or the roof area is cover

Abstract: A communication beacon including a calculation unit associated with a memory module for data storage and with a communication circuit, the beacon being powered by a power unit, the communication circuit including a first interface unit using a first protocol, a second interface unit using a second protocol, the memory unit including a first memory unit and a second memory unit each memory unit being electrically connected to each interface unit.

Abstract: The present invention relates to a humidity sensor comprising a silicon base plate on which at least a plurality of dielectric layers, each provided with a metallic zone, and a metallic layer are arranged, said metallic layer being etched in order to form two electrodes, each comprising one armature provided with a multitude of arms, these armatures being mounted so that the arms of each armature are interlaced in order to have arms placed opposite each other and separated by gaps.

Abstract: An envelope detector circuit, suitable for use in RFID tags, includes a voltage doubler circuit and a biasing voltage generating circuit which comprises components matched respectively to rectifying components of the voltage doubler circuit. A rectifying component of this voltage doubler circuit is formed by a transistor controlled by the biasing voltage generating circuit which provides a biasing voltage to a control gate of this transistor, the biasing voltage generating circuit being arranged so as to permit a determined forward biasing current to flow through the transistor and further rectifying elements of the voltage doubler circuit. This embodiment provides fast, highly sensitive detection of envelope waveforms in input signals. Thanks to the matched rectifying components, efficiency variations due to variations in manufacturing process can be eliminated. The envelope detector circuit is further arranged for maintaining a stable detection independent of variations in temperature.

Abstract: The electronic memory device comprises a non-volatile memory matrix organized in rows and columns, an address decoder with address input lines for selecting a row according to a particular address given on the address input lines. Additional address mask input lines are provided, each address mask input line being assigned to an address input line, wherein an address mask input line in activated state has the effect of ignoring the assigned address input line. The method for testing said electronic memory device is performed with a significant lower number of read/write operations, since by ignoring a particular address line a plurality of write operations can be performed simultaneously.

Abstract: A receiver circuit includes an input terminal through which an input signal is received. The receiver circuit also includes a first amplifier stage connected via its input to the input terminal of the receiver circuit; and an envelope detector stage that detects the incoming signal maxima to recover the signal envelope, where the detector stage is connected to the output of the first stage.

Abstract: The present invention concerns a signal generator circuit powered by a supply voltage and including flip flop means including a first input to which is connected a continuous input signal whose amplitude is defined, a second input to which is connected a clock signal whose duty cycle is defined, and a third, reset input, and outputting an output signal whose duty cycle is that of the clock signal and whose amplitude is that of the input signal, characterized in that said circuit further includes regulating means arranged to compare the output signal to a set point signal representative of the desired duty cycle and to deliver a control signal connected to the third input of the flip flop means so as to activate the reset to modify the duty cycle of the output signal.