Abstract: Systems and methods for dynamically adjusting the gain in a receiver front end to have a desired amount of headroom, based upon a measurement of the signal to noise ratio (SNR) of the output of a digital to analog converter and the amount of degradation to the SNR due to previous adjustments to the gain.

Abstract: Methods and systems for unifying an EPON network and a coax-based access network may include, in a network with an Ethernet passive optical network (EPON) optical line terminal (OLT), coaxial network units (CNUs), and an optical coax bridge (OCB) with a plurality of virtual optical network units (vONUs) each comprising a plurality of logical link identifiers (LLIDs) and having its own MAC address, each vONU corresponding to one CNU: forming, in the OCB, each of the plurality of vONUs when a respective CNU is admitted to a coax network coupled to the OCB; communicating data transmissions from an optical fiber network to the coax network, and data transmissions from the coax network to the optical fiber network, via said OCB; and transmitting and receiving data packets between the OLT and the at least one CNU. The OCB may emulate an optical network unit (ONU) relative to the OLT.

Abstract: Systems and methods for reducing the amount of power consumed by an electronic or electrical device by using collected knowledge of the operation of the device to determine when to place the device in an ultra-low power consumption mode.

Abstract: Methods and systems are provided for spreading spectral density of digital-to-analog conversion output signals. A spreading circuit may spread a digital-to-analog converter (DAC) output signal over a particular frequency spectrum, with the spreading circuit receiving the DAC output signal; generating a plurality of internal control signals; and generating based on the DAC output signal and the one or more internal control signal a corresponding spread output signal. The Internal control signals may comprise at least a first control signal, generated based on sequences meeting at least one particular criterion, a second control signal, generated based on a feedback corresponding to an intermediate output generated within the spreading circuit. The spreading circuit may generate the first control signal based on zero-sum sequences. The spreading circuit may generate a stream of pulses based on the intermediate output, and may generate the feedback signal based on the stream of pulses.

Abstract: Systems and methods for providing power to a home entertainment integrated circuit chip are disclosed. The home entertainment integrated circuit chip can operate in at least two power control modes: “power on” mode and “standby” mode. In power on mode, power is supplied to IC core module from a main power supply. The power supplied to the IC core module is isolated from power supplied to a standby island. Accordingly, during the second mode power is applied only to the standby power island through a regulator internal to the integrated circuit chip. The regulator is coupled to an external peripheral input/output (I/O) power supply that is independent of the main power supply.

Abstract: A system includes a first circuit and a second circuit. The first circuit includes a first MOS transistor having a gate and a drain. The first circuit is configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor. The drain of the first MOS transistor is configured to output a first current that is proportional to the square of the input voltage of the RF signal while receiving the RF signal. The second circuit includes a second MOS transistor having a source configured to receive a first current from the first circuit. The second MOS transistor is biased in a triode region and has a channel resistance between the source and a drain. The second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit.

Abstract: A method, system and computer program for transmitting at least two payloads in a downstream traffic phase of a time-division duplex (TDD) cycle with a single preamble from a headend followed by concatenated payloads without intervening preambles, whereby the payloads are ranked by increasing modulation profiles. The preamble, and concatenated and ordered set of payloads are then transmitted to two or more predetermined customer premise equipments (CPEs).

Abstract: Methods and systems are provided for power management in communication devices, particularly based on cable connectivity. A communication device that comprise a communication port, comprising a first connector and a signal path communicatively coupled between device components and the connector, may be operable, such as via a power management component in the communication device, to determine whether an external cable is mated to the first connector and to transition the communication device to a sleep mode if it is determined that an external cable is not mated to the first connector.

Abstract: The present invention provides a system and method for protecting data stored in the control registers of an integrated circuit, such as a television chip. The system and method use one or more selectively activated read protection modules to prevent the control registers from being read unless a predetermined key or password is entered. The password or key may be stored in password registers within the chip. A key access generator will enable read access of the control registers if correct values are written to the appropriate password registers. The key access generator may enable read access for a predetermined period of time or until it receives another input.

Abstract: Systems and methods are provided for synchronizing multiple channels in an access network, where the multiple channels are neighboring channels such that a guard band between them or use of a diplexer to prevent inter-channel interference is not required. Synchronization is achieved by defining channel MAP (media access plan) cycle structures such that all channels work in the same direction (upstream US or downstream DS) at any given time. Moreover, the network controller of channel may send out a beacon to allow new nodes to join. A long MAP cycle (402) may be followed by three consecutive regular MAP cycles (404, 406), and (408). These MAP cycles are repeated between beacon transmissions. Synchronization allows multiple channels to be configured contiguous (without a guard band between neighboring channels) and without utilizing diplexers. A plurality of customer premises equipment may operate on each of the communications channels.

Abstract: Systems and methods for scheduling network communications in a managed network can include a Network Controller discovering a plurality of network nodes; the Network Controller classifying the discovered network nodes into two or more classifications of node for node-level prioritization of network communications; the Network Controller receiving reservation requests from at least some of the plurality of network nodes, wherein the reservation requests request one or more time slots for their respective network nodes in an upcoming communication window; and the Network Controller assigning time slots in the upcoming communication window to one or more network nodes in response to reservation requests, wherein the assignment is based on a priority of the network nodes and wherein the priority is assigned to the nodes according to their classification.

Abstract: The present application relates to a method for frame rate conversion. The present application relates also to a system for frame rate conversion and a computer comprising said frame rate. In addition, the present application relates to a computer readable medium having a computer program for performing said method. The method comprises defining a first frame rate profile with a first frame rate, defining at least a second frame rate profile with a second frame rate, rendering video frames at the first frame rate profile, detecting the quality of the rendered video frames, and switching from the first frame rate profile to the second frame rate profile at least depending on the detected quality of the rendered video frames.

Abstract: A method of signal processing, or corresponding apparatus, includes providing digital input signals representing beamforming data to be transmitted on respective antennas. One of the digital input signals is selected at a time among a plurality of times, to cycle through the digital input signals repeatedly and provide a multiplexed digital signal, which is converted to a multiplexed analog signal. The multiplexed analog signal is filtered to pass a predetermined frequency band and demultiplexed to provide analog output signals. One of the analog output signals is selected and provided to a corresponding antenna for transmission. Sharing a transmitter and DAC among multiple antennas results in reduced cost and power. Such cost and power reductions in turn enable larger antenna arrays than are available with prior art techniques, thereby promoting increased throughput and coverage.

Abstract: Systems and methods for controlling a power amplifier includes combining a digital modulated data signal with a digital bias signal to generate a combined digital signal, the digital bias signal generated based on an envelope for the modulated data signal; converting, by a digital-to-analog converter, the combined digital signal into a combined analog signal, the combined analog signal comprising an analog modulated data signal and an analog envelope bias signal; and separating the analog modulated data signal and the analog bias signal onto separate signal paths, wherein the converting is performed using a single digital-to-analog converter.

Abstract: An integrated circuit voltage regulator includes a transconductor first stage; and a negative impedance cancellation stage, where the negative impedance cancellation stage comprises cross-coupled transistors at outputs of said transconductor first stage, and resistors in the transconductor first stage and the negative impedance cancellation stage introduce zeros in a transfer function, compensating for parasitic poles. The resistors may compensate for parasitic capacitance inherent in transistors. Load transistors may be coupled to outputs of the transconductance first stage. The voltage regulator may be implemented in a Complementary Metal-Oxide-Semiconductor (CMOS) structure, which may be a system-on-chip integrated circuit. The voltage regulator may provide immunity to power supply noise. The negative impedance cancellation stage may include differential input transistors coupled to the cross-coupled transistors.

Abstract: Techniques to reduce the transmission overheads in a communication system are disclosed. In an embodiment, a method described herein relates to the elimination of redundant padding to realize an integer number of FEC code-words during the FEC-encoding process of transmission as well as the reduction/elimination of redundant padding to realize an integer number of transmission symbols during the subcarrier modulation mapping process of transmitting OFDM/ACMT/DMT symbols. The techniques are described in the context of a communication system based on the MoCA specification. Furthermore, techniques for channel-profiling, channel-estimation and bandwidth request/grant signaling that facilitate the realization of the method of reduction of transmission overheads in a MoCA system are also described.

Abstract: An LDPC parity check matrix includes a systematic portion having a plurality of systematic elements and a parity portion having a plurality of parity elements. The value of each systematic element determines a cyclic shift to be applied to rows of an identity submatrix corresponding to that element. The value of each parity element determines a cyclic shift to be applied to rows of an identity submatrix corresponding to that element. The weights of two or more columns of the parity portion are the same.

Abstract: Systems and methods for establishing Parameterized QoS flows in a managed network can include a Designated Network Node (like a Network Controller or any network node) discovering a plurality of network nodes.

Abstract: Various embodiments of methods and systems for pausing and shaping data flow while supporting both parameterized and prioritized Quality of Service are disclosed. In some embodiments, a system for pausing and shaping data flow comprises an input buffer, a first pause controller coupled to the input buffer and an output buffer for flow control messages. Various embodiments also include a hop-1 buffer coupled to the input buffer and a hop-2 buffer comprising a plurality of queues coupled to the hop-1 buffer. Additionally, in some embodiments, a second pause controller is coupled to the queues. The second pause controller selects a queue or queues that will cause a pause to be generated based on a predetermined condition. A two-hop process controller controls the data packet flow from the input buffer to the hop-1 buffer and from the hop-1 buffer to the hop-2 queues based on packet classification.

Abstract: Methods and systems for digitization of broadband analog signals may comprise in a radio frequency (RF) transceiver comprising a diplexer, first and second automatic gain and slope control (ASCS) modules, a combiner, and an analog to digital converter (ADC): receiving an input RF signal comprising at least two signals, splitting the input RF signal in the frequency domain into first and second signals of different frequency utilizing the diplexer, configuring a frequency-dependent gain level for each of the first and second signals utilizing the first and second ASCS modules, combining output signals from the first and second ASCS modules utilizing the combiner, and converting the combined output signals to a digital signal utilizing the ADC. The frequency dependent gain levels of the first and second signals may be configured to enable the ADC to operate with an effective number of bits (ENOB) of approximately 10.