Abstract: Two banks of differently-connected resistors are connected as an input to an op-amp feedback circuit.

Abstract: A decimation filtering circuit for performing a decimation operation with a decimation factor of M in a pipelined structure. A finite impulse response ("FIR") filtering of N taps for achieving a desired frequency response is designed to have an integral ratio of N/M. A total of N/M processing stages is connected in series to accumulate filtered data based on data samples of an input signal and predetermined FIR coefficients. Each of the N/M processing stages produces an accumulated output in every other M accumulations for M input data samples.

Abstract: An apparatus for compressing a speech signal into a compressed speech signal that is represented by a plurality of parameters. A time-varying digital filter is used to model the vocal tract. A number of LPC coefficients specify the transfer function of the filter updated on frame basis. An excitation signal is input to the filter analyzed on sub frame basis. This excitation signal includes either an adaptive vector quantiser code or a first pulse sequence, followed by a second pulse sequence. Selection logic is used to determine whether the adaptive vector quantiser code or the first pulse sequence better represents the speech signal. Based thereon, a switch selects either the adaptive vector quantiser code or the first pulse sequence. Thus, the parameters which are transmitted through a channel to a destination decoder include the LPC filter coefficients, either the adaptive vector quantiser code or the first pulse sequence, the second pulse sequence, and one bit indicating the state of the switch.

Abstract: A four-operator sound synthesis integrated circuit comprises a first through a fourth sound synthesis operator, a first programmable multiplier connecting the output of the first operator to the input of the second operator, a second programmable multiplier connecting the output of the second operator to the input of the third operator, a third programmable multiplier connecting the output of the third operator to the input of the fourth operator, a fourth programmable multiplier connecting the output of the first operator a first input of a four-input adder, a fifth programmable multiplier connecting the output of the second operator a second input of the four-input adder, a sixth programmable multiplier connecting the output of the third operator a third input of the four-input adder, and a seventh programmable multiplier connecting the output of the fourth operator a fourth input of the four-input adder. The product of the combination is taken from the output of the four-input adder.

Abstract: A tone generator clears all registers in a twenty-nine stage device so that the previous results are not used in the calculations for a next tone sample. A series approximation of a desired complex sound waveform is achieved by calculating the contributions of twenty-nine time steps back in time. Twenty-nine different address phases are respectively applied to twenty-nine stacked arithmetic units. Each arithmetic unit comprises a first adder that inputs the output of a previous arithmetic unit and the input of the previous arithmetic unit. A second adder inputs the result from the first adder and one of the twenty-nine address phases. The second adder then reads a waveform generator connected to a multiplier that is controlled by a common multiplication factor "B". The output of the twenty-ninth unit produces the desired tone without any of the stacked units feeding back any signals.

Abstract: A talking analog clock comprises an analog mechanical clock movement in which the minutes mechanism has attached to it a switch that opens and closes for each minute elapsed. A digital synchronizing circuit is included that senses the closing and opening of the switch and uses these events to increment a digital time-keeping circuit. A directional switch attached to a winding stem and connected to the digital synchronizing circuit allows the digital time-keeping circuit to be incremented or decremented with the winding stem. The time in the current time memory is thereafter locked in synchronization with the analog time shown on the display dial. A user can therefore set the time or an alarm time in a simple way.