Abstract: The present invention provides a method and system for switching between browser and video modes in a standalone VCD-ROM system including a VCD player and a VCD-ROM disk. A browser program is first executed in the VCD-ROM system. The browser program allows a user to navigate through the content of the VCD-ROM disk by selecting hypertext links. The hypertext links are selected by clicking on clickable text, buttons, and graphics. The system also allows the user to play a video by selecting an associated hypertext link. When the video is selected, the method of the present invention saves the return address and the address of the video. The video is then played on the video system. When the video is finished playing, the method of the present invention reloads the return address into the system. This returns the system to the original browser mode of the browser.

Abstract: An electronic filter operates as a correlator that provides a discrete approximation of an analog signal. The analog to digital conversion is integrated directly approximation calculation. An array of sample and hold circuits or single bit comparators provide outputs to a series of multipliers, the other input of which is a coefficient value of a Fourier series approximation of the desired frequency response. Each of the sample and hold circuits samples sequentially in time and holds its sample until the next cycle. Thus the sample point rotates in time through the array and each new sample is multiplied by a different coefficient. The output of the multipliers is summed for evaluation.

Abstract: A device for use in a modem configuration that enables the transfer of data from a host signal processor (HSP) to an A/D-D/A converter or CODEC with less data loss, with low noise and that can send data at varying carrier frequencies without changing the size of the buffers. The device further allows for data transfer that is flexible with any given modulation scheme, carrier frequency or baud frequency to conform with the V.34, V90, as well as prior and subsequent recommendations. The device further includes a counter for counting the number of data samples transferred between the CODEC and the HSP and for alerting the HSP to avoid an overflow condition. The counter is further configured to count beyond the physical size of the buffer in order to simplify operation in an overflow condition. A transmit buffer is included for transferring data from the HSP to the CODEC.

Abstract: To detect color motion artifacts in a video frame, a motion-compensated color-distance value is compared against a threshold value. If the motion-compensated color-distance value is greater than or equal to the threshold value, color-motion artifacts are detected. The motion-compensated color-distance value is a sum of absolute values of the differences between corresponding pixel values of the video frame and a reference frame. To detect color motion artifacts in a video frame, in another embodiment, luminance and chrominance components of the intra-frame activity levels are compared against luminance and chrominance components of the inter-frame activity levels. If any of the components of the inter-frame activity levels is greater than the corresponding components of the intra-frame activity levels, color-motion artifacts are detected. To reduce color-motion artifacts, either a smaller quantization scale or intra-frame encoding is used to encode the data.

Abstract: A method and device are provided that allow computation of multiple modulus conversion (MMC) outputs using little or no division operations. Instead of division operations, multiplication and logical shift operations are used to produce pseudo-quotients and pseudo-remainders, which may be corrected in a final step to produce correct MMC outputs. This allows for more efficient implementation, since division is typically less efficient than multiplication and logical shift. The method and device operate on MMC inputs that may be partitioned into sub-quotients of varying numbers of digits in any numbering system. The multiplication and logical shift operations are performed on each of the sub-quotients according to a procedure derived from long-division techniques.

Abstract: A method for determining quantization numbers for each macro block in one video segment having a prescribed capacity is disclosed. The quantization numbers determine how much data will be preserved for that macro block. The method begins by determining a level of complexity for each macro block. Next, initial quantization numbers are chosen for the macro blocks by choosing the largest values possible without exceeding the prescribed capacity of the video segment. Final quantization numbers are selected based on respective ones of the initial quantization numbers proportioned according to the level of complexity for that macro block. The final quantization numbers may be increased or decreased so that the capacity of the video segment is maximized but not exceeded.

Abstract: A method for controlling communication. The method sends a first instruction from a first processor to a first device via a processor bus in electrical communication with a first bus, sends a control signal from the first processor to a selector, the selector switching electrical communication at least one signal line of the processor bus from the first bus to a second bus, sends a second instruction from the first processor to a second device, sends a control signal from the first processor to the selector, the selector switching electrical communication of the at least one signal line of the processor bus from the second bus to the first bus, and sends data from the first device to the first processor.

Abstract: A photodetector is formed in a CMOS circuit using a junction field-effect transistor (JFET). The JFET/CMOS photodetector can be used to create an active pixel sensor for a CMOS digital imager, performing both photodetection and electrical signal amplification, allowing higher fill factors than with conventional APS imagers. A standard CMOS fabrication process is augmented with a small number of steps to integrate the JFET within the pixel, allowing the use of conventional CMOS fabrication plants.

Abstract: An imaging system that can adaptively clock the component subsystems based upon the processing schedules of these subsystems is disclosed. Additionally, disclosed is an adaptively enabled multi-processor system based upon these processing schedules.

Abstract: A method for controlling communication on a bus connecting a first processor, a second processor, and a device. The method transmits a first control signal from the first processor to the second processor via a control signal line, causing a bus connection of the second processor to enter a high-impedance state, transfers data between the device and the first processor via the bus, then setting a bus connection of the first processor to the high-impedance state, and transmits a second control signal from the first processor to the second processor via the control signal line, causing the bus connection of the second processor to exit the high-impedance state.

Abstract: A high quality DAC is provided for a lower cost (including the layout size of the circuit on an audio chip) of high end DACs. The DAC includes a first circuit configured to remove even harmonics from a sigma delta circuit, and a second circuit configured to remove odd harmonics.

Abstract: The invention provides a method and apparatus for performing a voltage to current conversion. In particular, the invention provides a voltage to current converter configured to vary its transconductance (Gm). Such a converter is configured to receive a voltage input signal combined with a reference voltage signal to be converted to a current output. Optionally, the reference voltage signal may be provided by a parabolic impedance network that includes a bank of resistors and a plurality of corresponding current sources. Each current source corresponds to each node between two resistors, and may be varied in order to program changes in the comparator's Gm. Each resistor and corresponding current source is configured to create an individual reference voltage reference having a value that occurs in a parabolic manner in relation to other voltage references occurring across the impedance network. The converter further includes a plurality of comparators corresponding to the plurality of voltage reference signals.

Abstract: An image processing method and apparatus is described for processing a signal from a monochrome or color sensor that may be subject to pixel defects or blemishes. Without prior knowledge of any pixel defects, the processing method examines each pixel value and its neighboring pixel values. A number of tests are applied to the set of pixel values to determine whether the underlying pixel is defective. If the underlying pixel is determined to be defective, the pixel value is replaced by an estimate value derived from the values of its neighboring pixels. Otherwise, the pixel value remains intact.

Abstract: A programmable image transform system has a programmable addressing and arithmetic blocks. In the programmable addressing block, an input address generator has an input addressing microsequencer and an input addressing memory that stores an input addressing procedure. The microsequencer executes the input addressing procedure to generate addresses from which to request image data. In the programmable arithmetic block, an arithmetic block memory stores an image processing procedure and a microsequencer executes the image processing procedure using the image data to generate transformed image data.

Abstract: Off-grid interpolation in image processing. The present invention provides for a more perceptually pleasing resultant image when compared to conventional image processing systems that employ on-grid interpolation. In one embodiment, the present invention is operable on a digital image generated using a mask having a Bayer pattern distribution. Off-grid RGB triplets are generated using the raw data received from the Bayer pattern mask. The undesirable mosaic-type images as well as the bright and dark discontinuities within the image that are often generated using conventional on-grid interpolation to generate RGB triplet are avoided when using the present invention. The undesirable cross talk effects that are practically unavoidable to some degree within all digital image masks are also substantially minimized. Bi-linear interpolation and cubic linear interpolation are employed to achieve a digital image having a high visually perceptual quality.

Abstract: A digital camera that includes, among other things, a processor having a memory and a substrate having at least one pixel disposed thereon for absorbing light from an object. The pixel is electrically coupled to the processor for storing a digital image of the object in the memory of the processor. Also included in the digital camera is an electromechanical shutter mechanism that is moveably associated with the pixel. The electromechanical shutter system has a first position and a second position. The positions are selected according to commands from the processor of the digital camera. The first position exposes the pixel to the light from the object and the second position prevents exposure of the at least one pixel to the light. Various aspects of the present invention may also be found in an image capturing device that includes an adjustable aperture that allows light to pass through when opened and that prevents light from passing through when closed.

Abstract: An improved segmented digital to analog converter is provided, configured with a novel method of compensating current flow in secondary or successive segmented elements. In operation, dual current devices initially load, then subsequently unload a cascade of resistor networks connected to the secondary or successive voltage segmenting elements, preventing the perturbation of precise operation of the primary or preceding elements. In contrast to conventional approaches, the improved converter obviates the need for a buffer or amplifier to isolate the secondary and successive voltage segmenting elements from the primary or preceding elements.

Abstract: A high quality DAC is provided for a lower cost (including the layout size of the circuit on an audio chip) of high end DACs. The DAC includes a first circuit configured to remove even harmonics from a sigma delta circuit, and a second circuit configured to remove odd harmonics.

Abstract: A sigma delta modulation loop circuit and related method is provided for use in a device having a radio frequency receiver. The loop is configured to compensate for noise that is generated by the sigma delta loop and that affects radio signals within the range of a radio frequency band according to the operating frequency of the radio frequency tuner.

Abstract: The disclosure is a solid-state imaging device, including a photosensor for collecting charge created by incident photons, a comparator for comparing a digital voltage value corresponding to the collected charge, to a predetermined value, and generating a comparison output, and a normalizing circuit for normalizing the digital voltage value, in response to the comparison output.