Patents Assigned to Fairchild Korea Semiconductor Ltd.
  • Patent number: 8169163
    Abstract: The present invention relates to a control device of a light emitting device that includes a plurality of LED rows formed of a plurality of LEDs sequentially connected in series. The control device includes: a plurality of switches respectively connected to the plurality of LED rows and sequentially transmitting a detection voltage of each of the plurality of LED rows, wherein the detection voltage corresponds to an output voltage applied to the plurality of LED rows; a comparator receiving the plurality of detection voltages, and generating a clock control signal according to a result of comparison with a predetermined reference; a clock signal generator generating a clock signal having a period that is changed according to the clock control signal; and a shift register that controls switching operations of the plurality of switches according to the clock signal.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: May 1, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Eunchul Kang, Duckki Kwon, Juho Kim
  • Patent number: 8169802
    Abstract: Disclosed are a switch controller, a switch control method, a converter using the same, and a driving method thereof. A first voltage is generated by using a voltage that is input to an input terminal, and a soft start signal is generated by using the first voltage during a soft start duration. A switching operation is controlled by using the soft start signal during the soft start duration.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: May 1, 2012
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Jin-Tae Kim, Gwan-Bon Koo, Hang Seok Choi
  • Patent number: 8164927
    Abstract: The present invention relates to a switch control device and a switch control method. The present invention controls a switching operation of a power switch that controls output power of a switching mode power supply (SMPS). The present invention generates an operation current corresponding to an input voltage of the SMPS and counts a compensation period in which a power supply voltage generated by the operation current increases from a predetermined counter low-reference voltage to a predetermined counter high-reference voltage. The present invention generates a compensation feedback current depending on the count result, generates a total feedback current by summing a main feedback current having a predetermined value and the compensation feedback current, and generates a power limit current of which a maximum value increases and decreases depending on the total feedback current. Turn-off of the power switch is determined by comparing the current flowing on the power switch with the power limit current.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: April 24, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Sang-Cheol Moon, Young-Bae Park
  • Patent number: 8155352
    Abstract: A serializer/deserializer interfaces a microprocessor/controller with I/O devices over a flexible hinging cable. The I/O devices have parallel interfaces as does the controller but the serializer/deserializer reduces the number of signal that traverse the flexible hinging cable. LCD displays, cameras, keypads and audio signals handled by the invention.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: April 10, 2012
    Assignee: Fairchild Korea Semiconductor Ltd
    Inventor: Jongsoo Cho
  • Patent number: 8148956
    Abstract: The present invention relates to a power factor correction circuit and a method of driving the power factor correction circuit. The power factor correction circuit according to the present invention includes a power transfer element configured to receive an input voltage, an input current corresponding to the input voltage flowing through the power transfer element, and a switch connected to the power transfer element and configured to control an output voltage generated by the current flowing through the power transfer element.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: April 3, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jong-Tae Hwang, Jin-Sung Kim, Moon-Sang Jung, Dae-Ho Kim, Sung-Yun Park
  • Patent number: 8144486
    Abstract: In a power converter, a primary coil receives an input voltage, and a switch includes a first electrode, a second electrode coupled to the primary coil, and a control electrode. An output unit includes a secondary coil, and outputs an output voltage. The primary coil and the secondary coil form a transformer, and the input voltage is converted to the output voltage by the transformer. A controller receives a sensing voltage corresponding to a switch current flowing between the first electrode and the second electrode of the switch, detects a valley point of a voltage between the first electrode and the second electrode of the switch based on the sensing voltage, and transmits a control signal to the control electrode of the switch in accordance with the valley point.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: March 27, 2012
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Sang-Cheol Moon, Gwan-Bon Koo, Jin-Tae Kim, Young-Bae Park
  • Patent number: 8139381
    Abstract: In a power converter, a primary coil of a transformer receives an input voltage, and a first terminal of a switch is coupled to the primary coil. An output unit includes a secondary coil of the transformer, and outputs an output voltage to which the input voltage is converted by the transformer. A switching controller receives a feedback voltage corresponding to the output voltage and a sensing voltage corresponding to a current flowing between the first terminal and a second terminal of the switch. The switching controller determines whether to perform an operation of a burst mode based on the feedback voltage. The switching controller generates a control signal by comparing the sensing voltage with a comparison voltage during a first period of the burst mode, generates the control signal by comparing the sensing voltage with a voltage corresponding to the feedback voltage during a second period of the burst mode, and transmits the control signal to a control terminal of the switch.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: March 20, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Sang-Cheol Moon, Hang-Seok Choi, Young-Bae Park
  • Patent number: 8125080
    Abstract: Provided are semiconductor power module packages, which are structurally simplified by bonding electrodes onto substrates, and methods of fabricating the same. An exemplary package includes a substrate and semiconductor chips disposed on a top surface of the substrate. Electrodes are bonded to the top surface of the substrate and electrically coupled to the semiconductor chips. Parts of the semiconductor chips are electrically coupled to parts of the electrodes by interconnection lines. An encapsulation unit covers the semiconductor chips, the electrodes, and the interconnection lines and exposes at least top surfaces of the electrodes.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: February 28, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventor: Keun-hyuk Lee
  • Patent number: 8125197
    Abstract: Disclosed are a switch controller, a switch control method, and a converter based thereon. The switch controller generates an input sensing voltage corresponding to the input voltage of the converter, and compares the input sensing voltage with a predetermined first reference value. The switch controller generates a zero cross detection signal with a first level or a second level depending upon the comparison result, and generates a reference clock signal varying in frequency in accordance with one cycle of the zero cross detection signal. The switch controller generates digital signals by using the reference clock signal and the zero cross detection signal. The digital signals synchronize with the zero cross detection signal, and increase in accordance with the reference clock signal during a half of one cycle of the zero cross detection signal, while decreasing in accordance with the reference clock signal during the other half cycle of the zero cross detection signal.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: February 28, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jong-Tae Hwang, Moon-Sang Jung, Jin-Sung Kim, Dae-Ho Kim, Min-Ho Jung
  • Patent number: 8120275
    Abstract: The present invention relates to an inverter and a lamp driver having the same. The inverter includes a first switch having a first body diode, a second switch having a second body diode, a transformer including a first side coil in which a first current and a first voltage are generated according to switching operations of the first switch and the second switch and a second side coil having a predetermined winding ratio with respect to the first side coil, and a controller for controlling each switching operation of the first switch and the second switch. The controller turns on one of the first switch and the second switch corresponding to one of the first body diode and the second body diode, and a current flows through the first switch and the second switch during a dead time.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: February 21, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jae-Soon Choi, Dong-Hun Lee, Hak-Hee Lee
  • Patent number: 8120337
    Abstract: A load driver includes an inverter and an inverter driver. The inverter converts an input voltage into a driving voltage of a discharge lamp using at least one first switch for switching according to a duty ratio, and the inverter driver controls the inverter. The inverter driver controls the duty ratio using a voltage of a capacitor and a control signal having a waveform that is repeated with a predetermined frequency. The capacitor is charged and discharged by a current corresponding to a difference between a feedback voltage corresponding to a current flow to the discharge lamp and a reference voltage. Such inverter driver controls to gradually increase the output voltage of the inverter in the soft start period by setting the voltage of the capacitor as a voltage corresponding to the control signal.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: February 21, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jin-Hwa Chung, Jae-Soon Choi, Chan Son, Hak-Hee Lee
  • Patent number: 8115466
    Abstract: A converter is disclosed for using at least one switch to convert an input signal to a square wave signal, and using the square wave signal to generate an output voltage. The converter converts the square wave signal by a switching operation of a switch and generates the output voltage, and includes a switch controller for controlling the switching operation. The switch controller generates a first signal VCT having a first period that varies according to an output voltage, controls the switching operation of the switch by using the first signal, detects the output voltage, a first current Ids2 flowing through the switch, and a level of the first signal, and controls a burst mode according to the detection results.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: February 14, 2012
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Hang-Seok Choi, Young-Bae Park, Jae-Hwoan Chi, Gwan-Bon Koo
  • Patent number: 8084815
    Abstract: A superjunction semiconductor device includes an edge p pillar, an active region, and a termination region. The edge p pillar has a rectangular ring shape with rounded corners surrounding the active region. The active region includes an active n region and active p pillars having vertical stripe shapes disposed at regular intervals in the active n region. The top and bottom ends of the active p pillars are separated from the edge p pillar. The termination region includes termination n pillars and termination p pillars alternately arranged around the edge p pillar. Surplus p charges that are not used to balance the quantity of p charges and the quantity of n charges among p charges included in the upper and lower parts of the edge p pillar are eliminated or n charges are supplemented to balance the quantity of p charges and the quantity of n charges.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: December 27, 2011
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jae-gil Lee, Jin-young Jung, Ho-cheol Jang, Chong-man Yun
  • Patent number: 8085558
    Abstract: A resonant converter includes a square wave generator including a first switch and a second switch, and generating a first square wave corresponding to an input voltage by alternately turning on/off the first and second switches; a resonator including a first coil of a primary coil of a transformer, and generating a resonance waveform corresponding to the first square wave; and an output unit including a second coil of a secondary coil of the transformer, and outputting a voltage corresponding to a current generated in the second coil corresponding to the resonance waveform.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: December 27, 2011
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventor: Hang-Seok Choi
  • Patent number: 8072029
    Abstract: A high voltage semiconductor device includes a source region of a first conductivity type having an elongated projection with two sides and a rounded tip in a semiconductor substrate. A drain region of the first conductivity type is laterally spaced from the source region in the semiconductor substrate. A gate electrode extends along the projection of the source region on the semiconductor substrate between the source and drain regions. Top floating regions of a second conductivity type are disposed between the source and drain regions in the shape of arched stripes extending along the rounded tip of the projection of the source region. The top floating regions are laterally spaced from one another by regions of the first conductivity type to thereby form alternating P-N regions along the lateral dimension.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: December 6, 2011
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-Cheol Choi, Chang-Ki Jeon, Sang-Hyun Lee
  • Patent number: 8067826
    Abstract: A metal tab die attach paddle (DAP) disposed between the lead frame and a power device die in a power device package reduces the stress exerted on the semiconductor power device die caused by the different coefficients of thermal expansion (CTE) of the semiconductor power device die and the lead frame. In addition the power device package substantially prevents impurities from penetrating into the power device package by increasing the surface creepage distance of a sealant resulting from the metal tab DAP and an optional swaging of the lead frame.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: November 29, 2011
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Joon-Seo Son, O-seob Jeon, Taek-keun Lee, Byoung-ok Lee
  • Patent number: 8058735
    Abstract: A wafer level chip scale package having stud bumps and a method for fabricating the same are described. The wafer level chip scale package includes a silicon substrate having a passivation layer and a chip pad on its top surface; a stud bump being formed on the chip pad and encircled by a first insulating layer; a re-distributed line (RDL) pattern being formed on the same horizontal surface as the first insulating layer and the stud bump, the RDL pattern for connecting the stud bump and a solder bump; a second insulating layer for insulating the RDL pattern so that a portion of the RDL pattern that is connected with the solder bump is exposed; and the solder bump being attached to the exposed portion if the RDL pattern.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: November 15, 2011
    Assignee: Fairchild Korea Semiconductor LTD
    Inventors: Sang-do Lee, Yoon-hwa Choi
  • Patent number: 8049306
    Abstract: A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: November 1, 2011
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Taeg-hyun Kang, Sung-son Yun
  • Patent number: 8042350
    Abstract: A cooling device controller for controlling a cooling device is provided. The cooling device controller includes: a capacitor for supplying an output voltage through a first terminal; a first switch between a first input terminal and the first terminal of the capacitor; a predetermined reference voltage applied to the first input terminal; a second switch between a second input terminal and the first terminal of the capacitor, wherein a temperature-sensing voltage is applied to the second input terminal, the temperature-sensing voltage varying according to a first sensed temperature; and a switch controller to receive a first voltage waveform having a duty ratio, the duty ratio dependent on a second sensed temperature, wherein the switch controller is operable to turn on and off the first switch and the second switch according to the duty ratio.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: October 25, 2011
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Young-Bae Park, Hyun-Min Cho
  • Patent number: 8036001
    Abstract: A converter and a driving method thereof are provided. The converter includes first and second switches, and generates a square wave signal according to operations of the first and second switches. The converter includes a first capacitor and a primary coil, and resonates a driving voltage by using a driving voltage with the first capacitor and the primary coil so as to generate a driving current. The converter includes a secondary coil that forms the primary coil and the transformer, and generates output power by rectifying a current and a voltage generated in the secondary coil. In addition, the converter detects the phase of the driving current, and increases switching frequencies of the first and second switches if a phase difference of the phase of the driving current and that of the driving voltage is smaller than a predetermined value.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: October 11, 2011
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventor: Hang-Seok Choi