Patents Assigned to Fairchild Korea Semiconductor Ltd.
  • Publication number: 20130196480
    Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.
    Type: Application
    Filed: February 21, 2013
    Publication date: August 1, 2013
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: Fairchild Korea Semiconductor Ltd.
  • Patent number: 8487602
    Abstract: The present invention relates to a switch driving circuit and a driving method thereof. The switch driving circuit according to the present invention is supplied with a first voltage and a second voltage, is driven by a voltage difference between the first and second voltages, controls a switching operation of a power switch according to a switch driving control signal, generates a sense voltage corresponding to the second voltage, compares a predetermined reference voltage with the sense voltage, and stops the switching operation of the power switch according to the comparison result.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: July 16, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventor: Young Sik Lee
  • Patent number: 8482886
    Abstract: The present invention relates to a protection circuit, a resonance converter having the same, and a protection method thereof. A resonance converter having high-side and low-side switches senses a current flowing through the low-side switch and determines a zero voltage switching failure by using a width of a current flowing to a negative direction of the low-side switch.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: July 9, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Gwan-Bon Koo, Hyun-Chul Eom, Jin-Tae Kim
  • Publication number: 20130128640
    Abstract: The present invention relates to a switch controller, a switch control method, and a power supply including the switch controller. An exemplary embodiment of the present invention detects an on-time of a power switch of the power supply and decreases a frequency of a clock signal according to a period during which the detected on-time is shorter than or equal to the minimum on-time. According to the exemplary embodiment, switching of the power switch is controlled according to a clock signal, and the minimum on-time is an on period of the power switch that cannot be shortened.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 23, 2013
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: FAIRCHILD KOREA SEMICONDUCTOR LTD.
  • Publication number: 20130128627
    Abstract: The present invention relates to a converter, a switch controller controlling switching operation of a power switch in the converter, and a switch control method. An exemplary embodiment of the present invention generates a reference current corresponding to an output current of the converter and generates a control voltage that depends on the reference current. The exemplary embodiment controls an increase or a decrease of the control voltage and determines a switching frequency of the power switch according to the control voltage. The exemplary embodiment controls on-time of the power switch using a reference voltage determined according to a control current that depends on the reference current.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 23, 2013
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: FAIRCHILD KOREA SEMICONDUCTOR LTD.
  • Publication number: 20130106377
    Abstract: Exemplary embodiments relate to a control voltage delay device, a digital power converter, and a driving method of a digital power converter. The control voltage delay device generates an output clock signal and a reference clock signal for controlling an output voltage of the digital power converter. The control voltage delay device generates the output clock signal having an output delay to a clock signal according to the output voltage and the reference clock signal having a reference delay to the clock signal according to the reference voltage. The reference voltage is a target value of the output voltage.
    Type: Application
    Filed: October 24, 2012
    Publication date: May 2, 2013
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: FAIRCHILD KOREA SEMICONDUCTOR LTD.
  • Patent number: 8415891
    Abstract: The present invention relates to a lamp ballast circuit and a driving method. The lamp ballast circuit includes a voltage detector for detecting the level of a first voltage corresponding to an input voltage, a controller including an oscillator for changing the oscillation frequency according to the level of the first voltage, and an output unit for changing the frequency of the output voltage in correspondence to the oscillation frequency. Therefore, a lamp ballast circuit having less power consumption and that is operable by a lesser input current with less THD and a driving method thereof are realized.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: April 9, 2013
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Gye-Hyun Cho, Young-Sik Lee
  • Patent number: 8410809
    Abstract: A low-voltage and over-voltage detection circuit receives a power source voltage, generates a shift voltage by shifting the received voltage to a predetermined level, and fixes the shift voltage as a clamping voltage when the shift voltage is higher than a predetermined clamping voltage. The low-voltage and over-voltage detection circuit includes a first transistor and a second transistor. The first transistor generates a regulator voltage that varies according to the power source voltage and performs a switching operation according to the shift voltage and the regulator voltage, and the second transistor is connected in parallel with the first transistor and generates hysteresis. The low-voltage and over-voltage detection circuit determines whether the power source voltage is a low-voltage or an over-voltage by using a drain voltage generated according to currents flowing to the first and second transistors.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: April 2, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Kyoungmin Lee, Duckki Kwon, Juho Kim, Eunchul Kang, Byongsung Lee
  • Publication number: 20130070372
    Abstract: The present invention relates to a protection circuit, a resonance converter having the same, and a protection method thereof. A resonance converter having high-side and low-side switches senses a current flowing through the low-side switch and determines a zero voltage switching failure by using a width of a current flowing to a negative direction of the low-side switch.
    Type: Application
    Filed: November 14, 2012
    Publication date: March 21, 2013
    Applicant: FAIRCHILD KOREA SEMICONDUCTOR LTD.
    Inventor: Fairchild Korea Semiconductor Ltd.
  • Patent number: 8399923
    Abstract: Provided are a high voltage semiconductor device in which a field shaping layer is formed on the entire surface of a semiconductor substrate and a method of fabricating the same. Specifically, the high voltage semiconductor device includes a first conductivity-type semiconductor substrate. A second conductivity-type semiconductor layer is disposed on a surface of the semiconductor substrate, and a first conductivity-type body region is formed in semiconductor layer. A second conductivity-type source region is formed in the body region. A drain region is formed in the semiconductor layer and is separated from the body region. The field shaping layer is formed on the entire surface of the semiconductor layer facing the semiconductor layer.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: March 19, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Yong-cheol Choi, Chang-ki Jeon, Min-suk Kim
  • Patent number: 8390345
    Abstract: A ramp waveform generating apparatus generates a reference waveform by using an input signal and generates a driving control signal for turning on and off a switch having a first terminal connected to a load and a second terminal connected to a power supply by comparing the voltage of the reference waveform with the voltage of the load. While the switch is repetitively turned on and off in accordance with the driving control signal, a ramp waveform may be generated.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: March 5, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Sung Nam Kim, Cha Kwang Kim, Young Sik Lee
  • Patent number: 8379423
    Abstract: The present invention relates to a power factor correction circuit and a driving method thereof. The power factor correction circuit includes: an inductor for receiving an input voltage and supplying output power; a power switch connected to the inductor to control an inductor current flowing through the inductor; an auxiliary conductor coupled to the inductor with a predetermined turn ratio; and a power factor correction controller that controls the output power by controlling the switching operation of the power switch and determines whether or not the output voltage of the output power is an over-voltage.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: February 19, 2013
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Young-Bae Park, Sang Cheol Moon, Byoung-Heon Kim
  • Patent number: 8350369
    Abstract: Provided is a high power semiconductor package including: an insulation substrate having first and second surfaces opposite to each other; an interconnection patterns formed on the first surface of the insulation substrate, the interconnection patterns including a plurality of first dimples; a power control semiconductor chip mounted on the first surface of the insulation substrate, the power control semiconductor chip electrically connected with the interconnection patterns; and an encapsulation member encapsulating the insulation substrate, the interconnection patterns, and the power control semiconductor chip and exposing at least a portion of the second surface of the insulation substrate.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: January 8, 2013
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Keun-hyuk Lee, Seung-won Lim, Sung-min Park, Taek-keun Lee
  • Patent number: 8339815
    Abstract: Ripple of an input voltage is used to modulate a switching operation frequency of a switch mode power supply. A sensing voltage corresponding to the input voltage is received, a current ripple that is proportional to a difference between a peak value of the sensing voltage and the sensing voltage is generated, and a modulation control signal that is variable by the current ripple is generated. A switching frequency is modulated using an oscillator signal that is variable by the modulation control signal, and reduces the output voltage ripple.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: December 25, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Kwang-Il Lee, Jin-Tae Kim, Gwan-Bon Koo
  • Patent number: 8335061
    Abstract: The present invention relates to a protection circuit, a resonance converter having the same, and a protection method thereof. A resonance converter having high-side and low-side switches senses a current flowing through the low-side switch and determines a zero voltage switching failure by using a width of a current flowing to a negative direction of the low-side switch.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: December 18, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Gwan-Bon Koo, Hyun-Chul Eom, Jin-Tae Kim
  • Patent number: 8330218
    Abstract: Provided are a semiconductor device and a method of fabricating the semiconductor device.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: December 11, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jong-ho Park, Hyi-Jeong Park, Hye-mi Kim, Chang-Ki Jeon
  • Patent number: 8330490
    Abstract: An interlock circuit includes an input delay unit and an output suppressing unit. The input delay unit delays a plurality of input signals, provides a plurality of delayed input signals, and provides a plurality of exclusive input signals by performing a logical operation on the plurality of delayed input signals. The output suppressing unit provides a plurality of output signals, which are not simultaneously enabled, based on the plurality of exclusive input signals and the plurality of input signals.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: December 11, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jung-ho Lee, Eun-Chul Kang, Won-Hi Oh
  • Patent number: 8305009
    Abstract: An inverter driver controls an inverter that supplies driving voltages to a plurality of discharge lamps. The inverter driver includes a first amplifier having an output terminal, a second amplifier having an output terminal connected to the output terminal of the first amplifier, and a capacitor connected between the output terminal and a ground source. The first amplifier outputs only a negative current corresponding to the maximum value among the driving voltages supplied to the plurality of discharge lamps, and the second amplifier outputs a current corresponding to the maximum value among the driving currents flowing through the plurality of discharge lamps. Such inverter driver controls the inverter according to a voltage of the capacitor.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: November 6, 2012
    Assignee: FAIRCHILD KOREA SEMICONDUCTOR, Ltd.
    Inventors: Dong-Hun Lee, Jae-Soon Choi
  • Patent number: 8274235
    Abstract: An inverter according to exemplary embodiment of the present invention generates a plurality of feedback voltages corresponding to driving voltages of discharge lamps. The inverter generates a first minimum voltage having a smaller feedback voltage of a plurality of feedback voltages and compares the first minimum voltage and a short circuit reference voltage to determine a short circuit of at least two discharge lamps. Also, the inverter generates a plurality of feedback voltages corresponding to driving currents of a plurality of discharge lamps, generates a second minimum voltage having a smaller feedback voltage of a plurality of the feedback voltages, and compares the second minimum voltage and an open circuit reference voltage to determine the open circuit of the at least two discharge lamps.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: September 25, 2012
    Assignee: Fairchild Korea Semiconductor Ltd.
    Inventors: Jae-Soon Choi, Hak-Hee Lee, Il-Young Jung, Eung-Woo Lee
  • Patent number: RE44228
    Abstract: A switching mode power supply includes a switching transistor, coupled to a primary coil at a primary side of a transformer for converting an input DC voltage, supplying power to a secondary and a tertiary coil at a secondary side of the transformer according to an operation of the switching transistor; a switching controller receiving a feedback voltage corresponding to a first voltage generated in the secondary coil and receiving a detection signal corresponding to a current of the switching transistor to generate a switching control signal for controlling the turn on/off of the switching transistor; and a feedback signal generator receiving the first voltage and the switching control signal to set a sampling period, and storing the first voltage, sampled with a last pulse of the first pulse string within the sampling period as a feedback voltage. The output voltage is thereby accurately detected without opto-couplers or shunt regulators.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: May 21, 2013
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Young-Bae Park, Gwan-Bon Koo