Patents Assigned to FormFactor
  • Remote test facility with wireless interface to local facilities
    Patent number: 7613591
    Abstract: A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices were designed or a manufacturing facility where the electronic devices where manufactured. The central test facility may accept requests for test resources from any of a number of local test facilities, schedule test times corresponding to each test request, and at a scheduled test time, wirelessly transmits test data to a corresponding local test facility.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: November 3, 2009
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, Benjamin N. Eldridge
  • Electromagnetically coupled interconnect system architecture
    Patent number: 7612630
    Abstract: An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: November 3, 2009
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • System for measuring signal path resistance for an integrated circuit tester interconnect structure
    Patent number: 7609082
    Abstract: Resistances of signal paths within a interconnect structure for linking input/output (I/O) ports of an integrated circuit (IC) tester to test points of an IC are measured by the IC tester itself. To do so the interconnect structure is used to link the tester's I/O ports to a similar arrangement of test points linked to one another through conductors. Drivers within the tester, which normally transmit digital test signals to IC test points via the I/O ports when the IC is under test, are modified so that they may also either transmit a constant current through the I/O ports or link the I/O ports to ground or other reference potential. The tester then transmits known currents though the signal paths interconnecting the tester's I/O ports.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: October 27, 2009
    Assignee: FormFactor, Inc.
    Inventor: John M. Long
  • Voltage fault detection and protection
    Patent number: 7609080
    Abstract: A fault detection and protection circuit can include a comparing circuit (e.g., a comparator or a detector) that can be connected to a power line supplying power to an electronic device being tested. The comparing circuit can be configured to detect a fault in which the power line is shorted to ground. For example, the electronic device being tested may have a fault in which its power terminals are shorted to ground. Upon detection of such a fault, the comparing circuit activates one or more switches that shunt capacitors or other energy storage devices on the power line to ground. The comparing circuit may alternatively or in addition activate one or more switches that disconnect the power supply supplying power to the electronic device under test from probes contacting the electronic device.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: October 27, 2009
    Assignee: FormFactor, Inc.
    Inventors: Charles A. Miller, Bruce J. Barbara
  • SWITCH FOR USE IN MICROELECTROMECHANICAL SYSTEMS (MEMS) AND MEMS DEVICES INCORPORATING SAME
    Publication number: 20090260960
    Abstract: Embodiments of the present invention provide microelectromechanical systems (MEMS) switching methods and apparatus having improved performance and lifetime as compared to conventional MEMS switches. In some embodiments, a MEMS switch may include a resilient contact element comprising a beam and a tip configured to wipe a contact surface; and a MEMS actuator having an open position that maintains the tip and the contact surface in a spaced apart relation and a closed position that brings the tip into contact with the contact surface, wherein the resilient contact element and the MEMS actuator are disposed on a substrate and are movable in a plane substantially parallel to the substrate. In some embodiments, various contact elements are provided for the MEMS switch. In some embodiments, various actuators are provided for control of the operation of the MEMS switch.
    Type: Application
    Filed: April 21, 2008
    Publication date: October 22, 2009
    Applicant: FORMFACTOR, INC.
    Inventors: John K. Gritters, Eric D. Hobbs, Sangtae Park, Jun Jason Yao
  • SELF-MONITORING SWITCH
    Publication number: 20090260962
    Abstract: Methods and apparatus for switching electrical signals are provided herein. In some embodiments a smart switch is provided, the smart switch may include a switch having a wipe capability; a monitor coupled to the switch for monitoring a performance characteristic thereof; and a controller configured to provide a stepped change in wipe applied by the switch between closing cycles thereof in response to the monitored performance characteristic. In some embodiments, an electronic device may be provided having a smart switch disposed therein.
    Type: Application
    Filed: April 21, 2008
    Publication date: October 22, 2009
    Applicant: FORMFACTOR, INC.
    Inventors: Rodney Ivan Martens, Jun Jason Yao
  • MULTI-STAGE SPRING SYSTEM
    Publication number: 20090261517
    Abstract: Embodiments of a multi-stage spring system are provided herein. In some embodiments, a multi-stage spring system includes a spring assembly having at least one resilient element, wherein the spring assembly has a first spring constant when deflected up to a first distance, a greater, second spring constant when deflected beyond the first distance and up to a second distance, and a greater, third spring constant when deflected beyond the second distance and up to a third distance, and wherein the spring assembly stores mechanical energy when deflected towards a contact surface that biases the spring assembly away from the contact surface when released.
    Type: Application
    Filed: April 21, 2008
    Publication date: October 22, 2009
    Applicant: FORMFACTOR, INC.
    Inventor: JUN JASON YAO
  • Microelectronic contact structure and method of making same
    Patent number: 7601039
    Abstract: An electronic interconnection apparatus can include a sacrificial substrate, which can include first trenches and second trenches formed in the sacrificial substrate. The first trenches can be disposed below a surface of the sacrificial substrate, and the second trenches can be disposed below the first trenches. First sidewalls can connect the surface and the first trenches, and the first sidewalls can be angled with respect to the surface and the first trenches. Second sidewalls can connect the first trenches and the second trenches, and the second sidewalls can be angled with respect to the first trenches and the second trenches. Spring contact elements can reside upon the sacrificial substrate. Each of the spring contact elements can have a first portion disposed on the surface, a second portion disposed on one of the first trenches, and a third portion disposed on one of the second trenches.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: October 13, 2009
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Igor Y. Khandros, Gaetan L. Mathieu
  • Self-Referencing Voltage Regulator
    Publication number: 20090251123
    Abstract: A voltage regulator includes an input terminal for receiving a power input having a first voltage level, and an output terminal for generating a power output. A reference signal having a second voltage level is derived from the first voltage level adjusted with a predetermined offset value for controlling the power output to be at a third voltage level proportional to the second voltage level.
    Type: Application
    Filed: July 3, 2008
    Publication date: October 8, 2009
    Applicant: FormFactor, Inc.
    Inventors: Roy John Henson, Harry Joe Tabor
  • Method and apparatus for calibrating and/or deskewing communications channels
    Patent number: 7595629
    Abstract: A series of pulses may be driven down each drive channel, which creates a series of composite pulses at the output of the buffer. Each composite pulse is a composition of the individual pulses driven down the drive channels. Timing offsets associated with the drive channels may be adjusted until the individual pulses of the composite pulse align or closely align. Those timing offsets calibrate and/or deskew the drive channels, compensating for differences in the propagation delays through the drive channels. The composite pulse may be feed back to the tester through compare channels, and offsets associated with compare signals for each compare channel may be aligned to the composite pulse, which calibrates and/or deskews the compare channels.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: September 29, 2009
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Method and system for designing a probe card
    Patent number: 7593872
    Abstract: A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to their respective design specifications. These verification packages further consist of drawing files visually describing the final design and verification files confirming wafer bonding pad data. Verification packages are reviewed and forwarded to an applications engineer after customer approval. An interactive simulation of probe card performance is also provided.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: September 22, 2009
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Mark W. Brandemuehl, Stefan Graef, Yves Parent
  • Apparatus and method for managing thermally induced motion of a probe card assembly
    Patent number: 7592821
    Abstract: A probe card assembly can include a probe head assembly having probes for contacting an electronic device to be tested. The probe head assembly can be electrically connected to a wiring substrate and mechanically attached to a stiffener plate. The wiring substrate can provide electrical connections to a testing apparatus, and the stiffener plate can provide structure for attaching the probe card assembly to the testing apparatus. The stiffener plate can have a greater mechanical strength than the wiring substrate and can be less susceptible to thermally induced movement than the wiring substrate. The wiring substrate may be attached to the stiffener plate at a central location of the wiring substrate. Space may be provided at other locations where the wiring substrate is attached to the stiffener plate so that the wiring substrate can expand and contract with respect to the stiffener plate.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: September 22, 2009
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Eric D. Hobbs, Gaetan L. Mathieu, Makarand S. Shinde, Alexander H. Slocum, A. Nicholas Sporck, Thomas N. Watson
  • METHOD AND APPARATUS FOR PROCESSING FAILURES DURING SEMICONDUCTOR DEVICE TESTING
    Publication number: 20090235131
    Abstract: Methods and apparatus for processing failures during semiconductor device testing are described. Examples of the invention can relate to testing a device under test (DUT). Fail capture logic can be provided, coupled to test probes and memory, to indicate only first failures of failures detected on output pins of the DUT during a test for storage in the memory.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Applicant: FORMFACTOR, INC.
    Inventor: Todd Ryland Kemmerling
  • Method And Apparatus For Designing A Custom Test System
    Publication number: 20090224793
    Abstract: Methods, apparatus, and computer readable media for designing a custom test system are described. Examples of the invention can relate to a method of generating test system software for a semiconductor test system. In some examples, a method can include obtaining a configuration of the semiconductor test system, the configuration including a description of a device under test (DUT) and a description of test hardware; and generating an application programming interface (API) specific to the configuration of the semiconductor test system, the API being generated based on the description of the DUT and the description of the test hardware, the API providing a programming interface between the test system software and the test hardware to facilitate testing of the DUT.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 10, 2009
    Applicant: FormFactor, Inc.
    Inventor: Todd Ryland Kemmerling
  • Isolation buffers with controlled equal time delays
    Patent number: 7586300
    Abstract: A system is provided for controlling the delay in an isolation buffer. Multiple such isolation buffers are used to connect a single signal channel to multiple lines and controlled to provide an equal delay. Isolation buffer delay is controlled to be uniform by varying either power supply voltage or current. A single delay control circuit forming a delay-lock loop supplies the delay control signal to each buffer to assure the uniform delay. Since controlling delay can also vary the output voltage of each isolation buffer, in one embodiment buffers are made from two series inverters: one with a variable delay, and the second without a variable delay providing a fixed output voltage swing. To reduce circuitry needed, in one embodiment an isolation buffer with a variable power supply is provided in a channel prior to a branch, while buffers having a fixed delay are provided in each branch.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: September 8, 2009
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Probing structure with fine pitch probes
    Patent number: 7583101
    Abstract: A microelectronic resilient structure can comprise a support member and a platform attached to the support member. The platform can comprise a non-conductive, resilient beam that extends away from the support member, and a plurality of conductive members can be disposed on the beams. The conductive members can extend along a length of the beam. A plurality of conductive contact elements can be disposed on the beam and electrically connected to one of the conductive members.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: September 1, 2009
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Microelectronic spring contact elements
    Patent number: 7579269
    Abstract: Spring contact elements are fabricated by depositing at least one layer of metallic material into openings defined in masking layers deposited on a surface of a substrate which may be an electronic component such as an active semiconductor device. Each spring contact element has a base end, a contact end, and a central body portion. The contact end is offset in the z-axis (at a different height) and in at least one of the x and y directions from the base end. In this manner, a plurality of spring contact elements are fabricated in a prescribed spatial relationship with one another on the substrate. The spring contact elements make temporary (i.e., pressure) or permanent (e.g., joined by soldering or brazing or with a conductive adhesive) connections with terminals of another electronic component to effect electrical connections therebetween.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: August 25, 2009
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Igor Y. Khandros, Gaetan L. Mathieu, David V. Pedersen
  • Probe structures with physically suspended electronic components
    Patent number: 7579856
    Abstract: A probe apparatus can include a substrate, a contact structure attached to the substrate, and an electronic component electrically connected to the contact structure. The electronic component can be attached to the contact structure.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: August 25, 2009
    Assignee: FormFactor, Inc.
    Inventors: Igor Y. Khandros, John K. Gritters
  • Method of fabricating segmented contactor
    Patent number: 7578057
    Abstract: A method of fabricating a large area, multi-element contactor. A segmented contactor is provided for testing semiconductor devices on a wafer that comprises a plurality of contactor units mounted to a substrate. The contactor units are formed, tested, and assembled to a backing substrate. The contactor units may include leads extending laterally for connection to an external instrument such as a burn-in board. The contactor units include conductive areas such as pads that are placed into contact with conductive terminals on devices under test.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: August 25, 2009
    Assignee: FormFactor, Inc.
    Inventors: Mohammad Eslamy, David V. Pedersen, Harry D. Cobb
  • Probe card cooling assembly with direct cooling of active electronic components
    Patent number: 7579847
    Abstract: A probe card cooling assembly for use in a test system includes a package with one or more dies cooled by direct cooling. The cooled package includes one or more dies with active electronic components and at least one coolant port that allows a coolant to enter the high-density package and directly cool the active electronic components of the dies during a testing operation.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: August 25, 2009
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller