Abstract: According to an embodiment of the invention, a network device such as a router or switch provides efficient data packet handling capability. The network device includes one or more input ports for receiving data packets to be routed, as well as one or more output ports for transmitting data packets. The network device includes an integrated port controller integrated circuit for routing packets. The integrated circuit includes an interface circuit, a received packets circuit, a buffer manager circuit for receiving data packets from the received packets circuit and transmitting data packets in one or more buffers and reading data packets from the one or more buffers. The integrated circuit also includes a rate shaper counter for storing credit for a traffic class, so that the integrated circuit can support input and/or output rate shaping.

Abstract: A global server load balancing (GSLB) switch serves as a proxy to an authoritative DNS communicates with numerous site switches which are coupled to host servers serving specific applications. The GSLB switch receives from site switches operational information regarding host servers within the site switches neighborhood. When a client program requests a resolution of a host name, the GSLB switch, acting as a proxy of an authoritative DNS, returns one or more ordered IP addresses for the host name. The IP addresses are ordered using metrics that include the information collected from the site switches. In one instance, the GSLB switch places the address that is deemed “best” at the top of the list.

Abstract: A method of allocating power to ports in an Ethernet switch, including: (1) assigning a configuration power to a selected port, wherein the assigned configuration power is less than a power supplied by the selected port to a powered, (2) enabling and powering the selected port in a single indivisible step, (3) determining the power limit of a device coupled to the selected port, (4) comparing the power supplied by the selected port to the device with the configuration power assigned to the selected port, and (5) if the power supplied by the selected port to the device is greater than the configuration power assigned to the selected port, then increasing the configuration power of the selected port to correspond with the power limit of the device.

Abstract: A smoothing algorithm for round trip time (RTT) measurements is provided to a network device to effectively deal with variations or other potential anomalies that may occur in RTT measurements. The algorithm involves: first determining what should be considered a very high or a very small value for a RTT sample. If a new RTT sample is in an acceptable range, then the network device performs a relatively basic smoothing. If the new RTT sample is much higher than a current RTT value, then the network device ignores the value of this RTT sample a few times. If the network device still detects this large value after ignoring that value for some time, then the network device factors this value into the current RTT value using an additive increase. Similarly, if the value of the new RTT sample is much lower than current RTT value, the network device ignores the value of the new RTT sample a few times.

Abstract: A routing system utilizes a layer 2 switch interconnecting several routers to intelligently forward multicast packets throughout an internet exchange carrying multicast content. The layer 2 switch performs protocol snooping to extract a lookup key that is based on network layer protocol information. The lookup key is uniquely formulated to support either shared or explicit source distribution trees. The lookup key is used to query a forwarding memory that returns an outgoing port index. The outgoing port index points to one or more outgoing ports that are eligible to receive the multicast packet. The outgoing ports are also connected to the neighboring device(s) that are designated to receive the multicast packet. The routing system also supports real time maintenance and updating of the forwarding memory based on the periodic exchange of control messages. The routing system is configured to support PIM routers operating in PIM SM or PIM SSM modes.

Abstract: A method for supporting dynamic configuration changes comprises receiving a message from a current root bridge, comparing a bridge media access control (MAC) address of a receiving port to a bridge MAC address of the received message, if the bridge MAC addresses are not the same, then comparing a current priority value with a previous priority value of the current root bridge, determining if the receiving port is a qualified root port, and if the port is a qualified root port, then returning a superior designated message to execute an RSTP calculation.

Abstract: A technique to load balance network packet traffic using content switching is provided. Packets are routed to a particular server or otherwise processed based on the HTTP header content of the packets. In an embodiment, the HTTP header contents of the packets are used in such processing. Content switching decisions are based on any field in the HTTP header, including both known and unknown fields. A plurality of content switching policies is provided. A policy includes a set of rules and actions associated with these rules. Complex nested rules are defined. The evaluation of these nested rules is simplified by converting the nested rules in to their sum of products or minterm representations, and then a bit mask technique is used in conjunction with the minterm representations to determine which set of complex rules in a policy is valid and thus require the corresponding content switching action.

Abstract: A switching fabric having cross points that process multiple stripes of serial data. Each cross point includes a plurality of port slices and ports. Each port includes a plurality of FIFOs, a FIFO read arbitrator, a multiplexer, a dispatcher, and an accumulator. In one embodiment, each cross point has eight ports and eight port slices. A method for processing a stripe of data at a cross point at one port slice includes storing data received from other port slices in a plurality of FIFOs and arbitrating the reading of the stored data. A step of writing data received from a port at the one port slice to an appropriate FIFO in a different port slice is also included. In one embodiment, a method for processing data in port slice based on wide cell encoding and an external flow control command is provided.

Abstract: High-speed transceiver devices, such as GBIC-type transceivers, are accessed and addressed. Identification information (including manufacturer name, model, compliance codes) is placed in data fields of the transceivers. An algorithm checks each port in each module of a host system to determine if a transceiver is present. If a particular transceiver is present, then algorithms store the port address of the transceiver in memory and enable the transceiver to be read from or written to. Reading from the transceiver includes reading the identification information, and writing to the transceiver includes writing the identification information. If a transceiver is initially determined not to be present or if the reading/writing/enabling processes fail, then a recovery process determines if the transceiver was present the last time it was checked. If it was present the last time, then the process continues to try to recover the transceiver data—otherwise, the port is marked as empty.

Abstract: A system and method for dynamically managing a plurality of power supplies for a computer system has a plurality of first circuits, each of the first circuits responsive to an electrical condition of each of the plurality of power sources. A second circuit is coupled to the plurality of first circuits, and is responsive to the plurality of first circuits. The second circuit identifies a state associated with any one of the plurality of power sources. A third circuit is coupled and responsive to the second circuit. The third circuit communicates the states of the plurality of power source to a user.

Abstract: Dynamic rate limiting adjustment may be provided by sampling actual output rates from a rate limited device and utilizing this information to modify configured traffic limits. This allows the device to achieve actual output rates much closer to the desired rate limits for users and services.

Abstract: A housing for an electronic device has a first volume bounded by a first face and a second volume bounded by a second face. The second face is indented from the first face. A plurality of electronic components are housed in the first volume, and one or more power supplies are housed in the second volume. The electronic components are operable to be powered by a coupling to the one or more power supplies, the coupling running between the indented second face and the first face.

Abstract: A configurable timer may be used for seamless authentication administration. A network administrator may set the timer value. Then the network administrator may begin to update the authentication configuration or key and the timer may begin to count down. While the timer counts down, the network device may still send outgoing packets using the old authentication configuration or key and may begin to authenticate incoming packets using both the old authentication configuration or key and the new authentication configuration or key. Once it expires, the network device may begin to send outgoing packets using just the new authentication configuration or key. The counter may then be reset and counted down again. Once the counter expires a second time, the new authentication configuration or key may be used for both incoming and outgoing packets. Two-timer implementations are also possible.

Abstract: The system of the present invention provides data transmission speeds at or in excess of 10 gigabits per second between one or more source devices and one or more destination devices. The system comprises a media access control (MAC) interface to facilitate receipt and transmission of packets over a physical interface. A first field programmable gate array is coupled to the MAC interface and operative to receive packets from the MAC interface and configured to perform initial processing of packets, which are dispatched to a first memory. A second field programmable gate array is operative to retrieve packets from the first memory and configured to compute an appropriate destination, which is used to dispatch packets to a backplane. A third field programmable gate array is provided that is operative to receive packets from the backplane and configured to organize the packets for transmission, which are dispatched to a second memory.

Abstract: A global server load-balancing (GSLB) switch serves as a proxy to an authoritative DNS and communicates with numerous site switches that are coupled to host servers serving specific applications. The GSLB switch receives from site switches operational information regarding host servers within the site switches neighborhood. When a client program requests a resolution of a host name, the GSLB switch, acting as a proxy of an authoritative DNS, returns one or more ordered IP addresses for the host name. The IP addresses are ordered using metrics that include the information collected from the site switches. In one instance, the GSLB switch places the address that is deemed “best” at the top of the list.

Abstract: A vent for a computer enclosure is envisioned. The vent system has a fan, operable to draw a flow of air from within the enclosure and direct it out through an outlet vent disposed in a wall of the enclosure. The outlet vent is made of an outlet path. The outlet path is defined by a first and a second side member. The first and second side members are attached to the enclosure and form an environmental seal. The outlet vent also has an outlet face oriented at a first angle relative to the wall. A plurality of slats are rotatably coupled to the outlet face. The plurality of slats maintain a first position when the fan is not operating. When the fan goes into an operational mode and produces an airflow, the plurality of slats swing radially outward to a second position. The plurality of slats return to the first position when the airflow is not present. The angle of the slats in the first position is nearer to parallel to the first angle than when in the second position.

Abstract: A backplane interface adapter for a high-performance network switch. The backplane interface adapter receives narrow input cells carrying packets of data and outputs wide striped cells to a switching fabric. One traffic processing path through the backplane interface adapter includes deserializer receivers, a traffic sorter, wide cell generators, stripe send queues, a backplane transmit arbitrator, and serializer transmitters. Another traffic processing path through the backplane interface adapter includes deserialize receivers, a stripe interface, stripe receive synchronization queues, a controller, wide/narrow cell translator, destination queues, and serializer transmitters. An encoding scheme for packets of data carried in wide striped cells is provided.

Abstract: A rackmount chassis includes removable supports that provide interior support for blades having mounting edge-to-mounting edge dimensions that are less than the full chassis width. The removable supports are mounted on parallel support plates that span the full width of the chassis. Each removable support supports an edge of at least one blade installed into the rackmount chassis. The locations of the removable supports on the parallel support plates determine the blade form factors (mounting edge-to-mounting edge dimensions) that the rackmount chassis can accept. Because the removable supports can be individually removed/installed, the configuration of the resulting rackmount component can be changed without physically removing the rackmount component from the rack in which it is mounted.

Abstract: Systems and methods are described for providing network route redundancy through Layer 2 devices, such as a loop free Layer 2 network having a plurality of switching devices. A virtual switch is coupled to the loop free Layer 2 network, the virtual switch having two or more switches configured to transition between master and backup modes to provide redundant support for the loop free Layer 2 network, the switches communicating their status through use of a plurality of redundancy control packets. The system also includes means for allowing the redundancy control packets to be flooded through the Layer 2 network. The means may include time-to-live data attached to the redundancy control packet which is decremented only when the packets are transferred through devices which are configured to recognize the protocol used in redundancy control packets.

Abstract: The present invention provides a high-performance network switch. A digital switch has a plurality of blades coupled to a switching fabric via serial pipes. Serial link technology is used in the switching fabric. Each blade outputs serial data streams with in-band control information in multiple stripes to the switching fabric. The switching fabric includes a plurality of cross points corresponding to the multiple stripes. In one embodiment five stripes and five cross points are used. Each blade has a backplane interface adapter (BIA). One or more integrated bus translators (IBTs) and/or source packet processors are coupled to a BIA. An encoding scheme for packets of data carried in wide striped cells is provided.