Abstract: A signal amplifier circuit includes a negative feedback amplifier circuit having an output terminal, a first voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a second voltage limiting device for limiting the output voltage from the negative feedback amplifier circuit, a first reference voltage supply applying a first reference voltage to the first voltage limiting device, a second reference voltage supply applying a second reference voltage to the second voltage limiting device. The first voltage limiting device is configured to fix a lower limit saturation voltage at the first reference voltage. The second voltage limiting device is configured to fix an upper limit saturation voltage at the second reference voltage.

Abstract: A DC-DC converter, which controls the output voltage supplied to a load at a desired magnitude by performing on/off control of the input voltage using a switch, includes: an error amplifier for outputting the difference voltage between the output voltage and a preset reference voltage; and a plurality of phase compensation circuits for compensating the phase of the output voltage fed back to the error amplifier with different characteristics, whereby the DC-DC converter is configured such that changes in either the input voltage or in the load current flowing into the load are detected, and switching between the plurality of phase compensation circuits is performed. The frequency characteristic of each of the phase compensation circuits is determined for each of a plurality of demarcated fluctuation ranges of the input voltage or the load current.

Abstract: A semiconductor device includes a semiconductor substrate which has first and second principal surface regions; an insulated gate structure which is formed in the first principal surface region; a back surface region semiconductor layer which is formed in the second principal surface region and has a thickness of at most 5 ?m; an outermost metal film; and a back surface electrode which is formed in the second principal surface region between the back surface region semiconductor layer and the outermost metal film and which is composed of a plurality of films which are laminated and include a stress relaxation film so that false judgment of chip quality based on leakage current measurements during manufacturing is reduced particularly when dust is present and skews leakage current measurements due to strain on the wafer and the piezoelectric effect produced.

Abstract: An object of the present invention is to provide a method of manufacturing a glass substrate containing alkali metals. A glass substrate manufactured by the method exhibits excellent performances including durability by virtue of suppressing elution of alkali metals. A method comprises a step of immersing a glass material in an aqueous solution containing a formate to suppress elution of component of the glass material.

Abstract: A DC-DC converter includes a series circuit of a main switch and a choke coil and an output capacitor connected to one end of the series circuit and outputs a DC voltage from the one end of the series circuit. A first MOS transistor is connected in parallel to the series circuit and a second MOS transistor is connected in parallel to the output capacitor. A control circuit controls the gate voltages of the first MOS transistor and/or the second MOS transistor so that the first MOS transistor and/or the second MOS transistor outputs a changed target output voltage, whereby the output voltage is made equal to the target voltage at high speed.

Abstract: A semiconductor device includes a substrate, at least one semiconductor element mounted on the substrate, a resin housing for housing the semiconductor element, the resin housing having a cover thereon, at least one pin provided and standing in the resin housing, and at least one printed substrate disposed inside the resin housing or outside the resin housing. The printed substrate and the cover of the resin housing are positioned by the pin.

Abstract: The method of manufacturing a semiconductor device includes forming a p-type anode layer and an anode electrode on one major surface of an n-type semiconductor substrate, irradiating an electron beam to the semiconductor substrate to introduce crystal defects into the semiconductor substrate, grinding the other major surface of semiconductor substrate to reduce the thickness the semiconductor substrate, implanting phosphorus ions from the exposed surface of semiconductor substrate, and irradiating pulsed YAG laser beams by the double pulse technique to the exposed surface, from which the phosphorus ions have been implanted, to activate the implanted phosphorus atoms and to recover the region extending from the exposed surface irradiated with the YAG laser beams to the depth corresponding to 5 to 30% of the total wafer thickness from the defective state caused by the crystal defects introduced therein.

Abstract: In producing a semiconductor device, a solder alloy is prepared to contain antimony in a range of from 3 to 5 wt %, a trace amount of germanium, and a balance of tin. An insulative substrate having conductor patterns on both surfaces thereof is prepared, and a heat sink plate is mounted on a back surface of the insulative substrate by a soldering process using the solder alloy at a temperature ranging from 310 C.° to 320 C.° in a hydrogen reducing furnace. A semiconductor chip is mounted on a front surface of the insulative substrate.

Abstract: A method of plating on a glass substrate allowing an electroless plating film with good adhesiveness to be formed by chemically bonding a silane coupling agent in a state of simple adhesion or hydrogen bond to the surface of the glass substrate through dehydration condensation reaction, and a method of manufacturing a magnetic recording medium using the plating method. In the plating method, electroless plating is performed on a glass substrate after sequentially conducting at least the adhesion layer formation that forms an adhesion layer using a silane coupling agent solution, catalyst layer formation, a catalyst activation, and a drying that chemically bonds the silane coupling agent in the adhesion layer to the surface of the glass substrate.

Abstract: A semiconductor device includes a solder dam for restricting the flow of solder during manufacturing. The device includes a semiconductor chip bonded to a first side of a circuit board, a metal base for dissipating heat produced by the semiconductor chip, the metal base being bonded to a second side of the circuit board, and a dam material disposed on the metal base in a predetermined pattern for restricting the flow of solder used in bonding a plurality of the circuit boards to the metal base. By employing the solder dam, solderability is not impaired, device contamination can be avoided, and a highly reliable semiconductor device can be produced.

Abstract: A switching power supply, in which a switching element turns on and off electric current flowing on the primary side of an output transformer so as to rectify and output a pulsating flow generated on the secondary side of the output transformer, includes a voltage detecting section that detects an output voltage, a current detecting section that detects electric current flowing through a power transistor as the switching element, a controller that compares a voltage detection signal from the voltage detecting section and a current detection signal from the current detecting section to control the duty of the power transistor during an ON time, and a slope compensation circuit that compensates the rate of change of the voltage detection signal using a slope compensation signal. The slope compensation circuit subtracts the slope compensation signal from the voltage detection signal and outputs the resulting signal to a PWM comparator.

Abstract: A gallium nitride semiconductor device is disclosed that can be made by an easy manufacturing method. The device includes a silicon substrate, buffer layers formed on the top surface of the silicon substrate, and gallium nitride grown layers formed thereon. The silicon substrate has trenches 12 formed from the bottom surface, each trench having a depth reaching the gallium nitride grown layer through the silicon substrate and the buffer layers. The inside surface of each of the trenches and the bottom surface of the silicon substrate is covered with a drain electrode as a metal film. The vertical gallium nitride semiconductor device with this structure allows an electric current to flow in the direction of the thickness of the silicon substrate regardless of the resistance values of the gallium nitride grown layers and the buffer layers.

Abstract: A semiconductor device having a low on resistance and high integration level with respect to the surface area of a substrate is provided. In the semiconductor device, a first trench, a second trench, and a third trench are provided in an element formation region provided on a semiconductor substrate. Metal is deposited within the first trench and second trench, to form a drain electrode and a source electrode, respectively. Polysilicon is deposited inside the third trench with a gate insulating film intervening, and a gate electrode is formed.

Abstract: A level shift circuit and a semiconductor device are configured to prevent failure and malfunction even when an excessive negative voltage or ESD surge are applied to a high-voltage power supply terminal. The level shift circuit includes a level shift resistor, a current-limiting resistor connected in series to the level shift resistor, and an n-channel MOSFET, with its drain connected to the current-limiting resistor. An output of the level-up circuit is obtained from the positioned between the level shift resistor and the current-limiting resistor. By providing the current-limiting resistor, the current that flows due to an excessive negative voltage or ESD surge is suppressed to prevent the level shift circuit from failing or malfunctioning.

Abstract: A super-junction semiconductor substrate is configured in such a manner that an n-type semiconductor layer of a parallel pn structure is opposed to a boundary region between an active area and a peripheral breakdown-resistant structure area. A high-concentration region is formed at the center between p-type semiconductor layers that are located on both sides of the above n-type semiconductor layer. A region where a source electrode is in contact with a channel layer is formed over the n-type semiconductor layer. A portion where the high-concentration region is in contact with the channel layer functions as a diode. The breakdown voltage of the diode is set lower than that of the device.

Abstract: A perpendicular magnetic recording medium is disclosed that exhibits reduced media noise and enhanced thermal stability of recorded magnetization, and thus provides a medium of high recording density and excellent read-write performance. The perpendicular magnetic recording medium comprises a magnetic film on a nonmagnetic substrate. The magnetic film is a multilayered lamination film composed of alternately laminated first magnetic layers of cobalt and second magnetic layers of palladium, the second magnetic layers containing SiO2. By setting a ratio of Ku2 to Ku to a value not smaller than a specified value, the compatibility between the ease of writing-in to the perpendicular magnetic recording medium by a head and the thermal stability of recorded magnetization is more improved.

Abstract: A magnetic recording medium for thermally assisted recording is disclosed which achieves both high density writing and good control of temperature characteristics. The magnetic recording medium for thermally assisted recording comprises an underlayer, a magnetic recording layer, and a protective layer sequentially laminated on a nonmagnetic substrate. The magnetic recording layer has a structure composed of two magnetic layers and an exchange coupling control layer inserted between the magnetic layers, the two magnetic layers being magnetically coupled through the exchange coupling control layer. The coupling energy Jw in the process of writing a signal and the coupling energy Jr in the state of retaining a signal satisfy a relation 0<Jw<Jr.

Abstract: A current-mode switching power supply is provided, in which there is no unstable operation arising from the fact that signals to generate PWM signals are minute, even when a load is light and a switching frequency is high. In a switching power supply of this invention, an added slope signal is superposed in an early stage of a rise of a current detection signal, so that a combined signal Vsig is caused to reach a certain magnitude even when the load is light and the switching frequency is high, and consequently an output FB of an error amplifier ERRAMP which is balanced with the combined signal is also increased. By this means, even in a current mode, it is possible to eliminate unstable operation arising from the fact that the feedback signal FB which is the output of the error amplifier ERRAMP and the combined signal Vsig are minute.

Abstract: A temperature measurement device of a power semiconductor device includes a plurality of temperature detecting diodes formed on a first chip having a power semiconductor device; and a detection circuit that is formed on a second chip having an integrated circuit that controls the power semiconductor device and is connected to the temperature detecting diodes; wherein the detection circuit detects a temperature of the power semiconductor device based on a difference between the forward voltages of the temperature detecting diodes when different values of current flow to the respective temperature detecting diodes.