Patents Assigned to Fujitsu
  • Patent number: 8797750
    Abstract: A first metal sheet and a second metal sheet are arranged opposite a printed circuit board including a second connector that fits into a first connector that is arranged at one end of a cable. A hole section through which the first connector passes is arranged in each of the first metal sheet and the second metal sheet. The first connector fits into the second connector by passing through each of the hole sections of the first metal sheet and the second metal sheet. The first metal sheet and the second metal sheet support a connector case of the first connector, thus improving the load bearing characteristics of the cable connection.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventors: Hideki Maeda, Akira Shimasaki
  • Patent number: 8799798
    Abstract: Methods and systems for providing navigation assistance on a mobile device are provided. A method may include analyzing handwriting data to recognize one or more objects depicted in the handwriting data. The method may further include determining if one or more applications are associated with the handwriting data based on the one or more objects recognized in the handwriting data. If one application is determined to be associated with the handwriting data, the one application may be launched. If two or more applications are determined to be associated with the handwriting data, information allowing a user to select an application to launch from the two or more applications may be displayed.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Hidenobu Ito
  • Patent number: 8797076
    Abstract: A duty ratio correction circuit, includes: a frequency divider configured to output a second clock signal having a first level that is inverted at a timing of a first edge of a first clock signal and a third clock signal having a second level that is inverted at a timing of a second edge of the first clock signal; phase interpolator configured to generate a fourth clock signal and a fifth clock signal based on phase interpolation of any two of the second clock signal, the third clock signal, a first inverted signal that is obtained by inverting the second clock signal, or a second inverted signal that is obtained by inverting the third clock signal; and a multiplier configured to output an exclusive OR signal of the fourth clock signal and the fifth clock signal as a sixth clock signal.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Masaya Kibune
  • Patent number: 8794998
    Abstract: A switching hub device includes a connector group including a plurality of connectors, the plurality of connectors each having a hole to insert a cable and including a locking unit to lock the cable inserted into the hole, a plurality of lock releasing members each to release the cable from the locking unit of each of the connectors by pressing a lock releasing unit provided in the cable, a supporting member to pivotally support each of the lock releasing members facing the lock releasing unit, and a handle having a fitting portion to fit with each of the lock releasing members supported by the supporting member, the handle gripping each of the lock releasing members fitted with the fitting portion.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventors: Koujiro Hashimoto, Yuuki Uragou
  • Patent number: 8798462
    Abstract: An optical packet switching system includes an optical packet generator for generating an optical packet signal, an optical packet switching unit, provided with an optical switch, for switching the route of an inputted optical packet signal by controlling on/off of the optical switch, and an optical signal-to-noise ratio measuring unit for measuring the optical signal-to-noise ratio of the optical packet signal outputted from the optical packet switching unit. When switching the route of the optical packet signal, the optical packet switching unit outputs an optical packet signal with optical noise by keeping the optical switch on longer than the time width of the packet signal. The optical signal-to-noise ratio measuring unit measures the optical signal power and the optical noise power, respectively, in the optical packet signal with optical noise and measures the optical signal-to-noise ratio by calculating the ratio between the optical signal power and the optical noise power.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Telecom Networks Limited
    Inventor: Shota Mori
  • Patent number: 8797763
    Abstract: A shield structure for an electronic element, includes a ground pattern provided in a board; and a first member having electrical conductivity, covering the electronic element, and connected with the ground pattern.
    Type: Grant
    Filed: January 13, 2011
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventors: Naomi Fukunaga, Hisashi Yoshinaga, Junichi Ogou, Naofumi Kosugi
  • Patent number: 8797098
    Abstract: A method may include applying an input differential voltage to input terminals of an amplifier, a first input terminal coupled to a gate of a first transistor and a second input terminal coupled to a gate of a second transistor. The method may also include varying a gain of the amplifier by varying at least one of: a resistance of a first resistor, the first resistor coupled between a source of the first transistor and a source of the second transistor; and a resistance of a second resistor, the second resistor coupled between a source of a third transistor and a source of a fourth transistor; wherein: the third transistor is coupled at its drain to the drain of the first transistor; and the fourth transistor is coupled at its drain to the drain of the second transistor and a gate of the third transistor and coupled at its gate to the drain of the third transistor.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventors: Shuo-Chun Kao, Nikola Nedovic
  • Patent number: 8797140
    Abstract: According to an aspect of an embodiment, a method comprises, storing information corresponding to a plurality of users in association with first reference biometric data and second reference biometric data, the users being divided into first and second groups, the quality of the first reference biometric data of each of the users in the first group being not less than a predetermined level, the quality of the first reference biometric data of each of the users in the second group being less than the predetermined level, obtaining first biometric data of a user by inputting first biometric information of the user, providing first authentication, obtaining second biometric data of a user by inputting second biometric information of the user when the first authentication indicates presumed matching of the first biometric data with the first biometric reference data of one of the users in the second group and providing second authentication.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Takashi Shinzaki
  • Patent number: 8798948
    Abstract: A non-transitory computer-readable recording medium stores a magnetic program causing a computer to perform an exchange coupling energy calculating process including interpolating a rotation angle between two magnetization vectors disposed at the respective centers of two adjacent elements used in a finite volume method with reference to a rotation axis perpendicular to the two magnetization vectors, and calculating a magnetic exchange coupling field by integrating a magnetic field acting as a force exerted on the two magnetization vectors with the interpolated rotation angle.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Koichi Shimizu
  • Patent number: 8797427
    Abstract: An image processing apparatus includes, a color correction unit performing color correction on RGB signals to generate color-corrected RGB signals; a YC conversion unit converting the color-corrected RGB signals into a first luminance signal and a color-difference signal; a Y conversion unit generating a second luminance signal based on the RGB signals; an edge combination unit combining the first luminance signal with the second luminance signal; an edge adjustment unit obtaining an edge-adjusted signal based on a result of the combining by the edge combination unit; and an adder adding the first luminance signal to the edge-adjusted signal.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Norihiko Tsutsumi, Masafumi Sei
  • Patent number: 8798466
    Abstract: An optical packet switching system includes: an optical packet switching device configured to route and output an input optical packet signal; an optical amplifier device provided in a stage subsequent to the optical packet switching device; and a control signal generation unit configured to superimpose a noise component on the optical packet signal by inducing cross talk in the optical packet switch.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Telecom Networks Limited
    Inventor: Reiko Sato
  • Patent number: 8799708
    Abstract: An information processing apparatus determines an abnormal unit by: determining whether or not there is an abnormal point in access to a slave unit by a first master unit that controls a plurality of slave units connected by a serial bus; requesting a second master unit having redundancy with the first master unit to access a specific slave unit when the abnormal point is determined to exist in access to the specific slave unit in the determining; and determining a unit having an abnormality by use of an access result relating to the abnormal point determined to have an abnormality in the determining and an access result indicating a result of the request made in the requesting.
    Type: Grant
    Filed: January 10, 2012
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Shigeo Kojina
  • Patent number: 8797085
    Abstract: A first conversion circuit converts a first clock signal based on a signal level of a first voltage into a second clock signal based on a signal level of a second voltage. A flip-flop circuit supplied with the first voltage as an operation voltage latches and outputs a signal, which is based on the signal level of the first voltage, in accordance with the first clock signal. A second conversion circuit supplied with the second voltage as an operation voltage converts a signal level of an input signal, which is based on an output signal of the flip-flop circuit, into the signal level of the second voltage in synchronization with the second clock signal.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoya Kakamu, Hisao Suzuki, Yuji Sekido
  • Patent number: 8797976
    Abstract: A computer of a first node executes primary communication and secondary communication between a first node group and a second node group provided with nodes. On the basis of the transmission capabilities of a network, the computer computes the required time required to transmit data that has been designated as outgoing data since the start time of a periodically executed transmission process up until the current time, wherein the designated data is data from among the received data that has been successively designated as outgoing data. The computer determines whether or not the time equal to the current time plus the required time matches the start time of the primary communication periodically conducted between the nodes. On the basis of the determined results, the computer decides which data from among the received data to designate as outgoing data.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Kazuki Hyoudou
  • Patent number: 8799699
    Abstract: Each of a plurality of master devices outputs a speed grade signal indicating a data transfer speed with a data transfer request. An arbiter arbitrates transfer requests and speed grade signals from the plurality of master devices. A clock enable generation circuit generates a clock enable signal with a varying ratio of a valid level according to the speed grade signal arbitrated by the arbiter. A slave device operates upon receiving a clock signal when the clock enable signal is at the valid level, and transfers data according to the transfer request arbitrated by the arbiter. Accordingly, the frequency of the clock signal which causes the slave device to operate may be changed for each transfer request, and a fine control of the power of the slave device may be easily performed. As a result, power consumption of the data processing system may be finely controlled.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Akinori Hashimoto
  • Patent number: 8797734
    Abstract: An electronic apparatus has a trapezoidally shaped first housing having a first side portion, a second side portion, slanted side portions, a bottom surface portion, and a top surface portion, the second side portion having a width smaller than a width of the first side portion and being parallel to the first side portion, the slanted side portions connecting end points of the first side portion with respective end points of the second side portion. The electronic apparatus has a second housing and a connecting portion connecting the first side portion of the first housing with the second housing such that the second housing is capable of being opened and closed with respect to the top surface portion of the first housing.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventors: Katsuichi Goto, Kaito Tanaka, Hiroyuki Fujita, Kazuhiro Fujiwara
  • Patent number: 8798568
    Abstract: A signal transmission method suppresses a reflected wave of a transmission signal on a transmission line, by obtaining level and time information related to the reflected wave by computing a correlation between a data pattern of the transmission signal and the reflected wave, and correcting a waveform of the transmission signal based on the level and time information related to the reflected wave.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Masaya Kibune
  • Patent number: 8798413
    Abstract: The optical waveguide device includes a first optical coupler which branches input light and outputs first signal light and second signal light, an optical phase shifter including a first and a second optical waveguides of optical path lengths different from each other and giving a phase difference between the first signal light and the second signal light, and the second optical coupler coupling the first signal light outputted from the first optical waveguide and the second signal light outputted from the second optical waveguide. The first optical waveguide and the second optical waveguide have the same waveguide width and have optical waveguides bent with substantially the same radius of curvature.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Limited
    Inventor: Seok-Hwan Jeong
  • Patent number: 8798163
    Abstract: A video decoder includes a storage unit that stores therein vector data; and a video generating unit that, when an input stream is abnormal, generates based on data before the input stream became abnormal and the vector data stored in the storage unit, an image that is an image displayed using the data before the input stream became abnormal and to which motion has been added.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: August 5, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Sho Nishikawa
  • Publication number: 20140215483
    Abstract: A memory allocation/free replacing unit hooks a call of a memory allocating/freeing unit. The memory allocation/free replacing unit generates information required for totalization of a dynamically used memory amount, writes the generated information to a log file, and calls the memory allocating/freeing unit to perform memory allocation and free. A totalization processing unit loads the log file and totalizes a dynamically used memory amount for each dynamic library, for each function, or for each thread.
    Type: Application
    Filed: December 20, 2013
    Publication date: July 31, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Hideyuki Akimoto, Yuichiro Ajima, Kenichi Miura, Takayuki Okamoto, Tomoya Adachi, Shinji Sumimoto