Patents Assigned to Fujitsu
  • Publication number: 20020130164
    Abstract: There are provided a chamber having openings which are opened to an outer air and through which a solder-adhered object w is passed and having a heating/melting area and carrying areas arranged adjacent to the heating/melting area, a carrying mechanism for carrying the solder-adhered object w into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to lower a pressure in the heating/melting area rather than an outer air, heating means for heating directly or indirectly the solder-adhered object w in the heating/melting area, and air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas.
    Type: Application
    Filed: October 5, 2001
    Publication date: September 19, 2002
    Applicant: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui, Eiji Yoshida, Takao Ohno, Koki Otake, Akiyo Mizutani, Motoshu Miyajima, Masataka Mizukoshi, Eiji Watanabe
  • Patent number: 6450604
    Abstract: An ink drop is injected via a nozzle by changing drive voltages applied to a piezoelectric element to reduce the volume of a pressure chamber filled with ink, so that the injected ink drop hits upon a print medium to carry out printing. Upon injecting the ink drop via the nozzle, an injection timing of the ink drop is changed corresponding to a drive frequency of the drive voltages using a predetermined rule. The predetermined rule may be a table defined in terms of drive frequencies of the drive voltages and optimum injection timings of the ink drop corresponding to the drive frequencies.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Akira Iwaishi, Akihiko Miyaki, Takumi Kawamura, Masahiro Ono
  • Patent number: 6453349
    Abstract: A network system comprising terminals and relaying nodes having a reservation message processing unit for transferring a packet wherein a packet receiving terminal 3 requests a reservation of network resources. The packet receiving terminal 3 transmits to a packet transmitting terminal 1 a request message in which a reservation request condition is stored in order to request a resource reservation, the packet transmitting terminal 1 having received the request message transmits to the relaying node 2 on the same route as the packet an acknowledgement message in which the reservation request condition is stored. Each relaying node 2 provides a resource reservation for the home relaying node according to the reservation request condition in the acknowledgement message and transfers the acknowledgement message to the same route as the packet.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Shinya Kano, Akira Chugo
  • Patent number: 6452701
    Abstract: A supervisory system in a wavelength division multiplexing communications network is provided with a first and a second terminal stations and a repeater unit. The first terminal station transmits a supervisory signal to the second terminal station. The second terminal station transfers the supervisory signal to the repeater unit to be monitored. Paths to a hub station A and a hub station B can be a single path by looping back a supervisory signal output from the hub stations A and B for issuing and terminating the supervisory signal at a first and a second branch stations connected through an optical wavelength multiplexing/demultiplexing unit. If the hub station B loops back a supervisory signal, the supervisory signal output from the hub station A can be returned to the hub station A again after circulating the path.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Takafumi Terahara, Takeo Osaka, Shin-ichirou Harasawa
  • Patent number: 6452434
    Abstract: A phase shift circuit that generates a phase shift signal whose amplitude matches at a plurality of frequencies without increasing the circuit area. The phase shifter circuit includes first and second differential amplifiers which generate first and second first phase shift signals having a first amplitude at a first frequency. A third differential amplifier is connected in parallel to the first differential amplifier. The third differential amplifier generates a third phase shift signal having substantially the same amplitude as the first amplitude at a second frequency. The first differential amplifier is activated in accordance with the first frequency and the third differential amplifier is activated in accordance with the second frequency.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Kazuyoshi Arimura, Tsuyoshi Moribe
  • Patent number: 6450405
    Abstract: A differentiation signal DF differentiated by a differentiation unit is inputted to a slice level generation unit and to comparators. A first peak-hold circuit and a voltage division circuit generate a slice level having a slice ratio SLR that is constant to a peak value VDF of the differentiation signal DF. A second peak-hold circuit generates a slice level the slice ratio SLR of which changes in accordance with the peak value VDF. The slice level generation unit outputs their synthetic slice level SLL, which is compared by the comparators with the level of the differentiation signal DF, outputting thereby binarized signals W-GATE and B-GATE. When the level of the differentiation signal DF is high, the slice level SLL approaches the peak value VDF. Therefore, noise components contained in the differentiation signal DF cannot exceed the slice level SLL. When the level of the differentiation signal DF is low, the slice level SLL has a constant ratio to the peak value VDF.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu, Limited
    Inventors: Isao Iwaguchi, Hiroaki Kawai, Mitsuo Watanabe, Kozo Yamazaki
  • Patent number: 6450849
    Abstract: A fabricating method of a gas discharge display device having a dielectric layer spreading over an entire display area so as to cover electrodes arranged on a substrate, comprising arranging the electrodes on the substrate; and forming conformally the dielectric layer upon a surface of the substrate, on which the electrodes have been arranged, by the use of a plasma vapor deposition method. The fabricating method may further comprise forming a light shielding layer between the electrodes excluding at least the surface discharge gap within the display area before forming the dielectric layer.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventor: Hideki Harada
  • Patent number: 6452604
    Abstract: An interference checking apparatus approximates the shape of an object with an envelope figure, such as a rectangular parallelepiped, a sphere, etc., and checks static interference among many objects at high speed. In this static interference check, an approximate figure is projected into a space of a lower dimension, pairs of objects with a possibility of interference are focused on in stages, and the number of the pairs is reduced. Then, a precise interference check is performed for the remaining pairs.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventor: Yuichi Sato
  • Patent number: 6453455
    Abstract: There is provided an automatic wiring design apparatus comprising a designating unit for designating a line segment which is movable element; a specifying unit for specifying a first element whereat a first space between the first element and the line segment is smaller than a first distance; and a determining unit for determining a first position of the line segment to be shifted so that the first space satisfies the first distance. Therefore, if a barrier element specified by designating a line segment is an immovable element, the self-avoidance process by which the designated line segment can be moved is performed, so that the occurrence of a design-standard error can be avoided. The determining unit establishes the line segment as a been element, establishes the first element as a new element, and performs a pushing process for determining a position of the been element to be shifted relative to the new element to determine the first position of the line segment.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Tohru Kumada, Yukihiko Onishi, Eiichi Konno, Takao Yamaguchi
  • Patent number: 6452964
    Abstract: In the present invention, a modulation level estimation unit calculates the square error of the minimum value of distances between each signal point received at a modulation level ML and the signal point of a received signal at each modulation level ML. A received power measurement unit measures the received power level of the received signal. A modulation level estimation unit calculates the value obtained by multiplying the square error calculated at each modulation level ML, by a weighted calculation from both a threshold power level for switching the modulation level ML and the received power level as a likelihood value at each modulation level ML. Then, the modulation level estimation unit estimates a modulation level ML corresponding to the maximum likelihood value of all the likelihood values at the modulation level ML as a modulation level ML of the received signal, without transmitting any codewords on the used modulation level.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventor: Makoto Yoshida
  • Patent number: 6452739
    Abstract: A positioning device positions a driving unit of which a torque constant fluctuates depending on a position, whereby a proper quantization error is obtained even when a maximum current value in a movable range changes. The positioning device includes a position detector for detecting a present position of the drive unit, a control circuit for generating a digital drive command value corresponding to a positional error between a command position and a present position, a D/A converter for converting the digital drive command value into an analog voltage, and a driver, having a plurality of gains, for converting the analog voltage into the analog drive current with a selected gain. The control circuit selects the gain of the driver in accordance with the present position. The gain of the driver (voltage/current converting amplifier) is made variable and controlled corresponding to the position, and hence there is no necessity for covering the maximum current range with the digital command value.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshinori Hino, Hirofumi Ohsawa
  • Patent number: 6452879
    Abstract: An offset measuring unit receives a servo error signal E1 in which a change in an offset caused by a change in an amount of reflection light directly appears and which does not pass through a filter, and measures an offset amount in the servo error signal which is caused by a change in the amount of reflection light. A correction amount calculating unit calculates a correction amount to cancel out the offset amount and outputs the correction amount to an offset correcting circuit for an offset generating period so as to perform correction.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Wataru Tsukahara, Shigenori Yanagi, Toru Ikeda, Masatsugu Nishida
  • Patent number: 6453369
    Abstract: A data storage device reads data from and/or writes data to a memory medium. The data storage device includes a storage unit for storing a first identifier, an identifier acquisition unit for acquiring a second identifier recorded on a memory medium which is set to the data storage device, and a controller for comparing the first identifier with the second identifier, and then controlling to access to the memory medium for data reading and/or writing according to a relationship between the first identifier and the second identifier. For example, when the first identifier does not match the second identifier, the controller inhibits access to the memory medium for the reading of data. But, when the first and second identifiers match, the controller permits access to the memory medium for the reading and writing of data.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Kiyomi Imamura, Teruji Yamakawa
  • Patent number: 6452590
    Abstract: A method and device for driving a display panel are provided in which power consumption due to interelectrode capacitance in the addressing period is reduced with less number of components in a driving circuit. Four switches 41-44 are provided for each of plural data electrodes. The four switches 41-44 control open and close of a current path p1 from a bias potential line 81 to the data electrode A, a current path p2 from a capacitor 55 to the data electrode A, a current path p3 from the data electrode A to the capacitor 55, and a current path p4 from the data electrode A to the ground potential line 82.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Kenji Awamoto, Koichi Sakita, Kazuo Yoshikawa
  • Patent number: 6452860
    Abstract: A semiconductor memory device has a segment type word line structure and comprises a plurality of main word lines and a plurality of sub word lines which are arranged at different levels. The semiconductor memory device is provided with a memory cell array divided into a plurality of cell array blocks. A plurality of sub row decoder areas, each for selecting one of the sub word lines, are defined between the cell array blocks. A plurality of first metal wiring lines formed by use of the same wiring layer as the main word lines are provided. The first metal wiring lines pass across the sub row decoder areas and the cell array blocks.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: September 17, 2002
    Assignees: Kabushiki Kaisha Toshiba, Fujitsu Limited
    Inventors: Masaharu Wada, Kenji Tsuchida, Tsuneo Inaba, Atsushi Takeuchi, Toshimi Ikeda, Kuninori Kawabata
  • Patent number: 6452453
    Abstract: The constant-current generator comprises a bias transistor whose drain and gate are connected to each other, and an outputting transistor. The threshold voltage of the outputting transistor is smaller than that of the bias transistor. The outputting transistor has the same source voltage and the same gate voltage as those of the bias transistor. Therefore, the gate-to-source voltages of the outputting transistor and the bias transistor are always kept equal. On the other hand, the drain-to-source current of the outputting transistor becomes larger than that of the bias transistor in accordance with the difference between the threshold voltages of the outputting transistor and the bias transistor. Accordingly, the outputting transistor can output a stable drain-to-source current even when the drain voltage of the bias transistor has shifted to lower the gate-to-source voltage thereof.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Shinya Fujioka, Akihiro Funyu
  • Patent number: 6453338
    Abstract: Previous to the sending of an electronic mail, an attached file verifying unit retrieves a mail text to retrieve the presence or absence of an attachment representation indicative of the existence of an attached file, and if the attached representation has been retrieved, it issues for display a warning message urging the sender to verify the forget-to-attach. Furthermore, the attached file verifying unit compares the estimated number of attached files based on a number of attached files representation in the mail text with the actual number of attached files existing in the electronic mail, and if the actual number of the attached files is less than the estimated number of the attached files, it issues a warning message indicative of a lack of the attached files. In addition, the attached file verifying unit compares a file name in the mail text with a file name in the attached file, and if the two are not coincident with each other, it issues a warning message indicative of attachment of an erroneous file.
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventor: Taku Shiono
  • Patent number: 6450702
    Abstract: There is provided a micro actuator displacing a micro portion by use of an electrostatic force, the micro actuator comprising a first stationary part; a displacement part spaced apart from the first stationary part by a predetermined distance in a confronting manner, the displacememt part being displaceable relative to the first stationary part; a second stationary part; the lock parts being displaceable relative to the second stationary part; wherein the displacement part is displaced by application of a voltage between the first stationary part and the displacement part, the lock parts being displaced by application of a voltage between the second stationary part and the lock parts, and wherein the lock parts clamp the displacement part with no voltage applied, the lock parts releasing the displacement part with a voltage applied.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: September 17, 2002
    Assignee: Fujitsu, Limited
    Inventors: Hitoshi Komoriya, Yutaka Nakamura, Takao Hirahara
  • Patent number: 6453082
    Abstract: The present invention relates to a device and system for waveform shaping. The device includes at least two nonlinear loop mirrors (NOLM1 and NOLM2). Each of the NOLM1 and the NOLM2 includes a first optical coupler including first and second optical paths and directionally coupled to each other, a loop optical path formed of a nonlinear optical medium for connecting the first and second optical paths, and a second optical coupler including a third optical path directionally coupled to the loop optical path. The second optical path of the NOLM1 is optically connected to the third optical path of the NOLM2.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventor: Shigeki Watanabe
  • Patent number: 6452720
    Abstract: A light source apparatus suitable for use for evaluation of an optical device and for production of pump light for an optical amplifier. The apparatus includes a light emitting element having a gain band and a band reflection filter optically connected to the light emitting element. The light emitting element outputs a light beam having a spectrum which is determined by the gain band. The filter produces, from the light beam outputted from the light emitting element, a transmission beam and a reflection beam which returns to the light emitting element. The filter has a reflection band included in the gain band of the light emitting element and narrower than the gain band, and the transmission beam of the filter has a maximum power higher than the maximum power of the light beam to be outputted from the light emitting element. With the construction, pump light having a maximum power higher than the maximum power of the light to be outputted from the light emitting element can be obtained.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: September 17, 2002
    Assignee: Fujitsu Limited
    Inventors: Norihisa Naganuma, Norifumi Shukunami