Abstract: Frequency content motion detection is performed by decomposing a raw field luminance data in to a number of frequency content sub-bands, detecting motion using the raw field luminance data in parallel with the decomposing, generating a motion correction value by multiplying absolute values of the sub-bands by weighting factors, and applying the motion correction value to detected motion.
Type:
Application
Filed:
September 27, 2005
Publication date:
April 13, 2006
Applicant:
Genesis Microchip Inc.
Inventors:
Jayakanth Suyambukesan, Peter Swartz, Xu Dong
Abstract: A method, apparatus, and system for determining a true horizontal resolution of an analog video signal arranged to display a number of features having associated feature edges on a display each of which were created with a true pixel clock is described. For a test horizontal resolution, if it is determined that substantially all of the feature edges have substantially the same phase relationship to a test pixel clock, then the test horizontal resolution is the true horizontal resolution.
Abstract: Abstract of the Disclosure In digital display circuitry, configured to display an image encoded in an analog display signal, the digital display circuitry includes analog-to-digital converter (ADC) circuitry to recover pixel data elements of the image. During vertical blanking intervals of the analog display signal, the ADC circuitry is calibrated. Outside the vertical blanking intervals, the ADC circuitry is used to convert information in the analog display signal into digital representations of the pixel data elements. For example, the calibrating may include determining more acceptable values for certain ones of the operational parameters of the ADC circuitry.
Abstract: An enumeration method for the link rate and a pixel/audio clock rate. The method can be performed by expressing the pixel/audio clock rate and the link rate with four parameters, A, B, C, and D based upon a master frequency 23.76 GHz as 210×33×57×111 Hz, and regenerating a pixel/audio clock from the link clock.
Abstract: A DDS circuit arranged to provide a selectable spread spectrum based output clock signal is described. The synthesizer includes a phase accumulator circuit, a reference clock source coupled to the phase accumulator circuit arranged to provide a reference clock signal, a frequency shifter unit coupled to the phase accumulator, a nominal phase source coupled to the phase accumulator coupled to the frequency shifter unit arranged to provide a nominal phase signal, and a modulated phase source coupled to the frequency shifter unit arranged to provide a modulation signal. The frequency shifter unit combines the nominal phase signal and the modulation signal to form a frequency shift signal as input to the phase accumulator which uses the frequency shift signal to sample the reference clock signal so as to produce the output clock signal having a central frequency and a frequency spread based upon the modulation signal.
Abstract: A memory efficient providing LC overdrive for sticky pixels at a frame n?1 for a current frame n based upon sticky pixel data associated with a frame n?2.
Abstract: A reduced memory method, apparatus, and system suitable for implementation in Liquid Crystal Display (LCDs) that reduces a pixel element response time thereby enabling the display of high quality fast motion images thereupon. As a method of generating an overdrive pixel value in an LCD device, a predicted pixel value is compressed and stored. The stored compressed pixel value is then retrieved and decompressed as a start pixel value. An overdrive pixel value based upon a target pixel value and the start pixel value such that the overdrive pixel value enables a pixel to reach the target pixel value within a single frame period.
Abstract: Selectively providing LC overdrive by determining a relative noise level between a current video frame and a previous video frame and overdriving the current video frame based upon the determined relative noise level.
Abstract: A method for reducing a response time of the pixels corresponding to a period of time required for a selected pixel at a starting pixel value to reach a target pixel value. Providing an n×n factored zero diagonal LCD overdrive matrix and for a selected pixel at a particular start pixel value, selecting a particular target pixel value to be reached in one frame time, and determining a particular overdrive pixel value based upon the particular start pixel value and the particular target pixel value using the factored zero diagonal LCD overdrive matrix. When the start pixel value and the target pixel value are equal or almost equal in value, then setting the overdrive pixel value to a main diagonal pixel value such that the start pixel value is equal to the target pixel value.
Abstract: An apparatus and method for processing Hsync and Vsync signals in graphic controllers to avoid a false reading of pulses caused by glitches. The apparatus and method involve detecting when the synch signal crosses the threshold for the first time. When this occurs, the output of the detection circuit is held for the predetermined period of time, even if subsequent transitions across threshold occur during this period. After the predetermined period expires, the output is released and may assume the same state as the input sync signal at that time. In this manner, a misinterpretation of the resolution format caused by the reading of a “false” pulse caused by a glitch on a sync signal can be avoided.
Type:
Application
Filed:
March 3, 2004
Publication date:
September 8, 2005
Applicant:
Genesis Microchip Inc., A Delaware Corporation
Inventors:
Ram Chilukuri, Lawrence Prather, Ramakrishna Venuthurupalli
Abstract: A method of overdriving LCD panels to improve LCD pixel response time is described that does not rely upon conventional use of overdrive look up tables. The method is based upon modeling the LCD pixels as linear second-order dynamical systems that leads to simple runtime calculations requiring but a small number of stored panel specific constants.
Abstract: An extended overdrive table uses the saturation regions to store useful data that conformably extends the unsaturated region in a natural way. This extended overdrive table reduces the size of any interpolation errors when straddling crossover points to acceptable levels without requiring storing or using any crossover data. In addition, since the saturation regions are used to hold the new data, no additional storage requirements are introduced. The numeric range of the extended table is increased and it is therefore supposed that the bit depth of the table entries is increased, but the table can be resealed to retain the original bit depth with insignificant loss of accuracy. Also, the new data incorporated into the saturation regions allows run time calculation of the pixel attained at the end of the frame time that is needed as the start of the pixel for the next cycle.
Abstract: Pixel clock frequency and optimum sampling phase adjustment is an important requirement in Flat panel display monitors (FPDM) with an analog video interface. This invention proposes a new and more advanced method for frequency an optimum sampling phase determination. It is based on analyzing the content of the image to arrive at an optimum value of phase and frequency by directly optimizing image quality. The method differs from exsisting methods on two counts. First, no assumptions are needed about the precise value of expected frequency. Second, instead of following a two step approach of first determining frequency and then phase, this invention makes possible a single pass phase-frequency optimization.
Abstract: In a liquid crystal display (LCD) panel based display, a method of dynamically selecting either frame rate conversion (FRC) or pixel voltage overdrive is disclosed. The method is carried out by performing the following operations. A video vertical refresh rate of an incoming video data stream is determined and based upon the determining, only one video data stream conditioning protocol from a number of available video data stream conditioning protocols is selected. The selected video data stream condition protocol is then applied to the video data stream.
Abstract: A method of automatic generation of horizontal synchronization of an analog signal to a digital display is described. Accordingly, a number of features are found and for each of a range of test Htotal values, a pixel co-ordinate value for each of the found features is calculated. A pixel co-ordinate remainder value associated with each of the pixel co-ordinate values is determined and a maximum gap value of the pixel co-ordinate remainder values associated with a true horizontal resolution. is determined.
Abstract: A processor having a limited amount of local memory for storing code and/or data utilizes a program stored in external memory. The program stored in external memory is configured into blocks which can be loaded individually into the local memory for execution. Queuing the individual blocks of code allows the program to be executed by the processor and also facilitates loading of the subsequent code to be executed. A semaphore system can be utilized to indicate which blocks of local memory are available/unavailable. The system can support the interaction of multiple independent programs in external memory.
Abstract: A method for reducing a response time of the pixels corresponding to a period of time required for a selected pixel at a starting pixel value to reach a target pixel value. Providing an n×n LCD overdrive matrix and for a selected pixel at a particular start pixel value, selecting a particular target pixel value to be reached in one frame time, and determining a particular overdrive pixel value based upon the particular start pixel value and the particular target pixel value using triangular interpolation.
Abstract: A multi-function display controller that includes a source detector unit for determining if the source of an input stream is either film originated source originated or video source originated. A source converter unit for converting the input image stream to a common signal processing format is coupled to the source detector unit. Once converted to the common signal processing format, a determination is made if the input image stream is interlaced or non-interlaced (progressive scan). If the input image stream is interlaced, a de-interlace unit converts the interlaced signal to progressive scan using either motion adaptive or motion compensated de-interlacing techniques. It should be noted that in the described embodiment, motion vectors generated for use by the motion compensated de-interlace can be optionally stored in a memory unit for use in subsequent operations, such as motion compensated frame rate conversion or noise reduction (if any).
Abstract: The computing forward and backward vectors in unique patterns to achieve improved horizontal and vertical detail of the video display while reducing data processing and storage overhead is disclosed. The invention comprises generating a unique pattern of forward and backward motion vectors. The motion vectors are calculated using a quincunx vector sub-sampling of the forward and backward motion vectors to generate the pattern of motion vectors. The unique pattern generated by the quincunx vector sub-sampling provides more symmetrical sampling in the horizontal, vertical and diagonal directions and the benefit of lower data processing overhead while performing frame rate conversion.
Type:
Application
Filed:
November 1, 2004
Publication date:
June 23, 2005
Applicant:
Genesis Microchip Inc., A Delaware Corporation
Abstract: To achieve the foregoing, and in accordance with the purpose of the present invention, an apparatus and method for generating refined sub-pixel vectors for motion estimation from vector correlation values and converged vector correlation values using quadratic approximations respectively is disclosed. The apparatus and method includes defining a minimum vector position value of a converged vector and then determining a predetermined number of vector correlation samples around the minimum vector position value. The predetermined number of vector correlation samples provide a coarse correlation surface estimation of the minimum vector position value. A correlation surface fitting of the predetermined number of vector correlation samples using a quadratic approximation of the coarse correlation surface estimation of the minimum value is then performed. The correlation surface fitting resulting in a refined sub-pixel minimum vector position with horizontal and vertical components.
Type:
Application
Filed:
November 16, 2004
Publication date:
June 23, 2005
Applicant:
Genesis Microchip Inc., A Delaware Corporation