Patents Assigned to Genesis
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Publication number: 20080288004Abstract: The present invention is an apparatus for suspending a soft tissue near a bone opening, which includes a bone anchor, a soft tissue anchor, a spacer, and a depth stop. The device of the present invention allows soft tissues to change positions and be held until sufficient healing has occurred.Type: ApplicationFiled: May 16, 2008Publication date: November 20, 2008Applicant: GENESIS BIOSYSTEMS CORPORATIONInventor: Stephen A. Schendel
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Patent number: 7454588Abstract: A processor having a limited amount of local memory for storing code and/or data utilizes a program stored in external memory. The program stored in external memory is configured into blocks which can be loaded individually into the local memory for execution. Queuing the individual blocks of code allows the program to be executed by the processor and also facilitates loading of the subsequent code to the executed. A semaphore system can be utilized to indicate which blocks of local memory are available/unavailable. The system can support the interaction of multiple independent programs in external memory.Type: GrantFiled: June 23, 2004Date of Patent: November 18, 2008Assignee: Genesis Microchip Inc.Inventor: Richard K. Greicar
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Patent number: 7441357Abstract: The invention provides a display frame comprising a backing and a cooperating flexible screen that are securable between a pair of channeled rails provided at the upper and lower edges of the backing. The lower edge of the screen is releasably securable in the channel of the lower rail to enable a poster to be easily inserted and replaced by another poster while the display frame is assembled. The backing is preferably flexibly resilient and curved outwardly from its upper to its lower edge by tensioning means secured between the channeled rails. The channeled rails will preferably include biasing means to secure the backing within the channels of the rails and the flexible screen and/or a poster against the backing. Where the backing is resiliently flexible, the tensioning means will preferably be at least one flexible elongate element which is releasably securable between the channeled rails.Type: GrantFiled: March 31, 2003Date of Patent: October 28, 2008Assignee: Product Genesis CCInventor: Gavin Milton Steer
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Publication number: 20080246711Abstract: In a digital display device, a packet based method of driving selected pixel elements by way of associated data latches included in a column driver is disclosed. For each frame lines in a video frame, a number of video data packets are provided directly to the column driver at a link rate and each of the number of data latches are populated with appropriate video data based upon video data packets within a line period ?. Selected pixel elements are driven based upon the video data.Type: ApplicationFiled: June 16, 2008Publication date: October 9, 2008Applicant: GENESIS MICROCHIP INC.Inventor: Osamu Kobayashi
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Patent number: 7427554Abstract: A method for forming a strained silicon layer of semiconductor material. The method includes providing a deformable surface region having a first predetermined radius of curvature, which is defined by R(1) and is defined normal to the surface region. A backing plate is coupled to the deformable surface region to cause the deformable surface region to be substantially non-deformable. The method includes providing a first substrate (e.g., silicon wafer) having a first thickness. Preferably, the first substrate has a face, a backside, and a cleave plane defined within the first thickness. The method includes a step of overlying the backside of the first substrate on a portion of the surface region having the predetermined radius of curvature to cause a first bend within the thickness of material to form a first strain within a portion of the first thickness. The method provides a second substrate having a second thickness, which has a face and a backside.Type: GrantFiled: August 12, 2005Date of Patent: September 23, 2008Assignee: Silicon Genesis CorporationInventors: Francois J. Henley, Harry R. Kirk
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Patent number: 7424558Abstract: According to some embodiments of the invention, a connector is provided for connecting any combination of an analog video source to either an analog display or a digital display or a digital video source to either an analog display or a digital display. Some preferred connectors have a serial differential digital interconnect that is pin/connector compatible with analog VGA or DB15. Some implementations of the invention provide a system and method for determining the inherent digital versus analog capability of a video source and a video display and configuring a connector according to the determination. Some implementations provide real-time display image quality assurance. Some embodiments provide a digital monitor with digital data streams having more than 8 bits per color, e.g., 10 bits or 12 bits per color.Type: GrantFiled: December 2, 2003Date of Patent: September 9, 2008Assignee: Genesis Microchip Inc.Inventor: Osamu Kobayashi
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Patent number: 7420618Abstract: A multi-function display controller that includes a source detector unit for determining if the source of an input stream is either film originated source originated or video source originated. A source converter unit for converting the input image stream to a common signal processing format is coupled to the source detector unit. Once converted to the common signal processing format, a determination is made if the input image stream is interlaced or non-interlaced (progressive scan). If the input image stream is interlaced, a de-interlace unit converts the interlaced signal to progressive scan using either motion adaptive or motion compensated de-interlacing techniques. It should be noted that in the described embodiment, motion vectors generated for use by the motion compensated de-interlace can be optionally stored in a memory unit for use in subsequent operations, such as motion compensated frame rate conversion or noise reduction (if any).Type: GrantFiled: December 3, 2004Date of Patent: September 2, 2008Assignee: Genesis Microchip Inc.Inventor: Peter D. Swartz
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Publication number: 20080206962Abstract: A method for fabricating free standing thickness of materials using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. In a specific embodiment, the present method includes providing a semiconductor substrate having a surface region and a thickness. The method includes subjecting the surface region of the semiconductor substrate to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature.Type: ApplicationFiled: November 5, 2007Publication date: August 28, 2008Applicant: Silicon Genesis CorporationInventors: Francois J. Henley, Albert Lamm, Babak Adibi
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Publication number: 20080206963Abstract: A method of forming substrates, e.g., silicon on insulator, silicon on silicon. The method includes providing a donor substrate, e.g., silicon wafer. The method also includes forming a cleave layer on the donor substrate that contains the cleave plane, the plane of eventual separation. In a specific embodiment, the cleave layer comprising silicon germanium. The method also includes forming a device layer (e.g., epitaxial silicon) on the cleave layer. The method also includes introducing particles into the cleave layer to add stress in the cleave layer. The particles within the cleave layer are then redistributed to form a high concentration region of the particles in the vicinity of the cleave plane, where the redistribution of the particles is carried out in a manner substantially free from microbubble or microcavity formation of the particles in the cleave plane. That is, the particles are generally at a low dose, which is defined herein as a lack of microbubble or microcavity formation in the cleave plane.Type: ApplicationFiled: April 18, 2008Publication date: August 28, 2008Applicant: Silicon Genesis CorporationInventors: Francois J. Henley, Michael A. Bryan, William G. En
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Patent number: 7412017Abstract: An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the different sampling phases, the detector inspects some amount of look-behind and look-ahead information in order to improve upon simple symbol-by-symbol detection. The over-sampled information is used to further improve detection performance.Type: GrantFiled: October 31, 2007Date of Patent: August 12, 2008Assignee: Genesis Microchip Inc.Inventor: Alexander Julian Eglit
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Patent number: 7410887Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define a donor substrate material (12) above the selected depth. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.Type: GrantFiled: January 26, 2007Date of Patent: August 12, 2008Assignee: Silicon Genesis CorporationInventors: Francois J. Henley, Nathan W. Cheung
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Publication number: 20080188011Abstract: An apparatus for temperature control of manufacture of thick film materials includes a stage comprising a planar surface for supporting a bulk material to be implanted and subsequently cleaved. The bulk material has a surface region, a side region, and a bottom region which provides a volume of material and defines a length between the bottom region and the surface region. The apparatus further includes a mechanical clamp device adapted to engage the bottom region to the planar surface of the stage such that the bulk material is in physical contact with the planar surface for thermal energy to transfer through an interface region between the bulk material and the stage while the surface region is substantially exposed. Additionally, the apparatus includes a sensor device configured to measure a temperature value of the surface region and generate an input data.Type: ApplicationFiled: January 24, 2008Publication date: August 7, 2008Applicant: Silicon Genesis CorporationInventor: Francois J. Henley
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Publication number: 20080179547Abstract: A photovoltaic cell device, e.g., solar cell, solar panel, and method of manufacture. The device has an optically transparent substrate comprises a first surface and a second surface. A first thickness of material (e.g., semiconductor material, single crystal material) having a first surface region and a second surface region is included. In a preferred embodiment, the surface region is overlying the first surface of the optically transparent substrate. The device has an optical coupling material provided between the first surface region of the thickness of material and the first surface of the optically transparent material.Type: ApplicationFiled: September 7, 2007Publication date: July 31, 2008Applicant: Silicon Genesis CorporationInventor: Francois J. Henley
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Publication number: 20080182386Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of introducing energetic particles (22) through a surface of a donor substrate (10) to a selected depth (20) underneath the surface, where the particles have a relatively high concentration to define a donor substrate material (12) above the selected depth. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.Type: ApplicationFiled: March 31, 2008Publication date: July 31, 2008Applicant: Silicon Genesis CorporationInventors: Francois J. Henley, Nathan W. Cheung
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Patent number: 7405719Abstract: In a digital display device, a packet based method of driving selected pixel elements by way of associated data latches included in a column driver is disclosed. For each frame lines in a video frame, a number of video data packets are provided directly to the column driver at a link rate and each of the number of data latches are populated with appropriate video data based upon video data packets within a line period ?. Selected pixel elements are driven based upon the video data.Type: GrantFiled: July 29, 2004Date of Patent: July 29, 2008Assignee: Genesis Microchip Inc.Inventor: Osamu Kobayashi
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Patent number: 7399680Abstract: A partially completed multi-layered substrate, e.g., silicon on silicon. The substrate has a thickness of material from a first substrate. The thickness of material comprises a first face region. The substrate has a second substrate having a second face region. Preferably, the first face region of the thickness of material is joined to the second face region of the second substrate. The substrate has an interface region formed between the first face region of the thickness of material and the second face region of the second substrate. A plurality of particles are implanted within a portion of the thickness of the material and a portion of the interface region to electrically couple a portion of the thickness of material to a portion of the second substrate.Type: GrantFiled: November 30, 2005Date of Patent: July 15, 2008Assignee: Silicon Genesis CorporationInventor: Francois J. Henley
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Patent number: 7398443Abstract: System and method for automatic fault-testing of a logic block and the interfaces of macros with logic gates inside a chip, using an at-speed logic-BIST internal to the chip. Following an initialization of internal storage elements, a set of test signals are generated and processed by the logic block. The output of the logic block is accumulated into a signature and compared to a reference signature to detect faults. Testing can be performed on an ATE (Automatic Test Equipment) using a simple test vector, or can be performed by a field engineer on the actual board comprising the chip.Type: GrantFiled: May 31, 2005Date of Patent: July 8, 2008Assignee: Genesis Microchip Inc.Inventors: Venkat Chary Mushirabad, Rajanatha Shettigara
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Publication number: 20080160661Abstract: A reusable silicon substrate device for use with layer transfer process. The device has a reusable substrate having a surface region, a cleave region, and a total thickness of material. The total thickness of material is at least N times greater than a first thickness of material to be removed. In a specific embodiment, the first thickness of material to be removed is between the surface region and the cleave region, whereupon N is an integer greater than about ten. The device also has a chuck member adapted to hold a handle substrate member in place. The chuck member is configured to hold the handle substrate in manner to facilitate bonding the handle substrate to the first thickness of material to be removed. In a preferred embodiment, the device has a mechanical pressure device operably coupled to the chuck member. The mechanical pressure device is adapted to provide a force to cause bonding of the handle substrate to the first thickness of material to be removed.Type: ApplicationFiled: April 5, 2007Publication date: July 3, 2008Applicant: Silicon Genesis CorporationInventor: Francois J. Henley
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Publication number: 20080156850Abstract: A tooling fixture is adapted to preserve the dimensional accuracy of critical dimension locating components associated with the fixture. The tooling fixture has a plurality of component locators having a body with at least one surface for accurately constraining at least one component part within the tooling fixture. The surfaces of the component locators are exposed to weld spatter. A spatter resistant coating is applied to the surfaces of the component locators to protect their surfaces from accumulating weld spatter thereby preserving the dimensional repeatability of the tooling fixture and decreasing rework or scrap quantities resulting from the component parts being out of specification.Type: ApplicationFiled: January 2, 2007Publication date: July 3, 2008Applicant: GENESIS SYSTEMS GROUP, L.L.C.Inventors: GARY ALDEN, PATRICK W. POLLOCK, Don STABENOW
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Patent number: D573163Type: GrantFiled: August 7, 2007Date of Patent: July 15, 2008Assignee: Genesis III, Inc.Inventor: Roger T. Young