Abstract: An arrangement for tranmitting data messages between a remotely located attendant console and a CENTREX equipped central office exchange. The arrangement includes an operating unit residing in an interface circuit connected between the attendant console and the central office exchange. The operating unit of the present invention includes receiving circuitry connected to the attendant console and to a controller. The receiving circuitry is arranged to receive a data message from the attendant console and set a receive signal. A state machine called by the controller transfers the first byte of the data message to a temporary memory and resets the receive signal. The state machine accepts all additional characters from the receiving circuitry storing received characters in the memory until a character sequence is received indicating the end of the data message. When a complete data message is received an analysis is called by the controller which analyzes the received data message.

Abstract: A synchronizing circuit that synchronizes the non-maskable interrupt (NMI) input signals of two separate microprocessor subsystems that are running synchronously as part of a fault tolerant computer system. This circuit enables both microprocessors to detect and respond to an error condition at an identical point in their relative bus timing sequence even though there may be a real time skew between the bus timing of these two subsystems. Storage and gating circuitry are used to provide the precise timing signals required for such synchronization.

Abstract: A synchronizing circuit synchronizes the asynchronous ready signals for two separate microprocessor subsystems that are running synchronously as part of a fault tolerant computer system. Duplicated synchronization circuits, confined in a master-slave arrangement, are utilized with the duplicate microprocessors. Storage and gating circuitry are used to provide the precise timing signals required for such synchronization.

Abstract: A differential amplifier feedback current mirror includes a feedback current source that provides a correction current to one input of a differential amplifier. The correction current is synthesized by comparing a sample of the current delivered by a string of controlled current sources to a reference current set up by a constant current source. A current driver is included in the differential amplifier feedback loop and a current source buss is driven by the current driver. The feedback configuration assures that the current delivered by the dependent controlled current sources accurately tracks the current established by the reference current source, irrespective of the base current offset attributable to each of the dependent controlled current sources.

Abstract: This circuitry expands the memory addressing arrange of a microprocessor beyond its directly addressable memory capacity. This circuit uses the status outputs of the microprocessor to segregate memory accesses for program code instructions from accesses for other data. This segregation scheme assigns different memory banks to program code instructions and to data. Memory reads and writes for scratch pad data are performed from one bank of memory. Memory reads for program code instructions are performed from a separate memory bank. This memory bank technique can double the size of a microprocessor's directly addressable memory without changing the microprocessor's architecture. This circuitry is suitable for implementation with CMOS gate array technology.

Abstract: A circuit adds and subtracts pulse code modulation (PCM) samples in D2 format. An exponent subtractor determines the difference between exponents of the two PCM samples. A mantissa shifter circuit shifts the mantissa portion of a selected PCM sample to compensate for the difference in the exponents. A mantissa adder circuit adds or subtracts the mantissa portion of the shifted and unshifted PCM samples and a sign generator provides a sign value representative of the resultant added or subtracted PCM samples. A normalizer circuit ensures that the mantissa has a predetermined range of values.

Abstract: This invention discloses a circuit for examining the value transmitted via a digital bus. A determination is made as to whether the value matches a predefined programmable value. An output indication is given for a match. In addition, this circuit may examine the transmitted value to determine whether it is within the bounds of a predefined range of values. This circuit utilizes a minimum of space and hardware components, due to its fabrication using RAM devices and a program logic array.

Abstract: An apparatus for testing current sensors employing an electromagnetic coil and one or more Hall Effect switches including a microprocessor controlling a constant current source and visual and audio indicating circuits. A parameter input circuit is provided to permit an operator to select device types and to select test only, or adjustment and test sequences to be executed. The constant current source is adapted to apply a threshold, must-not-operate, and a must-operate current values to the electromagnetic coil. The visual and audio indicating circuits are adapted to provide messages, pass/fail indications, and audio signals signaling test success or failure results to an operator.

Abstract: A method of adjusting and testing for proper operation a current sensor by applying a threshold current value to the current sensor and adjusting the current sensor to a point just past the threshold of operation. Proper operation of the current sensor is tested by applying a non-operate current value followed by an operate current value to the sensor and checking for respective non-operate and operate output signals from the sensor. Messages, pass/fail indication, and audio signals are provided to signal test results to an operator.

Abstract: Cable brackets are formed out of wire and have flat areas swaged into them to provide suitable mounting surfaces. The wire is of sufficient diameter to provide structural rigidity to the bracket and the flattened areas are of such dimension to provide an area sufficiently large enough for a mounting hole.

Abstract: An integrated circuit which facilitates measurement of various integrated circuit packaging parameters, including atmospheric moisture content, impurity content, water vapor transmission rate of encapsulant, corrosion of metallization, temperature, thermal impedance, and strain sensing. This circuit can be interconnected via both wire bonding and mass bonding, and it functions as a test vehicle for the tape automated bonding process. This circuit includes a plurality of subcircuits arranged in a square array such that the test capabilities of both the complete circuit and each individual subcircuit is identical.

Abstract: A control circuit for effecting the transfer of data messages between an interface circuit and a CENTREX equipped central office exchange. The central office exchange includes a peripheral processor and the interface circuit includes an input and an output sequential memory for receiving and sending respectively, data messages to the peripheral processor. An input control circuit includes a first gating means having inputs connected to the peripheral processor and which produces an output signal responsive to the simultaneous application of a first and a second control signal. First bistable memory means receives the gating means output signal and further includes a clock input connected to a write select signal from the peripheral processor. Responsive to the write select signal, the gating means output signal is stored in the first bistable memory means. Second bistable memory means connected to the first bistable memory means output includes a clock input connected to a source of clocking signals.

Abstract: An improved loop current supply circuit including a first amplifier connected to a source of bias voltage. The first amplifier is further connected to a subscriber loop circuit through the tip and ring conductors. The first amplifier receives the bias voltage and supplies loop current to the loop circuit. A second amplifier connected to the tip and ring conductors outputs a voltage representative of the amount of current in the subscriber loop. When the output voltage of the second amplifier becomes greater than the bias voltage, a loop voltage network connected to the second amplifier and to the bias voltage source shunts the bias voltage from the first amplifier, decreasing the current in the loop circuit.

Abstract: Circuitry for supplying power to low-level DIALER portions of a telecommunications integrated circuit device comprises a PNP current sourcing transistor mirrored to a bypass transistor. The bypass transistor is coupled across the TIP and RING terminals of the subscriber line so as to maintain current flow sufficient to prevent the central office from "dropping out". A sensing transistor drives a current sink coupled to the current sourcing transistor in order to prevent that transistor from dropping into saturation and degrading the necessarily high impedance level that must be presented across the subscriber line. Saturation is prevented through the operation of a circuit loop that includes the base-collector junction of the current sourcing transistor, the emitter to-base junction of the sensing transistor, and a voltage offset element.

Abstract: An improved AC impedance matching arrangement including a first amplifier connected to a subscriber loop through the tip and ring conductors of a subscriber line circuit. The first amplifier is arranged to supply loop current to the subscriber loop through first and second resistors. Each resistor having a set DC value. A second amplifier connected to the tip and ring conductors is arranged to develop and output a signal responsive to AC signals applied to the tip and ring conductors from the subscriber loop. A feedback circuit connected to the second amplifier is arranged to receive the second amplifier output signal and develop and output to the first amplifier an impedance matching signal. The impedance matching signal raises the impedance seen by the tip and ring conductors above the set DC value of the first and second resistors.

Abstract: A three-port conference circuit for use in a pulse code modulated communication system including a first speaker register including an input connected to a telephone system information memory output and including an output, a second speaker register including an input connected to the telephone system information memory output and including an output and a conference adder connected to the first and second speaker register outputs via inputs and including an output connected to a sample inverting circuit of the telephone system. The conference adder adds talking samples by means of an included eight-bit floating point adder.

Abstract: This invention is a device which permits the percentage of real time consumed by software tasks of a telecommunications switching system or other process controller to be measured and displayed on a percentage meter. The relative percentages of different real time tasks are displayed by the relative intensities of particular lamps mounted on a control panel of a meter. Non-standard, user defined, software tasks may be selected for display on the meter. Software tasks which over-shoot a predetermined amount of time provide an indication of this by lighting one of a number of different lamps. Each of these lamps measures a predetermined amount of over-shoot time.

Abstract: An arrangement for connecting an array of individual electronic elements into a readily expandable matrix. The arrangement comprises a plurality of matrix slices with each slice including a set number of electronic elements as well as a row and a column buffer. The electronic elements of each matrix slice are diagonally connected to the elements of the adjacent matrix slice.

Abstract: An improved offhook supervision circuit including an amplifier connected to a subscriber loop through the tip and ring conductors of a subscriber line circuit. The amplifier is arranged to develop and output a loop voltage signal representing the level of the DC signals applied to the subscriber loop circuit. A comparator device has a first input connected to the amplifier and is arranged to receive the loop voltage signal output by the amplifier. A second input of the comparator device is connected to a reference voltage device which outputs a predetermined reference signal voltage. Any significant reduction of the DC signal level on the loop circuit will cause the loop signal voltage output by the amplifier to fall below the reference signal voltage. An offhook signal is then output from the comparator device to a control device signaling an offhook condition.