Patents Assigned to Hefei Core Storage Electronics Limited
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Patent number: 10922028Abstract: A data programming method, a memory storage device and a memory control circuit unit are provided. The method includes presetting a programming mode of a plurality of first type physical erasing units as a first programming mode, and presetting a programming mode of a plurality of second type physical erasing units as a second programming mode. The method also includes obtaining a change parameter according to usage parameters of the first type physical erasing units and the second type physical erasing units. The method further includes determining whether the change parameter matches a first change condition, and if the change parameter matches the first change condition, programming a write-data into the second type physical erasing unit by using the first programming mode.Type: GrantFiled: May 9, 2017Date of Patent: February 16, 2021Assignee: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Meng Xiao, Hui Xie
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Publication number: 20210011630Abstract: A memory management method for a memory storage device is provided. The memory management method includes: detecting effective information of at least one operation event performed by the memory storage device in a first mode; and adjusting a threshold value according to the effective information. The threshold value is configured to determine whether to instruct the memory storage device to enter the first mode.Type: ApplicationFiled: August 29, 2019Publication date: January 14, 2021Applicant: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Chong Peng, Zhi Wang, Wan-Jun Hong
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Publication number: 20210004175Abstract: A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: receiving a first write command from a host system; instructing a rewritable non-volatile memory module to perform a first write operation according to the first write command; obtaining first performance information corresponding to the first write operation; and updating threshold information according to the first performance information, wherein the threshold information is configured to determine a type of target data.Type: ApplicationFiled: August 22, 2019Publication date: January 7, 2021Applicant: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Xin Wang, Kai-Di Zhu
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Patent number: 10592126Abstract: A memory management method is provided according to an exemplary embodiment of the disclosure. The method includes: receiving a plurality of commands from a host system; counting a newest idle time corresponding to the commands and a past average command-receiving-time-interval corresponding to the commands; and dynamically changing a work mode of a memory storage device from a first work mode to a second work mode if the newest idle time is larger than a first threshold value and the past average command-receiving-time-interval is larger than a second threshold value. Therefore, a power consumption of the memory storage device can be reduced and a work mode of the memory storage device may not be changed too frequently.Type: GrantFiled: January 12, 2018Date of Patent: March 17, 2020Assignee: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Hui Xie, Meng Xiao, Ren Jun Tang, Dong Sheng Guan
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Patent number: 10402318Abstract: A mapping table updating method, a memory control circuit unit and a memory storage device. The method includes: receiving a first data corresponding to a first logical address from a host system; loading a first logical address-physical address mapping table according to the first logical address; sending a command sequence to a rewritable non-volatile memory module; in the process of writing the first data into a first physical programming unit according to the command sequence by a control circuit of the rewritable non-volatile memory module, updating the first logical address-physical address mapping table; and after writing the first data into the first physical programming unit by the control circuit, storing the updated first logical address-physical address table back to the rewritable non-volatile memory module.Type: GrantFiled: December 25, 2017Date of Patent: September 3, 2019Assignee: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Chong Peng
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Publication number: 20190138445Abstract: A mapping table updating method, a memory control circuit unit and a memory storage device. The method includes: receiving a first data corresponding to a first logical address from a host system; loading a first logical address-physical address mapping table according to the first logical address; sending a command sequence to a rewritable non-volatile memory module; in the process of writing the first data into a first physical programming unit according to the command sequence by a control circuit of the rewritable non-volatile memory module, updating the first logical address-physical address mapping table; and after writing the first data into the first physical programming unit by the control circuit, storing the updated first logical address-physical address table back to the rewritable non-volatile memory module.Type: ApplicationFiled: December 25, 2017Publication date: May 9, 2019Applicant: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Chong Peng
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Publication number: 20190138225Abstract: A memory management method is provided according to an exemplary embodiment of the disclosure. The method includes: receiving a plurality of commands from a host system; counting a newest idle time corresponding to the commands and a past average command-receiving-time-interval corresponding to the commands; and dynamically changing a work mode of a memory storage device from a first work mode to a second work mode if the newest idle time is larger than a first threshold value and the past average command-receiving-time-interval is larger than a second threshold value. Therefore, a power consumption of the memory storage device can be reduced and a work mode of the memory storage device may not be changed too frequently.Type: ApplicationFiled: January 12, 2018Publication date: May 9, 2019Applicant: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Hui Xie, Meng Xiao, Ren Jun Tang, Dong Sheng Guan
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Patent number: 10126953Abstract: The present invention relates to a memory management method, memory control circuit unit, and a memory storage device. The method includes: transmitting temporary data from a buffer memory to a register of a first memory plane; releasing a first storage space of the buffer memory, wherein the first storage space is configured to store the temporary data; performing a first operation to a second memory plane by using the first storage space; and after finishing the first operation performed on the second memory plane, reloading the temporary data from the register of the first memory plane to the first storage space of the buffer memory, wherein operations performed on the first memory plane and the second memory plane are asynchronous operations.Type: GrantFiled: October 26, 2016Date of Patent: November 13, 2018Assignee: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Chong Peng, Hui Xie
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Publication number: 20180260163Abstract: A data programming method, a memory storage device and a memory control circuit unit are provided. The method includes presetting a programming mode of a plurality of first type physical erasing units as a first programming mode, and presetting a programming mode of a plurality of second type physical erasing units as a second programming mode. The method also includes obtaining a change parameter according to usage parameters of the first type physical erasing units and the second type physical erasing units. The method further includes determining whether the change parameter matches a first change condition, and if the change parameter matches the first change condition, programming a write-data into the second type physical erasing unit by using the first programming mode.Type: ApplicationFiled: May 9, 2017Publication date: September 13, 2018Applicant: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Meng Xiao, Hui Xie
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Patent number: 9952806Abstract: A mapping table loading method and a memory storage apparatus are provided. The method includes: receiving a plurality of first read commands comprising a plurality of first logical units; executing a first logical-physical mapping table pre-loading operation to read a plurality of mapping information corresponding to the first logical units in a logical-physical mapping table from a rewritable non-volatile memory module to a first buffer area of a buffer memory according to a first executing sequence of the first read commands if the first logical units are not continuous logical addresses; and reading data belonging to the first logical units from physical erasing units to the first buffer area according to the mapping information of the first logical units, and replacing the mapping information of the first logical units in the first buffer area by the data belonging to the first logical units.Type: GrantFiled: November 16, 2016Date of Patent: April 24, 2018Assignee: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Chong Peng, Hui Xie
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Publication number: 20180088863Abstract: A mapping table loading method and a memory storage apparatus are provided. The method includes: receiving a plurality of first read commands comprising a plurality of first logical units; executing a first logical-physical mapping table pre-loading operation to read a plurality of mapping information corresponding to the first logical units in a logical-physical mapping table from a rewritable non-volatile memory module to a first buffer area of a buffer memory according to a first executing sequence of the first read commands if the first logical units are not continuous logical addresses; and reading data belonging to the first logical units from physical erasing units to the first buffer area according to the mapping information of the first logical units, and replacing the mapping information of the first logical units in the first buffer area by the data belonging to the first logical units.Type: ApplicationFiled: November 16, 2016Publication date: March 29, 2018Applicant: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Chong Peng, Hui Xie
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Publication number: 20180059934Abstract: The present invention relates to a memory management method, memory control circuit unit, and a memory storage device. The method includes: transmitting temporary data from a buffer memory to a register of a first memory plane; releasing a first storage space of the buffer memory, wherein the first storage space is configured to store the temporary data; performing a first operation to a second memory plane by using the first storage space; and after finishing the first operation performed on the second memory plane, reloading the temporary data from the register of the first memory plane to the first storage space of the buffer memory, wherein operations performed on the first memory plane and the second memory plane are asynchronous operations.Type: ApplicationFiled: October 26, 2016Publication date: March 1, 2018Applicant: Hefei Core Storage Electronic LimitedInventors: Hao-Zhi Lee, Qi-Ao Zhu, Chong Peng, Hui Xie