Patents Assigned to Hitachi Device Engineering Co., Ltd.
  • Patent number: 7366015
    Abstract: A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an insulator film. Auxiliary gates coupled to selected memory cells function to generate hot electrons and are alternately arranged with other auxiliary gates functioning to prevent write errors in the non-selected memory cells.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: April 29, 2008
    Assignees: Renesas Technology Corp., Hitachi Device Engineering Co., Ltd.
    Inventors: Takashi Kobayashi, Hideaki Kurata, Naoki Kobayashi, Hitoshi Kume, Katsutaka Kimura, Shunichi Saeki
  • Patent number: 7359024
    Abstract: A liquid crystal display device includes first and second substrates with a liquid crystal layer therebetween, and a transparent conductor which is formed at a liquid crystal side of at least one of the first and the second substrates. At least a projected portion is formed on the transparent conductor in a pixel region, and a material of the projected portion is different from a material of the transparent conductor.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: April 15, 2008
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Masumi Sasuga, Junichi Ohwada, Akira Kobayashi, Masaru Fujita, Hiroshi Nakamoto, Ryu Ono, Tsutomu Isono
  • Patent number: 7359244
    Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: April 15, 2008
    Assignees: Renesas Technology Corp., Hitachi Device Engineering Co., Ltd.
    Inventors: Naoki Kobayashi, Shunichi Saeki, Hideaki Kurata
  • Patent number: 7355659
    Abstract: A display device includes a substrate, a display area and a peripheral area formed on the substrate, a plurality of signal lines and a plurality of scan lines arranged in the display area, and six signal line common lines provided in said peripheral area. Each signal line common line of the six signal line common lines is connected every six signal lines. At least two scan line common lines are provided in the peripheral area, and each scan line common line of at least two scan line common lines is connected every predetermined of scan lines.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: April 8, 2008
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kimitoshi Ohgiichi, Ryouichi Ootsu, Kazushi Miyata, Shinichi Tsuruoka, Susumu Niwa
  • Patent number: 7319286
    Abstract: A display device includes a front substrate having an anode and fluorescent materials on an inner surface, and a back substrate having a plurality of cathode lines and include electron sources, and a plurality of control electrodes allow electrons from the electron sources to emit to the front substrate side, on an inner surface thereof. The back substrate is arranged to face the front substrate in an opposed manner with a given gap therebetween, and an outer frame for holding the given gap is interposed between the front substrate and the back substrate and extends around the display region. An inner frame is arranged outside the display region and inside the outer frame, and a getter is provided between the outer frame and the inner frame.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: January 15, 2008
    Assignees: Hitachi Displays, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yuuichi Kijima, Yoshiyuki Kaneko, Shigemi Hirasawa, Susumu Sasaki, Tomoki Nakamura, Hiroshi Kawasaki, Jun Ishikawa
  • Patent number: 7307612
    Abstract: The present invention provides a liquid crystal display device which can be used in a miniaturized portable equipment, wherein the liquid crystal display device integrally incorporates a drive circuit therein so that a circuit scale can be miniaturized. A liquid crystal drive circuit includes a first drive circuit and a second drive circuit which is mounted on one side of the liquid crystal display panel. One output of the first drive circuit is connected to a plurality of signal lines and the second drive circuit supplies signals to the first drive circuit. The liquid crystal display panel includes holding capacitive elements and signals are supplied to the holding capacitive elements from the second drive circuit. The second drive circuit includes a booster circuit for supplying signals to the first drive circuit and the holding capacitive elements.
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: December 11, 2007
    Assignees: Hitachi Displays, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Mitsuru Goto, Yuichi Numata, Masato Sawahata, Akira Ogura
  • Patent number: 7304710
    Abstract: A liquid crystal display device has a narrowed peripheral area; more particularly, the liquid crystal display device is characterized in that disconnection or short-circuiting of connecting lines disposed in the narrowed peripheral area is restrained. The liquid crystal display device includes a pixel area having pixel electrodes and a peripheral area surrounding the pixel area. Gate lines and drain lines are disposed in the pixel area, and a gate driver and a drain driver are disposed in the peripheral area. A plurality of gate connecting lines which connect the gate driver and a plurality of gate lines are stacked in the peripheral area.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: December 4, 2007
    Assignees: Hitachi Displays, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Nobuyuki Ishige, Hitoshi Komeno
  • Patent number: 7292212
    Abstract: A liquid crystal display device having first and second substrates with a liquid crystal layer therebetween, a plurality of scanning signal lines and a plurality of video signal lines formed on the first substrate, and a plurality of thin film transistors formed proximate to a crossing point of the scanning signal lines and video signal lines. A light shielding layer is formed on the second substrate and overlapped with at least one of the thin film transistors and with at least one signal line of the scanning signal lines and the video signal lines in plane view. The light shielding layer has an aperture region which is formed proximate to the at least one thin film transistor and formed within the at least one signal line in plane view.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: November 6, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Tatsuo Makishima, Shinichi Iwasaki, Masaaki Kitajima, Yoshio Oowaki, Koji Takahashi, Shunsuke Morishita
  • Patent number: 7292496
    Abstract: The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: November 6, 2007
    Assignees: Renesas Technology Corporation, Hitachi Device Engineering Co., Ltd.
    Inventors: Takesada Akiba, Shigeki Ueda, Toshikazu Tachibana, Masashi Horiguchi
  • Patent number: 7292215
    Abstract: A liquid crystal display device capable of improving display quality by enabling proper execution of receipt and acceptance of image signals through compensation for variation in duty ratios of clock signals as input to liquid crystal driver circuitry, is provided.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: November 6, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Takahiro Fujioka, Shigeru Ito, Mitsuru Goto, Yozo Nakayasu, Yoshiyuki Saito
  • Patent number: 7283400
    Abstract: A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: October 16, 2007
    Assignees: Renesas Technology Corp., Hitachi Device Engineering Co., Ltd., Hitachi Ulsi Systems Co., Ltd.
    Inventors: Hideaki Kurata, Naoki Kobayashi, Shunichi Saeki, Takashi Kobayashi, Takayuki Kawahara, Yoshinori Takase, Keiichi Yoshida, Michitaro Kanamitsu, Shoji Kubono, Atsushi Nozoe
  • Patent number: 7274362
    Abstract: A display device includes a dynamic ratioless shift register which is operated in a stable manner and can expand the degree of freedom of design. In the dynamic ratioless shift register which is provided with thin film transistors having semiconductor layers made of p-Si on a substrate surface, a node which becomes the floating state is connected to a fixed potential through a capacitance element.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: September 25, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Toshio Miyazawa, Iwao Takemoto, Atsushi Hasegawa, Masashiro Maki, Kazutaka Goto
  • Patent number: 7262822
    Abstract: A liquid crystal display device which includes a liquid crystal display panel, a metal shield casing covering a periphery of the liquid crystal display panel, a plurality of fluorescent lamps arranged below the liquid crystal panel, a back light support supporting the plurality of fluorescent lamps, and a lower casing fixed to the metal shield casing. The back light support is fixed in the lower casing and comprises a plurality of slits, wherein one end of the plurality of fluorescent lamps is disposed with respect to a respective one of the plurality of slits.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: August 28, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Masumi Sasuga, Junichi Ohwada, Akira Kobayashi, Masaru Fujita, Hiroshi Nakamoto, Ryu Ono, Tsutomu Isono
  • Patent number: 7257720
    Abstract: Disclosed herewith is a semiconductor data processing device that realizes low power consumption at the standby time and at the operation time, as well as speeds up the interfacing operation. The semiconductor data processing device can connect a non-volatile storage device to a general-purpose bus of a host system. The data processing device enters the active or standby state in response to the state of the general-purpose bus. In the standby state, the data processing device stops the internal clock signal and applies a substrate bias voltage to each object so as to suppress the potential sub-threshold leak current therefrom. This bias voltage is also applied to the central processing unit and the rewritable non-volatile memory for storing a control program to be executed by the central processing unit. The central processing unit processes data in units of n bits or below when the interface controller and the data transfer controller input/output parallel data in units of 2n bits.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: August 14, 2007
    Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc., Hitachi Device Engineering Co., Ltd.
    Inventors: Toru Ichien, Wataru Yamaguchi, Masae Sasakawa, Mamoru Wakabayashi
  • Patent number: 7251009
    Abstract: The present invention provides a liquid crystal display device which can obviate cutting off of a peripheral region of the liquid crystal display device which is provided with an inspection circuit and can surely perform the inspection of an image display even when the peripheral region is narrowed. On a substrate of the liquid crystal display device, a pixel region which is comprised of a plurality of gate lines and a plurality of drain lines and a peripheral region which surrounds the pixel region are formed. A turn-on inspection terminal of the liquid crystal display device are formed on the peripheral region and a semiconductor chip for driving liquid crystal is formed on the inspection terminal. The semiconductor chip is electrically insulated from the inspection terminal.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: July 31, 2007
    Assignees: Hitachi Displays, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiroko Hayata, Nobuyuki Ishige, Hitoshi Komeno
  • Patent number: 7238582
    Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: July 3, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiromi Shimamoto, Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Yoichi Tamaki, Takashi Kobayashi, Toshiyuki Kikuchi, Takahide Ikeda
  • Patent number: 7209103
    Abstract: A projector includes a liquid crystal display device has a liquid crystal display panel and a display control device coupled to the liquid crystal display panel. The display control device is composed of a first section for receiving an externally supplied video signal, and a second section succeeding the first section and coupled to the liquid crystal display panel. The second section is formed of a circuit for amplifying and converting the video signal into an ac signal supplied from the first section, and a drive pulse circuit for outputting drive pulses for driving the liquid crystal display panel. The first section and the second section are fabricated on first and second substrates separate from each other, respectively. The second section is disposed proximately to the liquid crystal display panel, and the first section and the second section are coupled via a flexible cable.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: April 24, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Toshio Maeda, Akihiro Watanabe, Yoshio Maruoka, Toshiki Misonou, Hideki Nakagawa
  • Patent number: 7203116
    Abstract: With the objective of providing a semiconductor memory device which is made identical in usability to a static RAM by use of dynamic memory cells and realizes a high-speed memory cycle time, there is provided a pseudo static RAM having a time multiplex mode which, when instructions for a memory operation for reading memory information from each of memory cells each requiring a refresh operation for periodically holding the memory information, or writing the same therein is issued, carries out an addressing-based autonomous refresh operation different from the memory operation before or after the memory operation. The pseudo static RAM includes address signal transition detectors for a row and a column, and a page mode which independently performs a column address selecting operation according to an address signal transition detect signal of the second address signal transition detector.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: April 10, 2007
    Assignees: Renesas Technology Corp., Hitachi Device Engineering Co., Ltd.
    Inventors: Hideharu Yahata, Masashi Horiguchi, Yoshikazu Saitoh, Yasushi Kawase
  • Patent number: 7199648
    Abstract: A semiconductor integrated circuit is provided having first and second logic circuits coupled to first and second sub-power supply lines, respectively. First and second switching transistors are also provided to connect the first and second sub-power supply lines to a main power supply line. The first and second switching transistors are kept off in an operation stop state of the first and second logic circuits, and are kept on in operable state of the first and second logic circuits.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: April 3, 2007
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Masashi Horiguchi, Yasushi Kawase, Takesada Akiba, Yoshinobu Nakagome, Kazuhiko Kajigaya
  • Patent number: RE40130
    Abstract: Herein disclosed are a liquid crystal display device and a data processing device, which can have their frame portions reduced in area to reduce the size and weight by extracting the terminals of video signals to only one side of a liquid crystal display panel and by arranging a video signal line driving circuit substrate to be connected with the terminals, only at one side of the display panel.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: March 4, 2008
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kaoru Hasegawa, Yoshio Toriyama, Naoto Kobayashi, Katsuhiko Yarita, Hironori Kondo, Masahiko Suzuki, Yoshihiro Imajo