Abstract: A DC power supply device comprises an AC/DC converter 1, a DC/DC converter 2, and a DC converter 3 converting DC power from a battery 4 to DC voltage for connecting to output terminals of the AC/DC converter. The DC power supply device is provided with a controlling circuit 100 which observes a charging control level and a load sharing level, impresses a charging command on a UPS controlling part controlling the DC converter, and simultaneously provides a PFC controlling part controlling the AC/DC converter with a current command when a voltage level is less than the charging control level, stops only the charging command when the voltage level is more than the charging level and less than the load sharing level, and provides the UPS controlling part and the PFC controlling part with current commands when the voltage level is more than the load sharing level.

Abstract: An image input system includes a solid state image pickup device and a preprocessor for performing correlated double sampling amplification on an output of the image pickup device and outputting a video signal. The preprocessor has a correlated double sampling amplifier for outputting signal information corresponding to a difference voltage between the black level in a feedthrough period of the image pickup device and a signal level in a charge signal output period; and an offset cancelling circuit for cancelling an offset voltage corresponding to the difference voltage in a state where the image pickup device is optically interrupted to the input terminal of the correlated double sampling amplifier. The correlated double sampling amplifier cancels out the offset voltage and the offset cancelling voltage as signal components of polarities opposite to each other, so that circuits following the correlated double sampling amplifier are not influenced by the offset voltage.

Abstract: A direct-current power-supply apparatus provided by the present invention comprises a switching converter for converting an input direct-current power into another direct-current power, a control circuit and an isolation means. The switching converter has a main switch device for generating a pulse voltage from the direct-current input, a synchronous-rectification circuit on the output side of the switching converter and a reverse-current-blocking switch. On the other hand, the control circuit includes a PWM formation unit for driving the main switch device, a synchronous-rectification control unit for controlling an operation to drive the synchronous-rectification circuit and a driving control unit for controlling an operation to drive the reverse-current-blocking switch. The control circuit operates by using a common electric potential appearing on the output side of the switching converter as a reference electric potential. A driving signal is applied to the main switch device through the isolation means.

Abstract: A high frequency power amplifier module is provided for improving output controllability. A wireless communication apparatus incorporates a high frequency power amplifier module in a multi-stage configuration including a plurality of cascaded MOSFETS. The power amplifier module comprises a bias circuit for generating a gate voltage in response to a power control voltage (vapc) generated based on a power control signal of the wireless communication apparatus. The gate voltage has a bias pattern which presents smaller fluctuations in output power in response to a control voltage (Vapc) in a region near a threshold voltage (Vth) of the MOSFETs in respective amplification stages. In this way, the controllability for the output power is improved. More specifically, the power amplifier module has a gate bias circuit for generating the gate voltage (Vg) which follows a gate voltage pattern.

Abstract: A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

Abstract: Disclosed herein is a technique which performs the thinning of a wafer and the separation thereof from a support substrate with high yields and in a short time. Described specifically, a hole-free support substrate is bonded to a second surface of a support substrate having holes with an adhesive layer melted by heating so as to bloc the holes. A wafer is bonded to a first surface of the support substrate having the holes with an adhesive layer melted by solvent. The wafer is thinned by grinding and etching. The adhesive layer is melted by heating and the support substrate having the holes is slid with respect to the hole-free support substrate to thereby separate the support substrate having the holes from the hole-free support substrate. Further, the adhesive layer is melted by solvent from the holes defined in the support substrate having the holes to thereby separate the wafer from the support substrate having the holes.

Abstract: In a driving power IC including a starter circuit comprising a main-switch (MS) transistor, a starter switch (SS) for starting the MS transistor and a start resistor (or a resistor element) SR, the start resistor is created on a field insulation film. In a periphery area of a chip for integrating the driving power IC, that is, on a semiconductor substrate's surface beneath the field insulation film, field limiting rings (FLRS) are created, enclosing an active area in a multiplexed state. The resistor element is extended from a start edge on the inner side of a group of said field limiting rings to an end edge on the outer side of the group, having a zigzag shape.

Abstract: An image input system comprises a solid state image pickup device and a preprocessor (3) for performing correlated double sampling amplification on an output signal of the solid state image pickup device and outputting a video signal. The preprocessor comprises: a correlated double sampling amplifier (30) for outputting signal information corresponding to a difference voltage between the black level in a feedthrough period of the solid state image pickup device and a signal level in a charge signal output period; and offset cancelling means (38) for applying an offset cancelling voltage for cancelling an offset voltage corresponding to the difference voltage between the black level and the signal level in a state where the solid state image pickup device is optically interrupted to the input terminal of the correlated double sampling amplifier. The correlated double sampling amplifier cancels out the offset voltage and the offset cancelling voltage as signal components of polarities opposite to each other.

Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.

Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is larger than that applied to an earlier preceding stage.

Abstract: A semiconductor device comprises: a first semiconductor chip having a control circuit; a plurality of second semiconductor chips whose operation is controlled by the control circuit; and a resin sealing body for sealing the first semiconductor chip and the plurality of second semiconductor chips, wherein: the first semiconductor chip is arranged in the central portion of the resin sealing body; and the plurality of second semiconductor chips are arranged on a periphery of the first semiconductor chip. A fuse element is further arranged outside the plurality of second semiconductor chips.

Abstract: A high frequency power amplifier module of a multistage amplifier construction comprising: an input terminal; an output terminal; a control terminal; and a mode switching terminal. The first amplification stage includes a dual gate FET, and a bias voltage according to a signal is applied to the first gate and the second gate of the dual gate FET from the control terminal and the mode switching terminal, and a radio signal from the input terminal is applied to the second gate such as the source of the dual gate FET. In dependence upon the signal from the mode switching terminal, the mode of the high frequency power amplifier module is for the GSM (i.e., for a non-linear amplifying action) and for the, EDGE (for a linear amplifying action).

Abstract: Two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units. A memory module is so constructed that a plurality of such semiconductor storage devices, in each of which two memory chips each being subjected to memory accesses in 2-bit units are assembled into a stacked structure by placing their back surfaces one over the other, so as to make memory accesses in 4-bit units, are mounted on a mounting circuit board which is square and which is formed with electrodes along one latus thereof.

Abstract: A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat-radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.

Abstract: To reduce power consumption by increasing amplifying efficiency in a low power mode, there is provided a radio communication apparatus in which each of field effect transistors of a radio frequency power module in a multi-stage configuration is controlled by an APC circuit based on a power level instruction signal, and in which a correction circuit is incorporated between the gate of a final stage transistor and the APC circuit to apply a linear gate voltage to the final stage transistor when a High level signal based on the power level instruction signal is applied and to provide a maximum gate voltage of the final stage transistor which is equal to or lower than the gate voltages of other transistors and whose rate of increase relative to the output voltage of the APC circuit gradually reduces when a Low level signal based on the power instruction signal is applied.

Abstract: A power supply apparatus includes a semiconductor switching device for outputting power and a control circuit for controlling the on/off operation of the semiconductor switching device. The control circuit includes a circuit for applying, when turning on the semiconductor switching device, a first control signal corresponding to the difference between the output voltage of the power supply apparatus and a first reference value to the semiconductor switching device in accordance with the increase in the output voltage from the power supply apparatus thereby to operate the semiconductor switching device in a non-saturated area, so that the semiconductor switching device is turned on gradually.

Abstract: Disclosed herein is a semiconductor device in which a main surface of a semiconductor chip is placed over a first main surface of a wiring board so as to be opposed thereto and which includes a plurality of external terminals provided over a second main surface of the wiring board. The plurality of external terminals have a plurality of signal terminals and a plurality of power terminals. The signal terminals are arranged along the periphery of the wiring board and the power terminals are arranged along the inside of a row of the signal terminals. Chip capacitors are placed over the main surface of the semiconductor chip, which lies inside a row of the power terminals. The plurality of signal terminals and power terminals formed over the main surface of the semiconductor chip are connected to a plurality of wires formed over the wiring board respectively. The wiring board is provided with an opening or recess which extends therethrough. The chip capacitors are located within the opening or recess.

Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.

Abstract: Disclosed herein is a high frequency power amplifier system having a transistor comprised of a first electrode, a second electrode and a control electrode and for controlling current which flows between the first electrode and the second electrode by applying a potential to the control electrode, and a resistance type potential divider circuit for determining a dc bias potential applied to the control electrode of the transistor, and wherein an input signal is inputted to the control electrode, an output signal is outputted from the first electrode and a control signal is inputted to the resistance type potential divider circuit. One resistor of the resistance type potential divider circuit is comprised of a temperature compensating resistor whose resistance value varies linearly, so that a temperature characteristic of an idle current defined as an output when the control signal is not inputted, assumes a negative temperature characteristic.

Abstract: A memory module MM, in which a module wiring substrate 5 is equipped with function switching means KK1 and KK2 for arbitrarily switching function switching signals to be inputted to function switching pins FP0 and FP1 of memories 1. By these function switching means KK1 and KK2, moreover, the function switching signals are arbitrarily switched from any of no connection, a supply voltage Vcc and a ground potential Vss. These signals are inputted altogether to all the mounted memories 1 to switch and arbitrarily set functions including reading modes and refresh cycles.