Abstract: In a computer system having a hardware and/or firmware design problem which causes a false boundary error under certain conditions, the subject method serves to handle and correct the false boundary error condition in the operating system. This recovery process is carried out such that the information from which the faulting address was developed is redistributed among a plurality of information components in such a manner that the false boundary error will not recur on retry. Thus, the process masks the problem by remapping the virtual address components of the faulting instruction so that the final virtual address, though identical to the failing one, is processed without fault by the central processor unit during recovery.

Abstract: In order to determine if a micropackage containing a plurality of integrated circuits, at least some of which are supplied with a reference voltage, should be classified as "risky" the reference voltage current is measured for each micropackage in a group of logically identical micropackages. The measurements are arranged for statistical analysis, and an initial threshold is selected above which a micropackage is classified as "risky". The subsequent history in operation of measured micropackages, as well as reference voltage measurements on additional newly fabricated like micropackages, is entered into the database to permit refining the position of the threshold. In one variant, all micropackages in an initially measured group are "passed".

Abstract: A computer aided software engineering tool is disclosed which is particularly well adapted to identify potential Assembly language source code errors resulting from the analysis of statements which do not contain incorrect syntax, limits, operand specification, etc.; i.e., do not contain any errors of the type which can be generally categorized as incorrect usage. This objective is achieved by providing a debugging program which has a complete awareness of the specific machine architecture, such as the function of each instruction and the register(s), flags, etc. it affects.

Abstract: A data processing system includes the functionality of a commercial instruction processor, a scientific instruction processor and a basic instruction processor integrated into a single semiconductor logic element.

Abstract: Apparatus is disclosed for incorporation in a central processing unit that permits a testing procedure to be executed on the central processing unit in a manner that simulates the normal operation of the central processing unit. The apparatus includes an auxiliary memory unit, in which the test programs are stored, and an auxiliary processor for controlling the central processing unit when the test procedure is initiated and for preparing the central processing unit for execution of the test procedures. Control apparatus of the central processing unit executes the test program retrieved from the auxiliary memory unit. The auxiliary processor regains control of the central processing unit after the test program has been executed, tests the results of the test procedure and returns control to the central processing unit.

Abstract: A protective grounding and referencing arrangement for a high-voltage, high-energy bulk supply is provided in the present invention. Isolation from ground is provided through the use of an isolation transformer connected between the a-c utility supply and the rectifiers which are provided for conversion to d-c. The d-c bus and its energy storage capacitors are then referenced to ground by a high resistance divider network. In such an arrangement the likelihood of an insulation breakdown to ground is significantly reduced. More importantly, in the event that such a breakdown should occur from one or the other terminal of the d-c bus the fault currents that result are limited by the referencing arrangement to a safe level. The energy hazard is thus very significantly reduced for the equipment.

Abstract: In a two-page printer system, there is included a first and second print engine placed on a path in which paper to be printed travels and displaced a distance, L, from one another along the path, the first print engine printing a first side of the paper and the second print engine printing a second side of the paper. The two-page printer system also includes an apparatus for coordinating the printing of the paper, the two-page printer further including a process controller for generating control signals. The apparatus comprises a first storage element for storing information to be printed. A processor element, operatively connected to the first storage element, formats the information to be printed in a form required by the printer, the information to be printed being fetched from first storage element.

Abstract: A distrbutor for the central execution pipeline unit of a central processor of a data processing system, which central processor has a plurality of execution units. The distributor serves as a communications center by which machine words, such as operands, are transmitted primarily from the cache unit of the central processor unit to execution units and the instruction fetch unit of the central processor unit. Some machine words are transmitted directly from the collector unit to selected units and others are transmitted after being stored in the data register of the distributor. Machine words stored in the data register can be realigned if required by an instruction by character or word alignment switches. The aligned words are then stored in the data register means prior to their being transmitted to units of the central processor.

Abstract: Motor control apparatus is described that is used in a printer that prints on a paper web coming from a roll of paper and has two-sided printing capability using two print mechanisms. The motor control apparatus controls power to several DC motors that either move the paper web from a roll through the printer or provide back tension to the paper web. The control circuits sense paper travel speed and motor loading and thereby sense the effects on paper tension caused by others of the control circuits. The interaction of motor torques provided by the control circuits maintains constant tension on the paper web throughout the printer and thereby assures that there is front to back printing registration on each two-sided printed sheet, and also assures that there is top to bottom centering registration of printing on each sheet of paper when the paper web is cut into individual sheets of paper.

Abstract: In a data processing system, there is included a central processing unit (CPU) and a main memory for storing computer words, the CPU including a cache unit. In operation, the CPU requests that a computer word be fetched, the computer word to be fetched being identified by a real address location corresponding to a location where the predetermined computer word is stored in main memory. The CPU request to fetch the computer word is coupled through the cache unit such that the cache unit determines whether the computer word is stored within the cache unit. The cache unit comprises a cache for storing predetermined ones of the compter words. A directory is included for storing partial real address information to a corresponding computer word stored in the cache. A detecting element, operatively connected to the cache and to the directory, determines when a hit occurs without any errors.

Abstract: A data processing system includes a logical address to a physical address translator in an extended memory management unit. A 128 word memory stores task segment descriptor words which include a base address. A 16 word memory stores corresponding present bits to indicate if the addressed task segment descriptor is present in its memory. This arrangement allows a 128 word memory to be cleared in 16 memory cycles.

Abstract: A method and apparatus features a system for automatically monitoring the operating environment and other physical conditions around and in which a host computer system operates. Sensors located around a computer system, including inside equipment cabinets and under the floor where cabling and air are ducted, are used to collect data that is frequently and periodically collected and stored along with an indication of the time and data of collection. The stored data is checked against a list of environmental parameters for the location of each sensor and an indication given when measurements indicate an environmental condition is outside discrete limits and rates of change of conditions. The stored parameters may be changed at any time from a console of the computer system.

Abstract: A data processing system includes a first and a second central system wherein the central processing unit (CPU) of the first central system is operatively connected to the system control unit (SCU) of the second central system and the CPU of the second central system is operatively connected to the SCU of the first central system, each central system including a service processor and a timing subsystem for providing clocking signals. Each central system includes an apparatus for distributing the clocking signals such that each central system is clocked from predetermined ones of the clocking signals in response to control signals from the service processors. The apparatus permits the distribution of the clocking signals to be switched dynamically while the central systems are operating, the switching of the clocking signals being accomplished without affecting the operation of the central systems. The apparatus comprises a generating element for generating local clocking signals.

Abstract: The apparatus controls access to at least one subsystem in response to requests for access from a plurality of equipments operatively connected to a corresponding port of said apparatus. The requests for access have a plurality of command levels wherein the command levels have a fixed predetermined priority relative to each other. The apparatus comprises a plurality of port request control elements for generating a plurality of specific request signals including a command level request signal to indicate the command level of a request received from the corresponding equipment, and a go signal to indicate the availability of the apparatus and the subsystem in order to execute the command requested. An activity priority select control element receives the specific request signals, and processes the go signals from each of the port request control elements to grant access within a predetermined time period to the equipment connected to the port having the highest port priority within the highest command level.

Abstract: A loader and unloader mechanism is attached to a standard photoplotter equipment. The mechanism performs a sequence of operations for loading and unloading sheets of film onto and from respectively such equipment completely automatically.

Abstract: A phase lock circuit for compensation for bit frequency variations of information read from a movable magnetic media including a phase comparator, a number of low pass filters, a decoupling element and variable frequency oscillator which is temperature compensated.

Abstract: A translator is organized to include at least a pair of content addressable memories (CAMs), each for storing a different portion of the total number of bits of each of the words to be translated. The outputs from each CAM are logically combined within a multiple input random access memory (RAM). Both CAMs are interrogated simultaneously and deliver the results of comparing the word portions of an input word and the CAM contents to the RAM in substantially less time then required for a single CAM memory. The results are logically combined with in the RAM which, in response to a match condition, delivers the results of the translation as an output.

Abstract: A gas distribution system provides a gas to a chamber comprising a feed tube, having a tube-like configuration with an input and an output. The gas supplied to the input escapes via the output, the output being configured to have a first and second slot opening. The first slot opening has a predetermined first length along the length of the feed tube and has a predetermined first width across the length of the feed tube, and the second slot opening has a predetermined second length along the length of the feed tube and has a predetermined second width across the length of the feed tube. The second slot is contiguous with and abuts the first slot, and further the predetermined second width is smaller than the predetermined first width. The first and second slot configuration provides the gas at the output at a predetermined pressure, the predetermined pressure being reduced from an area near the output.

Abstract: A multifunction arithmetic indicator that is associated with and controlled by an arithmetic logic unit (ALU) to store standard arithmetic indicator information such as overflow, carry, arithmetic sign and all bits equal zero that are generated by the ALU when processing binary information. A control unit sends control signals to multiplexers in the multifunction arithmetic indicator that cause the selection of appropriate arithmetic indicator information from the ALU, no matter what the bit length of binary words being processed by the ALU. The selected indicator information is stored in a register for later use.

Abstract: Memory failure detection apparatus is disclosed which is used with a large capacity memory that is organized in banks of memory, and with which error correction circuitry is used to correct correctable errors and provide an indication of same. The detection apparatus is responsive to the error indications and to a bank select addressing signal to provide and store error counts for a bank or banks of memory located on each memory board. A system processor periodically reads the error counts and responds to same to provide a maintenance message indicating that a specific memory board is to be replaced.