Abstract: An integrated circuit formed on a semiconductor substrate has a contact pad for communicating signals between an external device and an internal signal line. The pad is protected by an SCR that conducts electrostatic discharge pulses from the pad directly to a current sink. The SCR includes a subregion underneath a field oxide that has a field inplant that increases the dopant concentration. The field implant lowers the SCR trigger voltage, so that SCR triggers before an ESD pulse can cause latch-up or damage in other devices in the integrated circuit.

Abstract: The invention concerns a stylus for use with a digitizing tablet, such as that associated with the display of a portable computer. The stylus contains memory which stores data such as operating state (i.e., states of user-controlled buttons, state of charge of battery), a stylus identification code, and fault codes, which indicate error conditions which arise. The invention transmits the contents of memory, by a serial bit stream, to the computer.

Abstract: An electrostatic pen is disclosed wherein the pen's tablet engaging tip is both electrically conductive and flexible, thus providing an increasing tip contact area to a digitizing tablet as the tip of the manually held pen is pressed downward onto the tablet's top insulating layer. A signal source and signal detector are connected in series between the pen tip and the tablet's lower conductive layer. The increased contact area of the tip increases the capacitance between the tip and the tablet's lower conductive layer, thus improving the signal to noise ratio of the detected signal.

Abstract: Improved thin film transistors to reduce defects in the devices incorporating the transistors, including active matrix displays. A first improvement is accomplished by forming a dual insulator layer over the bottom metal layer, which can be the gate line and also the row line in an active matrix display. The first insulator layer is formed by anodizing the metal layer and the second insulator layer is deposited onto the first layer. The dual insulator structure layer can be reanodized to eliminate the effect of pinholes. A second improvement includes providing an interdigitated transistor structure to increase the channel width, minimize internal shorting and minimize the drain capacitance. The interdigitated structure includes at least one source or drain finger formed between at least two drain or source fingers, respectively. A shorted source finger can be disconnected to maintain an operative transistor.

Abstract: The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant space.

Abstract: A transmit scheduler maps connections to scheduled time slots in an ATM network in such a manner that minimizes burstiness in an output cell stream. The smoothness in the resulting cell streams reduces the probability of loss in the network and also assures that a connection does not exceed a preestablished bandwidth. The invention can be utilized with service with a constant bit rate (CBR), a variable bit rate (VBR) and an available bit rate (ABR) traffic. Bandwidth factors are established for cells to be transmitted as a percentage of total bandwidth of the ATM network. Lists are maintained for cells to be transmitted with each list assigned a bandwidth factor. The total bandwidth in the ATM network is apportioned into time slots according to established bandwidth factors and with different bandwidths being multiplexed across the total bandwidth. Cells are selected for transmission from the list of cells in accordance with available time slots and the bandwidth factors thereof.

Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.

Abstract: The invention concerns a stylus for producing a high-voltage, sinusoidal signal for an electrostatic digitizing pad. The high voltage is obtained by applying a sine wave to one lead of the primary of a transformer, and applying the inverse of the sine wave to the other lead of the primary. The secondary of the transformer produces the high voltage, which is developed into a signal which is applied to the digitizing pad.

Abstract: The present invention provides for a method and apparatus which is coupled to broadcast signals, such as television signals, and a television set for displaying broadcast programs and channels. The apparatus displays broadcast programs on selected channels to a viewer, marks one or more of the programs in response to a first signal from the viewer, marks one or more of the channels in response to a second signal from the viewer, stores signals corresponding to the marked programs and channels; and sequentially displays the marked programs and channels in response to a third signal from the viewer. To aid the viewer, the present invention also provides for a method and apparatus for displaying broadcast information, such as television signals, on a television.

Abstract: An output driver for mixed voltage systems includes an input line for receiving a signal to be output. The circuit also includes an overvoltage generator, coupled between the input line and an output stage. The overvoltage generator boosts a level of the signal to a second voltage before it reaches the output stage. A restore circuit is also provided which restores the second voltage with every transition of the input signal.

Abstract: A method and apparatus are disclosed for monitoring television viewing activity to determine preferred categories of programming and preferred channels of a viewer. To facilitate viewer access to preferred programming, the display of an electronic program guide may be configured in accordance with the monitored viewing activity to provide fast access to the preferred programming. The monitored viewing activity may also be used to provide a lock-out feature to prevent or limit the viewing of specified channels or categories of programming, or to identify and provide information of interest from the internet. In yet another embodiment of the invention, a viewer may automatically circulate through his or her preferred programming, as determined by monitoring the viewing activity of that viewer.

Abstract: The clock rate for a device is controlled through the use of integrated circuits which respond to the temperature of the device. Circuitry is added to the integrated circuit device being controlled which changes the clock rate of the device as the device temperature changes. The device clock is thus regulating by the temperature of the device. The way in which the regulation is implemented can be varied, from slowing an internally generated clock rate, or by digitally scaling an external clock input. Synchronous scaling is also provided, such that devices which are connected external to the CPU can still be clocked at the same external rate, but CPU transactions within the CPU may occur at a different rate depending on the CPU's measured temperature. This invention also provides the ability to selectively reduce or stop certain areas of an integrated circuit relative to pending operations or instructions being executed.

Abstract: A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later.

Abstract: An intuitively operated Electronic Program Guide (EPG) which presents program guide information in table form at two levels of resolution. Schedule information is presented in icon form over a long time window while textual information is presented for a viewer-selected time slot. The selected time slot may appear to be a magnified representation of the long time window view. In this way, a television screen of conventional resolution may present at least five hours of schedule information for eight channels. The viewer may operate the Electronic Program Guide (EPG) intuitively with simple remote control commands.

Abstract: An architecture for distributing digital information to subscriber units wherein selection from among multiple digital services is accomplished by transmitting a tuning command from a subscriber unit to an intermediate interface. The intermediate interface selects the desired service from a broadband network and transmits it to the subscriber unit over a bandwidth-constrained access line. The bandwidth-constrained access line may be implemented with existing infrastructure, yet the subscriber unit may access a wide variety of digital information available on the broadband network. Universal broadband access is thus provided at low cost.

Abstract: A video memory device has a normal write mode and a block write mode, and includes a global write driver driving global input/output (I/O) lines, and a number of local write drivers, each driving local I/O lines coupled to a number of memory cells. Control circuitry is coupled to the global write driver and to the local write drivers, and is adapted to generate block write control signals and normal write control signals. The block write control signals cause the write data path to freeze during a block write cycle, thereby conserving power during block writes.

Abstract: A semiconductor structure comprising a polysilicon pad, a metal pad separated from the polysilicon pad by an insulator, and a metal via connecting the pads. A fuse is formed at the intersection of the polysilicon pad and via.

Abstract: A single-edge triggered phase detector which provides high speed phase detection. The phase detector works on only a single edge of the clock and data signal, which can be either the rising or falling edge. Extracted control signals are latched for at least one half of a clock period or more to ensure full rail to rail swing.

Abstract: A method and architecture for a graphics controller chip. The graphics controller has a display memory for storing video and graphics data. It also has a logic controller, connected to the memory, for performing logic operations on data stored in the memory. Video and graphics data is made available to the graphics controller at a single access port. The graphics controller also has an address range detector for checking the address of the data provided to the port and for disabling logical operations of the logic controller when the address indicates the presence of video data. The video data is thereafter transferred to the display memory on a priority basis.

Abstract: A method of planarizing a non-planar substrate, such as filling vias and contact holes, spreads a suspension of a conducting material suspended in a liquid on a substrate. The suspension includes an organometallic material, preferably with particles of a polymerized tin or indium alkoxide. The material is spread by spinning the substrate after applying the suspension. The carrier liquid and organic groups are removed by baking and curing at elevated temperatures, thereby depositing the conductive material on the substrate in a layer which is more planar than the substrate and which has regions of greater and lesser thickness. A relatively brief etch step removes conductive material from regions of lesser thickness, leaving material filling vias or contact holes.