Abstract: The present invention features a process and a resulting article in which copper-based multilevel interconnects are fabricated. The copper-based multilevel interconnect formed by the inventive process first includes the process step of depositing a pattern of copper lines upon or in an applicable substrate, such as silicon dioxide. The copper lines are approximately one micron thick. The lines are coated with approximately 50 to 100 nm of titanium by sputter deposition, and undergo subsequent annealing at approximately 300.degree. C. to 400.degree. C. in an argon ambient. The titanium and copper layers are annealed to provide a Cu.sub.3 Ti alloy at the copper/titanium junction. The unreacted titanium between the copper features is then stripped away by dry etching with fluorine-based etch. The remaining Cu.sub.3 Ti alloy is subsequently transformed into TiN(O) and copper by a rapid thermal annealing in an NH.sub.3 atmosphere at an approximate temperature of below 650.degree. C.

Abstract: A method is disclosed to increase the critical transition temperature of superconducting materials by the selective application of stress to specific crystal directions. It has been found that by applying tensile stresses in certain directions and compressive stresses in other directions that the critical temperature of superconducting materials can be substantially increased.

Abstract: A liquid heat sink is provided that employs natural convection of a liquid coolant (18') to cool a printed circuit board (14) on which are mounted a plurality of heat-generating components (12). In particular, the spacing d between the heat-generating components and a cold plate (20) used to cool the liquid must be such as to provide a Rayleigh number of at least about 1700 in the Rayleigh equation: ##EQU1## In the above equation, g is the acceleration of gravity, .beta. is the volumetric coefficient of expansion of the liquid coolant, T.sub.1 is the temperature of the cold plate, T.sub.2 is the temperature of the component to be cooled, .nu. is the kinematic viscosity of the liquid coolant, and .alpha. is the thermal diffusivity of the liquid coolant.

Abstract: A method and apparatus teaching insertion of addressing indirection to form and to access an array hierarchy expressly permitting the concurrency of a high level RAID array, the bandwidth and degraded mode operation sustainable by a lower level RAID array, and after a DASD failure minimum spanning involvement when the array is rebuilding and rewriting missing data to a spare logical device. Also, disclosed are the accessing of variable length records on the array hierarchy; array hierarchy in which RAID 5 arrays have dissimilar number of logic devices (lower level RAID arrays) and interleave depths; formation of logical arrays using fractional storage defined onto real DASD subsets; and the defining of logical devices onto DASDs distributed in the same or different physical clusters of DASDs and the rebuild operation thereof.

Abstract: A debris control system is provided for an electron-beam drilling apparatus having a chamber encompassing a drilling area and a calibration area. The debris control system includes a calibration-area shielding assembly which shields a calibration area of such apparatus from drilling-generated debris and an isolation assembly which isolates drilling-generated debris within such drilling area.

Abstract: A method for processing distributed application programs in SNA type networks employing LU 6.2 protocols, including an information processing system having a host processor, a virtual machine type Operating System, and a plurality of Intelligent Work Stations (IWSs). The Operating System is provided with a Virtual Machine Pool Manager (VMPM). The function of the VMPM is to create and dynamically manage the assignment of a plurality of virtual machines in the pool to process requested individual LU 6.2 conversations, to permit the transfer of information between Parts A and B of a distributed Application, which parts are stored respectively at one IWS and the host processor. In response to a conversation request, an idle Virtual Machine (VM) in the pool is assigned by the VMPM to process one LU 6.2 conversation.

Abstract: Fault tolerance in a redundant array of disk drives is degraded when error conditions exist in the array. Several methods for rebuilding data of the array to remove the degradation are described. Data rebuilding for entire disk drives and partial data rebuilds of disk drives are described. All rebuild methods tend to reduce the negative affect of using array resources for the data rebuild. In one method rebuilding occurs during idle time of the array. In a second method rebuilding is interleaved between current data area accessing operations of the array at a rate which is inversely proportional to activity level of the array. In a third method, the data are rebuilt when a data area being accessed is a data area needing rebuilding.

Abstract: An interactive display system including: a first display; a movable display device having a second display which is substantially smaller than the first display, an input device for inputting information, and a position sensor for providing position information of the movable display device relative to the first display; and a computer, coupled to the first display and the movable display device, for storing image information for the first and second displays. The computer supplies stored image information to the second display in response to the position information provided by the position sensor of the movable display. In another embodiment, the first display is replaced with a model or a physical object, and the computer supplies image information to a display in response to position information provided by the position sensor representing the position of the movable display device relative to the model or physical object.

Abstract: An atomic force microscope that performs both atomic force and surface potential measurements on a sample comprises a conductive probe beam that includes two segments, a first segment exhibiting a first mechanical resonant frequency and a second segment exhibiting a second different mechanical resonant frequency. An actuator causes oscillations in the probe beam at the first mechanical resonant frequency. An oscillator applies to the probe beam a signal having a frequency equal to the second mechanical resonant frequency. Due to the potential difference between the probe beam and the sample, a force results that causes the probe beam to vibrate. The probe beam is moved over the sample's surface in a direction parallel to the surface. An optical heterodyne system senses movements of the probe beam at both the first and second resonant frequencies and provides an output signal indicative of the second resonant frequency movement of the probe beam's second segment.

Abstract: A pipeline data processor is simultaneously operable in a pipeline mode, a parallel mode and a vector mode which is a special case of the pipeline mode. Each pipeline stage has its own stage program counter. A global program counter is incremented in the pipeline mode. The instruction addresses generated in the global program counter are distributed to those pipeline stages which first become available to perform pipelined data processing. Any given pipeline stage may dynamically switch between pipeline mode and a parallel mode in which the stage program counter counts and supplies instruction addresses independently of any other pipeline stage. A vector mode uses pipeline instructions which are repeated to enable any number of the pipeline stages to participate in vector calculations. In the vector mode, one pipeline instruction address is held in the global program counter to be repeatedly supplied to respective first available pipeline stages until the vector calculations are completed.

Abstract: A logic system including a first logic block for providing first differential outputs; a second logic block, identical to the first logic block, for providing second differential outputs; a fault detecting device, coupled to the first logic block, for detecting a fault in the first differential outputs; and a selecting device, coupled to the first and second logic blocks and to the fault detecting device, for selecting an output of one of the first and second logic blocks depending on whether the fault detecting device detects a fault.

Abstract: A method and apparatus for releasing a workpiece from a substrate including providing a substrate which is transparent to a predetermined wavelength of electromagnetic radiation; forming, on the substrate, a separation layer which degrades in response to the predetermined radiation; providing the workpiece on the separation layer; and directing the predetermined radiation at the separation layer through the transparent substrate so as to degrade the separation layer and to separate the workpiece from the substrate.

Abstract: Low bandwidth telecommunications channels are transformed into a high bandwidth telecommunications channel by determining the relative transmission delays among a plurality of relatively low bandwidth channels which are to be combined into a relatively high bandwidth communications channel. The transmission time delay across the plurality of low bandwidth channels is then equalized so that the time delay equalized low bandwidth channels combine to effectively form a single high bandwidth channel. The relative transmission time delays among the low bandwidth channels may be determined by transmitting an alignment (synchronization) signal across each of the low bandwidth channels, receiving the alignment signal from each of the low bandwidth channels, and measuring the time differences among the received alignment signals at each of the low bandwidth channels.

Abstract: A TAB (tape automated bonding) tape is disclosed which includes one or more openings, each adapted to receive a semiconductor chip, and electrical leads extending into each such opening. Significantly, this TAB tape also includes a device for preventing a semiconductor chip, positioned within a tape opening, from being lifted toward a bonding tool as a result of electrical leads adhering to the bonding tool, when the bonding tool is used to bond contact pads on the semiconductor chip to the leads extending into the opening.

Abstract: A nonvolatile storage system including several data storage arrays; a counter storage array for storing values indicating the remaining useful life of each of the data storage arrays; and a device for controlling access to each of the data storage arrays as a function of the values stored in each counter array. The counter array has an appreciably longer useful life than any of the data storage arrays.

Abstract: A process of patterning a conductive layer on a substrate avoiding webbing yet permitting high density patterning places two layers between the resist and the metal. The first layer is an antireflective coating such as titanium nitride applied to the metal. The second layer is a barrier comprising silicon such as sputtered silicon or SiO.sub.2. The barrier layer may also be a thin coating of spin-on glass. The barrier layer prevents interaction between the TiN and acid groups which are generated during exposure of the resist. With this structure in place the resist is applied, exposed and developed.

Abstract: Shielding materials used in electromagnetic digitizers which are packaged in a notebook computer environment. Shielding materials with sufficiently high magnetic permeability to increase the magnetic signal detected by the digitizer sensor grid can be used in such an environment, and can be placed in direct contact with the sensor grid. Aluminum or copper shields can also be placed in direct contact with the sensor grid to provide the requisite shielding. A combination of conductive and ferrite material can also be used as the conductive base material provides for shielding and a layer of ferrite material increases the magnetic signal and prevents signal attenuation by the conductor.

Abstract: An apparatus for correcting a faulty microcode contained in a control store of a microprogrammed processor. The apparatus comprises two functional parts; namely, the detection circuit for detecting operational codes that correspond to faulty microinstructions in the main control store ROM of the system and a programmable array which is used as the storage area for substitute microinstructions. The detection circuit is a circuit which operates as a logic NOR circuit and is utilized to detect valid operational codes of macroinstructions that correspond to microcode sequences that contain errors or faults. The programmable array consists of two loadable RAM's which contain error free microcode to replace the faulty microcode. The detection and correction occurs in parallel with the instruction decoding so that it does not have any impact on system cycle time.

Abstract: One or more data-storing disk devices support logical tracks extending between radial recording zones of tracks in the device(s). Each data-storing disk in the device(s) is formatted into a plurality of radial recording zones of physical tracks, each radial recording zone having a like number of physical tracks, each physical track may be one circumvolution of a single spiral track. The physical tracks in the respective recording zones store a different number of data bytes. Each logical track including a plurality of said physical tracks; at least one of the physical tracks in each of the logical tracks is in a different one of the radial recording zones in different ones of the devices or in a single device. Described are an extended logical track and extended logical cylinder accessing methods and apparatus. Not all of the physical tracks of any of the devices or recording zones need be a member of any logical track.

Abstract: A system for testing chips uses a patterned tape having a patterned array of cantilevered contact leads. The tape serves as an interface between the chip under test and a testing unit by providing conductive leads from the I/O terminals on the chip to an off-chip measuring system. The leads on the array may have balls, tips or other shapes on the end to provide contact with the terminals and compensate for height differences. The tape is a single frame or has a series of arrays each positioned around an opening where the chip will be located when a particular pattern is positioned over that chip for test. The pattern on the tape may be the same array or a different array. The tape is indexed to a new pattern when the old one is damaged or no longer needed. Alignment with the chip is by optical sensing and physical pin movement. The tape may have a flap protruding into an aperture and deflectable to provide for planar contact of the leads to the device under test.