Abstract: A silicon-germanium hetero bipolar transistor comprising a silicon collector layer, a boron-doped silicon-germanium base layer, a silicon emitter layer and an emitter contact area. The transistor is fabricated using an epitaxy process on a surface of pure silicon. An electrically inert material is incorporated into the epitaxial layers in order to link the defects in the semiconductor structure and to reduce the outdiffusion of the dopant. Thus, a transistor for high-frequency applications can be fabricated in two ways: to increase the dopant dose of the base region or to reduce the thickness of the base layer. In particular, an implantation or doped region having a T-shaped cross section profile is provided between the emitter layer and the emitter contact area.
Type:
Grant
Filed:
August 30, 2002
Date of Patent:
October 5, 2004
Assignee:
IHP GmbH-Innovations for High Performance
Microelectronics/Institut fur Innovative Mikroelektronik