Abstract: An amplifying circuit comprising an amplifying element and a memory element as well as an element to adjust the signal in an output terminal of the amplifying element to a known level, a measure of the corresponding level in a control terminal of the amplifying element being stored on the memory element.

Abstract: A pixel structure for CMOS imaging applications, the pixel structure including a photosensitive element, a load transistor in series with the photosensitive element, a first reading transistor, coupled to the photosensitive element and to the load transistor, for reading out signals acquired in the photosensitive element and converting the signals to a voltage drop across the load transistor. The gate length of at least the load transistor is increased by at least 10% compared to a gate length of transistors manufactured according to layout rules imposed by a CMOS manufacturing process, thereby increasing the light sensitivity of the pixel structure.

Abstract: Method for semiconductor processing comprising etching of oxide layers, especially etching thick SiO.sub.2 layers and/or last step in the cleaning process wherein the oxide layers are etched in the gas phase with a mixture of hydrogen fluoride and one or more carboxylic acids, eventually in admixture with water.

Abstract: The present invention relates to Silicon Germanium-based Vertical MISFET devices allowing smaller device size and exhibiting significant advantages over prior devices related to the reduction of drain induced barrier lowering and parasitic capacitance and permitting a higher integration density.

Abstract: An apparatus and method for measuring a parameter of a sample or component at a measurement temperature, wherein the parameter and the measurement temperature are measured at substantially the same time. A temperature coefficient of the sample or component is also established by using temperature fluctuations measured at or near the sample at the time at which the parameter is measured. The temperature coefficient is used to correct the measured parameter data and enhance its stability.

Abstract: A method of modeling a programmable processor is particularly adapted for use in an automatic retargetable code generator and instruction set simulator. The method represents the processor as a single graph with vertices and edges. The graph includes the instruction set of the processor and includes information about the hardware of the processor. The graph is linked to tools and libraries required to program and simulate the processor.

Abstract: The present invention relates to RAM circuits comprising memory cells and logic circuitry wherein each of the memory cells comprise at least one Vertical MISFET device comprising a stack of several layers a source layer, a channel layer, a drain layer and a capacitor on the top of the stack of several layers of the Vertical MISFET device.

Abstract: A method of forming refractive microlenses which includes the steps of depositing or growing a first transparent layer on a substrate; depositing or growing a second transparent layer on the first transparent layer; forming a columnar structure in the second transparent layer; forming a pillar in the first transparent layer using the columnar structure as a mask, whereby the pillar is self-aligned under the columnar structure and the pillar has a cross-sectional area smaller than or equal to the cross-sectional area of the columnar structure; thereafter reflowing the second transparent layer of the columnar structure while the pillar remains essentially unaltered, whereby a structure is formed on top of the pillar, the structure having a ground plane with an area smaller than or equal to the original cross-sectional area of the columnar structure; and solidifying said structure.

Abstract: The programmable modem for digital data of the present invention provides a highly programmable, digital modem implemented in an integrated circuit which can be customized to specific applications. The programmable modem uses spread spectrum techniques and is specifically programmable to alter the parameters of the modem to improve performance. The present invention also provides a systematic method and development kit to provide rapid customization of a modem for a particular application or for rapid specification of a high-performance application specific integrated circuit mode.

Abstract: A hardware and software co-design environment and design methodology based on a data-model that allows one to specify, simulate, and synthesize heterogeneous hardware and software architectures from a heterogeneous specification. The environment and methodology of the invention allow for the interactive synthesis of hardware and software interfaces. The environment defines primitive objects to represent a specification of an essentially digital system. The primitive objects are defined by describing the specification of the system in one or more processes, each process representing a functional aspect of the system. Further, each of the processes have ports which are connected to ports of other processes with a channel. The ports structure communication between the processes.

Abstract: The present invention concerns a method of generating code for a programmable processor and comprises several steps. The first step is representing the processor as a directed bipartite graph with first and second sets of vertices and with edges, the graph comprising essentially all information about an instruction set and hardware of the processor, the first set of vertices representing storage elements in the processor, and the second set of vertices representing operations in the processor. The second step includes linking the graph to tools and libraries required for generating code for the processor. The last step is executing the required code generation phases, whereby the required information about the processor is extracted from the graph. The present invention also concerns the application of this method.

Abstract: An optoelectronic cell structure includes a plurality of pnpn-devices and circuitry for driving these pnpn-devices. The anodes or the cathodes of said pnpn-devices tied together form a competition node allowing differential charge amplification to take place. The unconnected electrode of each of the pnpn-devices is driven by a pair of complementary transistors. Light input on the pnpn-devices is converted into charge carriers. A forward bias amplifies the difference in charge content in the pnpn-devices by differential competition. A reverse bias turns off each pnpn-device at its own pace, the turn-off times rendering an estimate of the charge content in each pnpn-device present before turn-off. The total system forms a sensitive optical receiver for use in optical interconnects between two or more locations.

Abstract: A process chamber is described wherein a plasma is generated by electron-cyclotron resonance (ECR) and is isolated from chamber walls by a magnetic field from two diametrically-opposed solenoids. A substance to be deposited on a substrate is introduced into the chamber by laser ablation, evaporation, or other techniques. The ECR plasma has a relatively large volume to ensure a homogeneous influx of material, and a low potential that results in less aggressive ion bombardment of the substrate. The process chamber can be used in a variety of processes, including deposition and oxidation of superconducting metal oxides, and reduction of indium-tin-oxide with nitrogen at low temperatures.

Abstract: A flip-flop-based circuit architecture generates a hazard-free asynchronous signal given the SET and RESET sum-of-product (SOP) solutions to an asynchronous process. The flip-flop SET and RESET SOP solutions can be hazardous. Thus, general purpose synchronous optimization tools (which are indifferent to hazards) can be used to derive the optimal SOP solutions. A fixed layer built around the SOP cores eliminates all hazards in the circuit. In one embodiment, the architecture is optimized by eliminating an RS latch and delay lines in the SOP cores. The architecture of the present invention is guaranteed to admit any semi-modular race-free state graph representation of an asynchronous process that satisfies the n-shot requirement. The state graph representations can be examined to determine if alternate, solution-specific, simplified architectures can be employed that further decrease the final area by the elimination of flip-flops or the elimination of a timing delay.

Abstract: Data storage and transfer cost is responsible for a large amount of the VLSI system realization cost in terms of area and power consumption for real-time multi-dimensional signal processing applications. Applications or this type are data-dominated because they handle a large amount of indexed data which are produced and consumed in the context of nested loops. This important application domain includes the majority of speech, video, image, and graphic processing (multi-media in general) and end-user telecom applications. The present invention relates to the automated allocation of the background memory units, necessary to store the large multi-dimensional signals. In order to handle both procedural and nonprocedural specification, the novel memory allocation methodology is based on an optimization process driven by data-flow analysis. This steering mechanism allows more exploration freedom than the more restricted scheduling-based investigation in the existent synthesis systems.

Abstract: A microgap sensor, and manufacturing method therefor, which includes a cathode and at least one strip anode parallel to the cathode, in which the strip anode is separated and insulated from the cathode by an insulation layer made from a polymeric material. The microgap sensor further includes a cathodic drift electrode substantially parallel to the cathode, the cathode and drift electrode being separated by a gap fillable with an ionizable gas. The gap is considerably greater than the thickness of the insulating layer, and the strip anode is located in the gap between the cathode and the drift electrode.

Abstract: Method of preparing on a solar cell the top contact pattern which consists of a set of parallel narrow finger lines and wide collector lines deposited essentially at right angles to the finger lines on the semiconductor substrate, characterized in that it comprises at least the following steps:(a) screen printing and drying the set of contact finger lines;(b) printing and drying the wide collector lines on the top of the set of finger lines in a subsequent step;(c) firing both finger lines and collector lines in a single final step in order to form an ohmic contact between the finger lines and the semiconductor substrate and between the finger lines and the wide collector lines.

Abstract: Measuring an electrical potential in a semiconductor element by applying one or more voltages over the semiconductor element, placing one or more conductors in contact with the semi-conductor element using a scanning proximity microscope, calibrating the contact force between the conductors and the semiconductor element and measuring an electrical potential in the semi-conductor element with at least one of the conductors while injecting a substantially zero current in the semiconductor element. To measure the electrical potential distribution within the semiconductor, the position of at least one of the conductors is changed and the electric potential re-measured.

Abstract: A method for evaluating, monitoring or controlling the efficiency, stability or exhaustion of a complexing or chelating agent present in a chemical solution used for oxidizing, dissolving, etching or stripping a semiconductor wafer wherein:a chemical solution containing hydrogen peroxide as well as a complexing or chelating agent for contaminants present in the solution is used for oxidation, dissolution, etching or stripping a semiconductor wafer surface;a measurement of the hydrogen peroxide decomposition is performed in situ in the solution;the measurement of the H.sub.2 O.sub.2 decomposition is used to provide information concerning the behavior of the complexing or chelating agent.

Abstract: A millimeter or microwave oscillator device for a receiver or a transmitter is described. The oscillator device including a high frequency oscillating circuit including an active device 41; said active device 41 having a first and a second contact 56, 52, a signal line 49 of said oscillator device 41 being connected to said first contact 56 for connection to a load circuit 43; a biasing circuit 47 for said active device; and a low frequency oscillation suppression circuit; wherein said low frequency oscillation suppression circuit includes a decoupling capacitor 45 and one electrode of said decoupling capacitor 45 is connected to said second contact 52. A manufacturing method for the oscillator device is also disclosed.