Abstract: The present invention is related to an efficient thermal oxidation process that allows the controlled growth of in-situ cleaned high quality thin oxides on a silicon-containing substrate. Said oxidation is performed in an ambient comprising at least the reaction products of a chloro-carbon precursor and ozone. This thermal oxidation is preferably executed at low temperatures, being preferably below 500° C., in order to limit the in-diffusion of metal surface contaminants is limited. The present invention is further related to the decomposition of organic chloro-carbon precursors at low temperatures by the introduction of ozone prior to the actual oxidation step.

Abstract: A method is disclosed for the formation of ferro-electric films using a multi coating process based on a sol-gel technique. In particular a method is disclosed to fabricate high-quality thickness scaled PZT films of an alkoxide-type liquid chemical PZT precursor solution, preferably a Pb(ZrxTi1−x)O3 precursor solution, using a sol-gel technique. At least two coated layers are deposited, but the precise number of coated layers depends on the desired thickness of the ferro-electric film. According to the method of the invention, the electrical characteristics of the film as formed are not dependent on the number of coated layers. There are a number of properties, characteristic for the method of the present invention, and resulting in said excellent electrical characteristics. In fact said method can comprise a multi coating process wherein a reduced number of coated layers is used but where intermediate crystallization steps are performed.

Abstract: A method of fabricating a microstructure having an inside cavity. The method includes depositing a first layer or a first stack of layers in a substantially closed geometric configuration on a first substrate. Then, performing an indent on the first layer or on the top layer of said first stack of layers. Then, depositing a second layer or a second stack of layers substantially with said substantially closed geometric configuration on a second substrate. Then, aligning and bonding said first substrate on said second substrate such that a microstructure having a cavity is formed according to said closed geometry configuration.

Abstract: The present invention is related to a method of removing particles and a liquid from a surface of a substrate using at least one rotating cleaning pad. The approach, according to the present invention, is a technique wherein a sharp liquid-vapor boundary is created on the surface of the substrate adjacent to the last wetted rotating cleaning pad of a plurality of rotating cleaning pads and particularly between this last wetted rotating cleaning pad and a first edge of the substrate.

Abstract: The present invention is a method for programming SSI cells or an array of said cells. The method achieves very fast programming while consuming only a very small amount of power, which paves the way for new applications such as battery-operated systems, page-mode programming for very high data throughput. The method also allows for the bitline voltage to be increased internally on the chip in order to circumvent the efficiency decrease associated with supply voltage scaling. By exploring the SSI mechanism in the subthreshold regime, an optimum value for the CG voltage is found for which the gate current is no longer maximized, but the energy consumed from the power supply is minimized and the injection efficiency during programming is maximized. The programming of a memory cell in this regime, where the gate current is a very steep function of the CG voltage, is, however, still achieved in a few microseconds while consuming only a very small cell current in the range of nanoamperes.

Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.

Abstract: The method of the present invention is related to the fabrication of a copper-based multilevel interconnect structure. This copper-based multilevel interconnect structure is based on the formation of vertical metal connections through copper-containing metal stud growth on an underlying horizontal metal pattern, followed by a stud encapsulation step against copper diffusion into the surrounding dielectric, i.e. the insulating layers. This method is of particular interest when the insulating layers used to obtain this interconnect structure are polymer layers with a low dielectric constant and preferably with a high degree of planarization.

Abstract: The present invention is related to a method of removing particles and a liquid from a surface of a substrate using at least one rotating cleaning pad. The approach, according to the present invention, is a technique wherein a sharp liquid-vapor boundary is created on the surface of the substrate adjacent to the last wetted rotating cleaning pad of a plurality of rotating cleaning pads and particularly between this last wetted rotating cleaning pad and a first edge of the substrate.

Abstract: An open apparatus is described for the processing of planar thin semiconductor substrates, particularly for the processing of solar cells. The apparatus includes a first zone for the drying and burn-out of organic components from solid or liquid based dopant sources pre-applied to the substrates. The zone is isolated from the remaining zones of the apparatus by an isolating section to prevent cross-contamination between burn-out zone and the remaining processing zones. All the zones of the apparatus may be formed from a quartz tube around which heaters are placed for raising the temperature inside the quartz tube. Each zone may be purged with a suitable mixture of gases, e.g. inert gases such as argon, as well as oxygen and nitrogen. The zones may also be provided with gaseous dopants such as POCl3 and the present invention includes the sequential diffusion of more than one dopant into the substrates. Some of the zones may be used for driving-in the dopants alternatively, for other processes, e.g. oxidation.

Abstract: An apparatus for wet cleaning or etching of flat substrates comprising a tank with an inlet opening and outlet opening for said substrates. Said tank contains a cleaning liquid and is installed in a gaseous environment. At least one of the openings is a slice in a sidewall of the tank and is present below the liquid-surface. In the tank there may be a portion above the liquid filled with a gas with a pressure being lower than the pressure within said environment. The method comprises the step of transferring a substrate through the cleaning or etching liquid at a level underneath the surface of said liquid making use of said apparatus.

Abstract: The present invention discloses the formation of a hard mask layer in an organic polymer layer by modifying at least locally the chemical composition of a part of said exposed organic low-k polymer. This modification starts from an exposed surface of the polymer and extends into the polymer thereby increasing the chemical resistance of the modified part of the polymer. As a result, this modified part can be used as a hard mask or an etch stop layer for plasma etching.

Abstract: A method of erasing and a method of programming a nonvolatile memory cell in a chip is disclosed. Said cell comprises a semiconductor substrate including a source and a drain region and a channel therebetween, a floating gate extending over a portion of said channel, a control gate extending over another portion of the channel region, and a program gate capacitively coupled through a dielectric layer to said floating gate. The methods or schemes are using substantially the lowest possible voltage to erase a nonvolatile memory cell of the floating-gate type without having the SILC problem. Therefore, these schemes are expected to allow a further scaling of the minimum feature size of Flash memory products which is necessary for cost reduction and density increase. The present invention also aims to further decrease the voltages necessary to erase/program the memory device without degrading the corresponding performance.

Abstract: A flip-flop-based circuit architecture generates a hazard-free asynchronous signal given the SET and RESET sum-of-product (SOP) solutions to an asynchronous process. The flip-flop SET and RESET SOP solutions can be hazardous. Thus, general purpose synchronous optimization tools (which are indifferent to hazards) can be used to derive the optimal SOP solutions. A fixed layer built around the SOP cores eliminates all hazards in the circuit. In one embodiment, the architecture is optimized by eliminating an RS latch and delay lines in the SOP cores. The architecture of the present invention is guaranteed to admit any semi-modular race-free state graph representation of an asynchronous process that satisfies the n-shot requirement. The state graph representations can be examined to determine if alternate, solution-specific, simplified architectures can be employed that further decrease the final area by the elimination of flip-flops or the elimination of a timing delay.

Abstract: The present invention discloses a semiconductor based detector for radiation with a small but effective barrier between the radiation sensitive volume in the semiconductor and the regions and junctions with readout circuitry, and with no or a lower barrier between the semiconductor substrate and the regions and junctions adapted and meant for collecting the charge carriers generated by the radiation in the semiconductor substrate.

Abstract: A programmable processing engine and a method of operating the same is described, the processing engine including a customized processor, a flexible processor and a data store commonly sharable between the two processors. The customized processor normally executes a sequence of a plurality of pre-customized routines, usually for which it has been optimized. To provide some flexibility for design changes and optimizations, a controller for monitoring the customized processor during execution of routines is provided to select one of a set of pre-customized processing interruption points and for switching context from the customized processor to the flexible processor at the interruption point. The customized processor can then be switched off and the flexible processor carries out a modified routine. By using sharable a data store, the context switch can be chosen at a time when all relevant data is in the sharable data store. This means that the flexible processor can pick up the modified processing cleanly.

Abstract: The interprocess communication protocol system provides a generic communication system for communication between specified processes in a complex digital system. In accordance with the interprocess communication protocol, a group of pre-defined communication signals are defined, to which all communications between the processes conform. Interface hardware is disclosed to provide communication between processes. In addition, the communication protocol can be designed into the process as and integral portion of the processes.

Abstract: Measuring an electrical potential in a semiconductor element by applying one or more voltages over the semiconductor element, placing at least one conductor in contact with the semi-conductor element using a scanning proximity microscope while injecting a substantially zero current in the semiconductor element with the conductor, measuring an electrical potential in the conductor while injecting a substantially zero current in the semiconductor element with the conductor, changing the position of the conductor, and repeating the measuring and changing steps.

Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.

Abstract: A device for emitting radiation it a predetermined wavelength is disclosed. The device has a cavity comprising a first bulk region and a second bulk region of opposite conductivity type wherein a barrier is provided for spatially separating the charge carriers of the first and the second region substantially at the antinode of the standing wave pattern of said cavity. The recombination of the charge carriers at the barrier create radiation, the emission wavelength of the radiation being determined by the cavity.

Abstract: A novel radiation detector, a detection principle and an associated structure are provided for semiconductor substrate detectors in general and for CMOS based circuits in particular. For an optical detector, photons absorbed in the neutral zone of the substrate generate electron hole pairs that migrate by diffusion. A shadow mask gives a spatial modulation to the incident, and consequently, to the absorbed light in the semiconductor substrate. By measuring the magnitude of the spatial frequency component in the minority carrier distribution with a spatial frequency corresponding to that of the shadow mask, a fast detector is conceived. A shadow mask with higher spatial modulation frequency delivers a faster turn-off. The combination of a plurality of these detectors with an image fiber forms a basic system for constructing high-speed parallel optical interconnects between chips.