Abstract: Disclosed is a transistor device which includes a semiconductor body having a first surface, a source region, a drift region, a body region being arranged between the source region and the drift region, a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a field electrode adjacent the drift region and dielectrically insulated from the drift region by a field electrode dielectric, wherein the field electrode comprises a first layer and a second layer, wherein the first layer has a lower electrical resistance than the second layer, wherein a portion of the second layer is disposed above and directly contacts a portion of the first layer.

Abstract: An apparatus includes a controller. To control current through a motor winding, the controller monitors a magnitude of current supplied through the motor winding. The controller compares the magnitude of current to a threshold value. In response to detecting that the magnitude of current crosses the threshold value, the controller terminates a flow of the current through the motor winding. In one application, termination of the current through the motor winding supports more efficient use of energy to drive the motor winding. For example, via the controller, terminating the current through the motor winding to prevent the current from flowing in a reverse direction through the motor winding.

Abstract: The application relates to a semiconductor switch element, including: a first vertical transistor device formed in a substrate and having a source region formed on a first side of the substrate and a drain region formed on a second side of the substrate vertically opposite to the first side; a second vertical transistor device formed laterally aside the first vertical transistor device in the same substrate and having a source region formed on the first side of the substrate and a drain region formed on the second side of the substrate; a conductive element arranged on the second side of the substrate and electrically connecting the drain regions of the vertical transistor devices; and a trench extending vertically into the substrate at the second side of the substrate, wherein at least a part of the conductive element is arranged in the trench.

Abstract: A power converter comprises a regulator, a value-supply system arranged for collecting at least one operating point of the power converter, and a predictor operative to produce updated regulator parameters (such as one or more power supply coefficients) implemented by the regulator to produce an output voltage to power a load. The updated regulator parameters are determined using a process based on the at least one collected operating point samples and predictor parameters obtained from a machine-learning process.

Abstract: A method of current detection includes providing a transistor arrangement which comprises a drift and drain region arranged in a semiconductor body and each connected to a drain node, a plurality of load transistor cells each having a source region integrated in a first region of the semiconductor body, a plurality of sense transistor cells each having a source region integrated in a second region of the semiconductor body, a first source node electrically connected to the source region of each of the plurality of the load transistor cells via a first source conductor, and a second source node electrically connected to the source region of each of the plurality of the sense transistor cells via a second source conductor; and detecting a first current flowing between the drain node and the first source node of the transistor arrangement, wherein detecting the first current includes measuring a second current flowing between the drain node and the second source node of the transistor arrangement.

Abstract: In an embodiment, a semiconductor device is provided that includes a main transistor having a load path, a sense transistor configured to sense a main current flowing in the load path of the main transistor, and at least one bypass diode structure configured to protect the sense transistor. The at least one bypass diode structure is electrically coupled in parallel with the sense transistor.

Abstract: In an embodiment, a switching circuit is provided that includes a Group III nitride-based semiconductor body including a first monolithically integrated Group III nitride-based transistor device and a second monolithically integrated Group III nitride based transistor device that are coupled to form a half-bridge circuit and are arranged on a common foreign substrate having a common doping level. The switching circuit is configured to operate the half-bridge circuit at a voltage of at least 300 V.

Abstract: This disclosure includes novel ways of implementing a power supply that powers a load. More specifically, a power supply includes a bidirectional power converter and a controller. The controller monitors a magnitude of an input voltage supplied from an input voltage source to a load. Based on a magnitude of the input voltage, the controller switches between a first mode of operating the bidirectional power converter to charge an energy storage resource using (a portion of power provided by) the input voltage and a second mode of producing a backup voltage from the energy storage resource to power the load as a substitute to the input voltage such as when the input voltage is below a threshold value.

Abstract: According to one configuration, an inductor device includes a first electrically conductive path; a second electrically conductive path, the first electrically conductive path electrically isolated from the second electrically conductive path; first material, the first material operative to space the first electrically conductive path with respect to the second electrically conductive path; and second material. The second material has a substantially higher magnetic permeability than the first material. An assembly of the first electrically conductive path, the second electrically conductive path, and the first material resides in a core of the second material.

Abstract: A semiconductor device includes a semiconductor substrate including a barrier region, a channel layer disposed below the barrier region and forming a heterojunction with the barrier region such that a two-dimensional charge carrier gas channel is disposed in the channel layer near the heterojunction, and a sub-channel region disposed below the channel layer, and a first interface in the semiconductor substrate between a first region of type III-V material and a second region of type III-V material that is disposed below the first region of type III-V material, wherein the first and second regions of type III-V material form polarization charges on either side of the first interface, wherein the first interface is within or formed by the sub-channel region, and wherein semiconductor substrate has a vertically varying dopant concentration of deep energy acceptor dopant atoms that is locally increased at the first interface.

Abstract: A motor controller configured to drive a permanent magnet synchronous motor (PMSM) with Field Oriented Control (FOC), includes a current controller configured to generate control signals for driving the PMSM. The current controller is configured to measure current information of the PMSM, including a direct-axis motor current and a quadrature-axis motor current. The current controller includes a direct-axis current regulator configured to receive a direct-axis reference current and the direct-axis motor current to generate a direct-axis error value based on a difference between the direct-axis reference current and the direct-axis motor current. The current controller includes a voltage regulator configured to regulate a DQ voltage vector comprising a direct-axis motor voltage and a quadrature-axis motor voltage, wherein the voltage regulator generates the direct-axis motor voltage based on the direct-axis error value and a voltage vector limiting function to drive the direct-axis motor current to zero.

Abstract: A processor substrate includes: an electrically insulating material having a first main side and a second main side opposite the first main side; a plurality of electrically conductive structures embedded in the electrically insulating material and configured to provide an electrical interface at the first main side of the electrically insulating material and to provide electrical connections from the electrical interface to the second main side of the electrically insulating material; and a power device module embedded in the electrically insulating material and configured to convert a voltage provided at the second main side of the electrically insulating material and which exceeds a voltage limit of the processor substrate to a voltage that is below the voltage limit of the processor substrate. An electronic system that includes the processor substrate is also described.

Abstract: A MOSFET includes a semiconductor body having a first side, a drift region, a body region forming a first pn-junction with the drift region, a source region forming a second pn-junction with the body region, in a vertical cross-section, a dielectric structure on the first side and having an upper side; a first gate electrode, a second gate electrode, a contact trench between the first and second gate electrodes, extending through the dielectric structure to the source region, in a horizontal direction a width of the contact trench has, in a first plane, a first value, and, in a second plane, a second value which is at most about 2.5 times the first value, and a first contact structure arranged on the dielectric structure having a through contact portion arranged in the contact trench, and in Ohmic contact with the source region.

Abstract: A semiconductor die includes a barrier layer of type III-V semiconductor material, a channel layer of type III-V semiconductor material disposed below the barrier layer, the channel layer forming a heterojunction with the barrier layer such that a two-dimensional charge carrier gas is disposed in the channel layer near the heterojunction, a high-electron mobility transistor disposed in a first lateral region of the semiconductor die, the high-electron mobility transistor comprising source and drain electrodes that each are in ohmic contact with the two-dimensional charge carrier gas and a gate structure that is configured to control a conductive connection between the source and drain electrodes, and a capacitor that is monolithically integrated into the semiconductor die and is disposed in a second lateral region of the semiconductor die, a dielectric medium of the capacitor includes a first section of the barrier layer.

Abstract: A semiconductor device includes a source region and a drain region of a first conductivity type, a body region of a second conductivity type between the source region and the drain region, a gate configured to control current through a channel of the body region, a drift zone of the first conductivity type between the body region and the drain region, a superjunction structure formed by a plurality of regions of the second conductivity type laterally spaced apart from one another by intervening regions of the drift zone, and a diffusion barrier structure disposed along sidewalls of the regions of the second conductivity type of the superjunction structure. The diffusion barrier structure includes alternating layers of Si and oxygen-doped Si and a Si capping layer on the alternating layers of Si and oxygen-doped Si.

Abstract: In an embodiment, a method of forming a field plate in an elongate active trench of a transistor device is provided. The elongate active trench includes a first insulating material lining the elongate active trench and surrounding a gap and first conductive material filling the gap. The method includes selectively removing a first portion of the first insulating material using a first etch process, selectively removing a portion of the first conductive material using a second etch process, and forming a field plate in a lower portion of the elongate active trench and selectively removing a second portion of the first insulating material using a third etch process. The first etch process is carried out before the second etch process and the second etch process is carried out before the third etch process.

Abstract: A method of manufacturing a power semiconductor system includes providing a power module having one or more power transistor dies and attaching an inductor module to the power module such that the inductor module is electrically connected to a node of the power module. The inductor module includes a substrate with a magnetic material and windings at one or more sides of the substrate. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.

Abstract: The present application relates to a semiconductor transistor device that includes a Schottky diode electrically connected in parallel to a body diode formed between a body region and a drift region. A diode junction of the Schottky diode is formed adjacent to the drift region and is arranged vertically above a lower end of the body region.

Abstract: An apparatus includes a controller that controls operation of an amplifier. The amplifier receives a sample voltage produced by a resistive path; the sample voltage from the resistive path is indicative of a magnitude of current through a motor winding. The controller selects a gain setting to apply to the amplifier based on one or more conditions. The selected gain setting is selected amongst multiple possible gain settings. Subsequent to selection, via application of the selected gain setting to the amplifier, and based on an output of the amplifier, the controller monitors a magnitude of the current through the motor winding. According to one configuration, the amplifier adjusts the magnitude of the selected gain setting depending on one or more parameters such as the magnitude of the current through the motor winding, a selected operational range of controlling current through the motor winding, etc.

Abstract: This disclosure includes novel ways of implementing a power supply that powers a load. More specifically, a power supply includes a controller. The controller controls operation of a first power converter stage and a second power converter stage to convert an input voltage into an output voltage. For example, the first power converter stage is operative to receive an input voltage and convert the input voltage into an intermediate voltage. The second power converter stage such as a transformer-less switched-capacitor converter is coupled to the first power converter stage. The second power converter stage receives the intermediate voltage and converts the intermediate voltage into an output voltage to power a load.