Abstract: A circuit comprises a gate driver having a supply voltage terminal and configured to generate an output at an output terminal based on an input. A voltage multiplexer is configured to connect a first voltage terminal to the supply voltage terminal responsive to a voltage select signal having a first value and connect a second voltage terminal to the supply voltage terminal responsive to the voltage select signal having a second value. First logic is configured to generate a fault signal responsive to detecting one of a first fault condition associated with operation of the gate driver or a second fault condition associated with operation of the gate driver and generate the voltage select signal having the second value based on the fault signal. Second logic is configured to generate the voltage select signal having the second value after a predetermined delay period based on a value of the input.

Abstract: A method for operating a switch in a power converter, a drive circuit for operating a switch in a power converter, and a power converter are disclosed. The method includes: driving an electronic switch coupled to an inductor in a power converter based on a feedback signal (SFB) and a crossing detection voltage, wherein the feedback signal is dependent on an output parameter of the power converter and the crossing detection voltage is dependent on a voltage across an auxiliary winding coupled to the inductor; clamping the crossing detection voltage; monitoring an auxiliary current (IAUX) associated with clamping the crossing detection voltage; and detecting an overvoltage when the monitored current reaches a predefined threshold.

Abstract: A gate driver includes: an input pin for receiving switching control information from a controller; an output pin for driving a control terminal of a power transistor; a power supply pin for receiving power from an external supply; an input side electrically connected to the input pin; an output side electrically connected to the output pin and the power supply pin; and an isolation structure galvanically isolating the input side and the output side from one another. The output side is configured to transfer a fraction of the power received at the power supply pin to the input side over the isolation structure for powering the input side. The input side is configured to convey the switching control information received at the input pin to the output side over the isolation structure. A power electronic system that includes the gate driver is also described.

Abstract: A method of processing a semiconductor wafer includes: forming a first metal layer or metal layer stack on a backside of the semiconductor wafer; forming a plating preventative layer on the first metal layer or metal layer stack, the plating preventative layer being formed at least over a kerf region of the semiconductor wafer and such that part of the first metal layer or metal layer stack is uncovered by the plating preventative layer, wherein the kerf region defines an area for dividing the semiconductor wafer along the kerf region into individual semiconductor dies; and plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer, wherein the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region.

Abstract: A method of soldering elements together includes providing a substrate having a metal die attach surface, providing a semiconductor die that is configured as a power semiconductor device and having a semiconductor body, a rear side metallization, and a front side layer stack, the front side layer stack having a front side metallization and a contaminant protection layer, arranging the semiconductor die on the substrate with a region of solder material between the die attach surface and the rear side metallization, and performing a soldering process that reflows the region of solder material to form a soldered joint between the metal die attach surface and the rear side metallization, wherein the soldering process comprises applying mechanical pressure to the front side metallization.

Abstract: A semiconductor device includes a transistor having a drift region of a first conductivity type in a semiconductor substrate having a first main surface, a body region of a second conductivity type between the drift region and first main surface, and trenches in the first main surface which pattern the substrate into mesas. The trenches include an active trench and first and second source trenches. A source region of the first conductivity type is in a first mesa arranged adjacent to the active trench. A second mesa between the first and second source trenches is in contact with at least one source trench. A barrier region of the first conductivity type at a higher doping concentration than the drift region is arranged between the body and drift regions in the second mesa. A vertical size of the barrier region is at least twice a width of the second mesa.

Abstract: A multi-voltage domain device includes a semiconductor layer including a first voltage domain, a second voltage domain, and an isolation region that electrically isolates the first voltage domain and the second voltage domain in a lateral direction. The isolation region includes at least one deep trench isolation barrier. A layer stack is arranged on the semiconductor layer and includes a stack insulator layer, a first coil arranged in the stack insulator layer, and a second coil arranged in the stack insulator layer and laterally separated from the first coil in the lateral direction. The first and second coils are magnetically coupled to each other in the lateral direction. The first coil includes terminals arranged vertically over the first region and are electrically coupled to the first voltage domain, and the second coil includes terminals arranged vertically over the second region and are electrically coupled to the second voltage domain.

Abstract: A semiconductor device forming a bidirectional switch includes first and second carriers, first and second semiconductor chips arranged on the first and second carriers, respectively, a first row of terminals arranged along a first side face of the carrier, a second row of terminals arranged along a second side face of the carrier opposite the first side face, and an encapsulation body encapsulating the first and second semiconductor chips. Each row of terminals includes a gate terminal, a sensing terminal and at least one power terminal of the bidirectional switch.

Abstract: A method of joining a semiconductor die to a substrate includes: applying a solder preform to a metal region of the semiconductor die or to a metal region of the substrate, the solder preform having a maximum thickness of 30 ?m and a lower melting point than both metal regions; forming a soldered joint between the metal region of the semiconductor die and the metal region of the substrate via a diffusion soldering process and without applying pressure directly to the die; and setting a soldering temperature of the diffusion soldering process so that the solder preform melts and fully reacts with the metal region of the semiconductor die and the metal region of the substrate to form one or more intermetallic phases throughout the entire soldered joint, each intermetallic phase having a melting point above the melting point of the preform and the soldering temperature.

Abstract: A semiconductor package includes a die pad having a die attach surface, a first laterally separated and vertically offset from the die pad, a semiconductor die mounted on the die attach surface and comprising a first terminal on an upper surface of the semiconductor die, an interconnect clip that is electrically connected to the first terminal and to the first lead, and a heat spreader mounted on top of the interconnect clip. The interconnect clip includes a first planar section that interfaces with the upper surface of the semiconductor die and extends past an outer edge side of the die pad. The heat spreader covers an area of the first planar section that is larger than an area of the semiconductor die. The heat spreader laterally extends past a first outer edge side of the die pad that faces the first lead.

Abstract: A method and a control circuit for driving an electronic switch coupled to an inductor in a power converter in successive drive cycles each including an on-time and an off-time are disclosed. Driving the electronic switch includes: measuring an inductor voltage during the on-time in a drive cycle in order to obtain a first measurement value; measuring the inductor voltage during the off-time in a drive cycle in order to obtain a second measurement value; obtaining a first voltage measurement signal that is dependent on a sum of the first measurement value and the second measurement value; and adjusting the on-time in a successive drive cycle dependent on a feedback signal and the first voltage measurement signal.

Abstract: A semiconductor device is proposed. The semiconductor device includes a semiconductor body including a first main surface. A plurality of trench electrode structures extend in parallel along a first lateral direction. A first one of the plurality of trench electrode structures includes a gate electrode. A gate contact is electrically connected to the gate electrode in a gate contact area. The gate contact area is arranged in a first section along the first lateral direction. An isolation structure is arranged between the gate contact and the semiconductor body in the gate contact area. A bottom side of the isolation structure is arranged between a bottom side of the first one of the plurality of trench electrode structures and the first main surface along a vertical direction. The gate contact extends up to or below the first main surface along the vertical direction.

Abstract: In an embodiment, a transistor device includes a semiconductor substrate having a main surface, a cell field including a plurality of transistor cells, and an edge termination region laterally surrounding the cell field. The cell field includes a gate trench in the main surface of the semiconductor substrate, a gate dielectric lining the gate trench, a metal gate electrode arranged in the gate trench on the gate dielectric, and an electrically insulating cap arranged on the metal gate electrode and within the gate trench.

Abstract: An apparatus comprises an emulator and a corresponding compensator. During operation, the emulator produces, at different instants of time, an emulated output current value representative of an amount of current supplied from an output voltage to a load. In general, the compensator provides selective compensation to the emulated output current value over time. For example, for a first time duration, compensation adjustments from the compensator are used to modify the emulated output current value. For a second duration of time, compensation adjustments from the compensator are not used to modify the emulated output current value. Disabling or discontinuing application of adjustments (such as based on the actual measured output current) during the second time duration (such as during a respective transient condition) provides more accurate and timely generation of a respective emulated output current value.

Abstract: A power module for driving a motor includes: a positive bus input voltage terminal; a phase terminal for each motor phase; an inverter including a half bridge for each motor phase, each half bridge including a high-side power switch electrically coupled between the positive bus input voltage terminal and respective phase terminal, and a low-side power switch electrically coupled between the respective phase terminal and ground; a first driver circuit for driving a gate terminal of each power switch; a protection switch electrically coupled in series between the positive bus input voltage terminal and each high-side power switch, and having a greater short-circuit withstand time and a lower short-circuit current level compared to each inverter power switch; and a second driver circuit for turning on the protection switch during normal operation and turning off the protection switch in response to a detected short circuit condition.

Abstract: An apparatus comprises a first power supply, a second power supply, and a controller. The first power supply supplies a first input voltage to power a first input of a load over a first circuit path. The second power supply supplies a second input voltage to power a second input of the load over a second circuit path. The controller controls connectivity of the first circuit path to the second circuit path as a function of the first input voltage and the second input voltage during at least ramp up or ramp down of either or both of the first input voltage and the second input voltage.

Abstract: A synchronous rectifier includes: an integrator configured to integrate a voltage across a secondary side winding of a transformer over an integral period having an expected zero integral value; a first comparator configured to detect an end of a demagnetization phase of the secondary side winding based on diode detection; and a digital circuit configured to adjust a channel gain of the synchronous rectifier based on an integration error at the end of the integral period, the integration error corresponding to the difference between the integrated voltage at the end of the integral period and the expected zero integral. Corresponding methods of gain tuning and a power converter are also described.

Abstract: An apparatus includes a controller. The controller monitors a magnitude of first current supplied by an output voltage of a first power converter to power a dynamic load. The controller controls a second power converter to supply second current through the dynamic load based on the monitored magnitude of first current.

Abstract: A motor control actuator that drives a permanent magnet synchronous motor (PMSM) with sensorless Field Oriented Control includes a sampling circuit that generates a measurement signal by measuring a back electro motive force (BEMF) of the PMSM, while the PMSM rotates; a PLL that receives the measurement signal and extracts an amplitude and an angle of the BEMF from the measurement signal; and a motor controller that generates a first set of two phase alternating current (AC) voltage components based on an estimated rotor angle, generates a second set of two phase AC voltage components based on the amplitude and the angle, and generates control signals for driving the PMSM based on the first set of two phase AC voltage components. The motor controller performs a catch spin sequence for restarting the PMSM while rotating, the catch spin sequence includes a synchronizing period followed by a closed loop control period.

Abstract: A semiconductor device includes a type IV semiconductor base substrate, a first type III-V semiconductor layer formed on a first surface of the base substrate, and a second type III-V semiconductor layer with a different bandgap as the first type III-V being formed on the first type III-V semiconductor layer. The semiconductor device further includes first and second electrically conductive device terminals each being formed on the second type III-V semiconductor layer and each being in ohmic contact with the two-dimensional charge carrier gas. The base substrate includes a first highly doped island that is disposed directly beneath the second device terminal and extends to the first surface of the base substrate. The first highly-doped island is laterally disposed between portions of semiconductor material having a lower net doping concentration than the first highly-doped island.