Patents Assigned to INSTITUTE
  • Carbamate compounds and of making and using same
    Patent number: 9487495
    Abstract: This disclosure provides compounds having the structure: wherein L3, R7, Rd and p are defined herein, which are modulators of MAGL and/or ABHD6. Further provided is the use of these compounds as medicinal agents, processes for their preparation, and pharmaceutical compositions that include the disclosed compounds. The disclosure also provides a method of treating a patient in need thereof, where the patient is suffering from indications such as pain, solid tumor cancer and/or obesity comprising administering a disclosed compound or composition.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: November 8, 2016
    Assignees: THE SCRIPTS RESEARCH INSTITUTE, ABIDE THERAPEUTICS
    Inventors: Justin S. Cisar, Cheryl A. Grice, Todd K. Jones, Micah J. Niphakis, Jae Won Chang, Kenneth M. Lum, Benjamin F. Cravatt
  • Concentrated solar power system receiver
    Patent number: 9488386
    Abstract: Systems and methods for concentrating and storing solar energy are provided. A solar energy receiver for use with the systems and methods may include a container for holding a solar absorption material, such as a phase change material, and a cooled cover disposed above the container for condensing and collecting vaporized phase change material collected along an underside of the cover.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: November 8, 2016
    Assignee: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: Alexander H. Slocum, Daniel S. Codd, Adam T. Paxson
  • Low density parity check encoder having length of 16200 and code rate of 3/15, and low density parity check encoding method using the same
    Patent number: 9490846
    Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 3/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Heung-Mook Kim, Sun-Hyoung Kwon, Nam-Ho Hur
  • Pipe damage detection apparatus and method
    Patent number: 9488567
    Abstract: A pipe damage detection apparatus and method are disclosed. The pipe damage detection apparatus includes an ultrasonic supply unit configured to supply an ultrasonic signal to a pipe; an ultrasonic reception unit configured to receive the ultrasonic signal of the pipe; and an analysis unit configured to analyze the ultrasonic signal received by the ultrasonic reception unit, and determine whether the pipe is damaged. The pipe damage detection apparatus and method can detect whether a pipe that is difficult for an inspector to access because it is coated with an insulating material or buried in the ground is damaged.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: November 8, 2016
    Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Hoon Sohn, Hyeon Seok Lee, Jin Yeol Yang
  • Neuromorphic system and method for operating the same
    Patent number: 9489617
    Abstract: A neuromorphic system includes: an unsupervised learning hardware device configured to perform learning in an unsupervised manner, the unsupervised learning hardware device performing grouping on input signals; and a supervised learning hardware device configured to perform learning in a supervised manner with labeled values, the supervised learning hardware device performing clustering on input signals.
    Type: Grant
    Filed: July 7, 2015
    Date of Patent: November 8, 2016
    Assignee: GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Myong-Lae Chu, Byung-Geun Lee, Moon-Gu Jeon, Ahmad Muqeem Sheri
  • Low density parity check encoder having length of 64800 and code rate of 2/15, and low density parity check encoding method using the same
    Patent number: 9490843
    Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 64800 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Heung-Mook Kim, Sun-Hyoung Kwon, Nam-Ho Hur
  • Motor control device and method of controlling the same
    Patent number: 9490734
    Abstract: A motor control device including a preprocessing portion calculating a counter electromotive force using an analog operation is provided. The motor control device may include an offset compensation portion and a counter electromotive force measuring portion. The offset compensation portion receives a three-phase current signal from the motor and compensates an offset of the three-phase current signal. The counter electromotive force measuring portion receives the compensated current signal and a three-phase voltage signal from the motor and calculates the received current signal and the received voltage signal using an analog operation to provide the calculated result.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jaewon Nam, Young Kyun Cho, Hui Dong Lee, Yil Suk Yang, Jong-Kee Kwon, Jongdae Kim
  • Method and apparatus for controlling operation voltage of processor core, and processor system including the same
    Patent number: 9489034
    Abstract: A method and an apparatus for controlling an operation voltage of a processor core and a processor system including the same are provided. The apparatus for controlling an operation voltage of a processor core includes a voltage supplier and an operation voltage searching core. The voltage supplier supplies the operation voltage to the processor core. The operation voltage searching core requests the processor core to execute a program, and controls the operation voltage based on whether the program has been normally operated.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Young-Su Kwon
  • Centrifugal force-based microfluidic device available for reliability verification, and analyzing method using the same
    Patent number: 9488566
    Abstract: A centrifugal force-based microfluidic device for a multiplexed analysis and an analyzing method using the same are provided. The microfluidic device includes a platform and a microfluidic structure including a plurality of chambers formed within the platform, and valves positioned between the chambers. The microfluidic structure includes a sample separation chamber connected to a sample injection hole, and a plurality of reaction chambers accommodating two or more types of markers specifically reacting with different types of target materials, separately by type. At least one of the target materials is a standard material, and at least one of the markers is a standard marker specifically reacting with the standard material.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: November 8, 2016
    Assignee: UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
    Inventors: Yoon-Kyoung Cho, Ji-Woon Park
  • Method for manufacturing SiC powders with high purity
    Patent number: 9487405
    Abstract: Disclosed herein is a method for manufacturing SiC powders with a high purity, and more particularly, a method for manufacturing SiC powders with a high purity by reating a solid phase carbon source as raw materials with gas phase silicon sources generated from a starting material composed of metallic silicon and silicon dioxide powders and, in which it is easy to control the size and crystalline phase of the SiC powders by changing the compositions of the gas phase silicon source to the solid phase carbon source mole ratio, and the temperature and time for the heat treatment.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 8, 2016
    Assignee: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sang Whan Park, Kyoung Sop Han, Sung Ho Yun, Jin Oh Yang, Gyoung Sun Cho, Mi Rae Youm, Yung Chul Jo
  • Semiconductor device and method of fabricating the same
    Patent number: 9490214
    Abstract: A semiconductor device may include a substrate having a lower via-hole, an epitaxial layer having an opening exposing a top surface of the substrate, a semiconductor chip disposed on the top surface of the substrate and including first, second, and third electrodes, an upper metal layer connected to the first electrode, a supporting substrate disposed on the upper metal layer and having an upper via-hole, an upper pad disposed on the substrate and extending into the upper via-hole, a lower pad connected to the second electrode in the opening, and a lower metal layer covering a bottom surface of the substrate and connected to the lower pad through the lower via-hole.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Byoung-Gue Min, Sang Choon Ko, Jong-Won Lim, Hokyun Ahn, Hyung Sup Yoon, Jae Kyoung Mun, Eun Soo Nam
  • Oxide-based solid electrolyte and method of preparing the same
    Patent number: 9490500
    Abstract: An oxide-based solid electrolyte according to the present invention may be LixLa3M2O12 and may have a cubic phase. The oxide-based solid electrolyte may further include first and second dopants. A method of preparing an oxide-based solid electrolyte according to the concept of the present invention may include mixing a lithium compound, a lanthanum compound, a metal compound, a first dopant precursor, and a second dopant precursor to prepare an intermediate, and crystallizing the intermediate to prepare LixLa3M2O12 crystals having a cubic phase.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong Ok Shin, Young-Gi Lee, Kunyoung Kang, Kwang Man Kim
  • Hierarchical structure of graphene-carbon nanotubes and method for preparing same
    Patent number: 9486773
    Abstract: The present invention relates to a hierarchical structure of graphene-carbon nanotubes and a method for preparing the same, and, more specifically, to a method for growing graphene into carbon nanotubes having a hierarchical structure by adding metal nanoparticles on the graphene. According to the present invention, carbon nanotubes having a hierarchical structure, which have an increased specific surface area compared to existing carbon nanotubes, can be obtained, and a carbon nanotube structure which is metal-functionalized by a metal precursor can be obtained. In addition, carbon nanotubes can be prepared in an environmentally-friendly manner by the use of microwaves.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: November 8, 2016
    Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Il-Kwon Oh, Hyun-Jun Kim, Seok-Hu Bae
  • Methods and compositions for modulation of blood-neural barrier
    Patent number: 9487579
    Abstract: Methods and compositions for modulating blood-neural barrier (BNB) for the treatment of CNS conditions such as edema, and for increased drug delivery efficacy across the BNB. The present invention further relates to improved tPA treatment of ischemic cerebrovascular and related diseases in combination with antagonism of the PDGF signaling pathway. The inventive method and composition is particularly suitable for conjunctive therapy of ischemic stroke using tPA and an anti-PDGF-C antagonist or an anti-PDGFR-? antagonist.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: November 8, 2016
    Assignees: LUDWIG INSTITUTE FOR CANCER RESEARCH, UNIVERSITY OF MARYLAND, THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Ulf Eriksson, Linda Fredriksson, Daniel Lawrence, Enming Su, Manuel Yepes, Dudley Strickland
  • Hybrid DC-DC converter with LLC converter and full-bridge converter
    Patent number: 9490709
    Abstract: Disclosed is a hybrid dc-dc converter. The hybrid dc-dc converter includes: a pair of transformers configured to magnetically couple a primary side to a secondary side, a full-bridge converter including four switches constituting a full-bridge inverter circuit and a first transformer, and an LLC resonant converter including a resonant inductor, a resonant capacitor, and a second transformer, which constitute an LLC resonant circuit, wherein an output of the full-bridge converter and an output of the LLC resonant converter are connected to each other in series at the secondary side.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: November 8, 2016
    Assignee: KOREA INSTITUTE OF ENERGY RESEARCH
    Inventors: Iloun Lee, Suyong Chae, Yujin Song, Seashung Oh, Sukin Park, Yoondong Sung
  • Low density parity check encoder having length of 16200 and code rate of 2/15, and low density parity check encoding method using the same
    Patent number: 9489262
    Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Heung-Mook Kim, Sun-Hyoung Kwon, Nam-Ho Hur
  • Low density parity check encoder having length of 16200 and code rate of 2/15, and low density parity check encoding method using the same
    Patent number: 9489259
    Abstract: A low density parity check (LDPC) encoder, an LDPC decoder, and an LDPC encoding method are disclosed. The LDPC encoder includes first memory, second memory, and a processor. The first memory stores an LDPC codeword having a length of 16200 and a code rate of 2/15. The second memory is initialized to 0. The processor generates the LDPC codeword corresponding to information bits by performing accumulation with respect to the second memory using a sequence corresponding to a parity check matrix (PCM).
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Heung-Mook Kim, Sun-Hyoung Kwon, Nam-Ho Hur
  • Benzothienobenzothiophene derivative, organic semiconductor material, and organic transistor
    Patent number: 9490433
    Abstract: The present invention, the present invention relates to an organic semiconductor material having a benzothienobenzothiophene skeleton, an organic semiconductor ink containing the organic semiconductor material, and an organic transistor using the organic semiconductor material. An object of the present invention is to provide an organic semiconductor material that easily provides a film having a high carrier mobility without the need for a complicated process. It was found that a BTBT derivative having a particular arylene acetylene structure is crystallized by way of a high-order liquid crystal phase having a highly ordered molecular arrangement, and thus the BTBT derivative easily forms a film having a high mobility without requiring complicated heat treatment even when the film is formed by printing. This finding led to the achievement of the object.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: November 8, 2016
    Assignees: DIC CORPORATION, TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Atsuhisa Miyawaki, Tetsuo Kusumoto, Yoshio Aoki, Aya Ishizuka, Yoshinobu Sakurai, Yasuyuki Watanabe, Jun-ichi Hanna
  • Motor driving module and brushless DC motor system
    Patent number: 9490735
    Abstract: A motor driving module is provided which includes a motor driving unit configured to control a PWM inverter on the basis of positional information and a control signal; a PWM inverter configured to output three-phase voltages on the basis of DC power according to control of the motor driving unit; a phase voltage estimating unit configured to output three-phase estimated voltages on the basis of the positional information, the DC power, and a voltage modulation index; and a position detecting unit configured to output the positional information on the basis of the three-phase estimated voltages, wherein the positional information is on an external motor that operates on the basis of the three-phase voltages.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Minki Kim, Jimin Oh, Jung Hee Suk, Yil Suk Yang
  • Processor time synchronization apparatus and method in data communication system with multiple processors and line interfaces
    Patent number: 9490926
    Abstract: A processor time synchronization apparatus and method in a data communication system which includes a plurality of processors and line interfaces. The processor time synchronization apparatus includes a first local processor configured to recognize a time difference between an external device and the system based on a time message exchanged with the external device, and synchronize time between the external device and the system, and a second local processor configured to receive time information from the first local processor that has been time-synchronized with the external device, the time information containing the time difference between the external device and the system, and synchronize the first local processor with a system's internal time using the received time information.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Bup-Joong Kim, Tae-Sik Cheung, Bheom-Soon Joo, Jong-Hyun Lee