Abstract: The disclosed invention relates to a MIMO (multiple input, multiple output) wideband transceiver. In some cases, the MIMO wideband transceiver comprises a signal processor that outputs or receives a plurality of distinguishable data streams. A first data stream is provided to a first antenna port connected to a plurality of wideband antennas, while a second data stream is provided to a second antenna port connected to a wideband antenna. A spatial filter element configured to assign antenna weights to the plurality of wideband antennas, which cause the wideband antennas to operate in a manner that attenuates wireless signals, at a frequency range at which the wideband transmit wideband radiate, in the direction of the wideband antenna without attenuating the wireless signals in other directions. By attenuating signals extending between the plurality of wideband antennas and the wideband antenna, wideband decoupling between first and second antenna ports is achieved.

Abstract: A radio communication device may be provided. The radio communication device may include: a receiver configured to receive data using an antenna on a first carrier and a second carrier; an operation mode determination circuit configured to determine an active antenna operation mode based on information of the first carrier and information of the second carrier; and an antenna controller configured to control the antenna to operate in the determined active antenna operation mode.

Abstract: A communication network component is described including a determiner configured to determine whether a communication device operates a plurality of subscriber identity modules; and a controller configured to control data transmission to the communication device depending on whether the communication device operates a plurality of subscriber identity modules.

Abstract: In various aspects of this disclosure, a communication terminal device may be provided. The communication terminal device may include a receiver. The receiver may be configured to receive a message from a first communication device. The communication terminal device may further include a circuit configured to provide a communication device to communication device communication. The communication terminal device may further include a controller. The controller may be configured to determine whether to relay the received message to at least one second communication device. The controller may further be configured to modify the message if the controller determined to relay the received message. The controller may further be configured to relay and transmit the modified message to the at least one second communication device.

Abstract: A communication device may be provided. The communication device may include: a protocol stack of a communication protocol layer, the protocol stack including: a receiver configured to receive from a layer higher than the communication protocol layer an input signal; a transmitter configured to transmit to another communication device data based on the received input signal and configured to transmit to the higher layer information indicating a transmission state of the data.

Abstract: A reference quantity generator for generating a reference quantity includes a reference source configured to provide a reference source signal, a digitally controlled signal source and a digital controller. The digitally controlled signal source is configured to provide a digitally controlled quantity. The reference quantity is determined based on the digitally controlled quantity. The digital controller is configured to provide a digital control signal to control the digitally controlled signal source to adapt the digitally controlled quantity based on the reference source signal using a feedback.

Abstract: A differential delay line includes a series connection of a plurality of differential delay stages. Each differential delay stage includes a first delay element and a second delay element. The first delay element has a first input, a second input and an output. The second delay element has a first input, a second input and an output. The output of the first delay element of an n-th differential delay stage of the plurality of differential delay stages is coupled to an input of the second delay element of an (n+m)-th differential delay stage of the plurality of differential delay stages, wherein m is an even natural number larger than or equal to two.

Abstract: The present invention relates to a communication system having a digital to analog converter, a first input, a summation component, and a compensation unit. The converter is configured to receive a first. The first input is configured to receive a phase modulation signal. The compensation unit includes one or more inputs and is configured to measure amplitude samples of the first signal at a first of the one or more inputs and to generate a correction signal according to the one or more inputs. The correction signal at least partially accounts for estimated distortions of the phase modulation signal from the amplitude modulation path. The summation component is configured to receive the phase modulation signal and the correction signal and to generate a corrected phase modulation signal as a result.

Abstract: A communication device is described comprising a receiver configured to receive a receive symbol vector resulting from a transmission of a transmit symbol vector from at least one transmitter to the receiver wherein the transmit symbol vector comprises a plurality of transmit symbols wherein each transmit symbol is associated with a modulation type and a detector configured to determine a detection order for the plurality of transmit symbols based on the modulation types and to determine, for at least one bit of at least one transmit symbol, at least one soft value based on the receive symbol vector according to the detection order.

Abstract: The present disclosure relates to a frequency synthesizer. The frequency synthesizer includes a phase comparator having first and second input nodes. The first input node receives a reference signal having a reference frequency. A channel control block has an input that receives a channel word and an output coupled to the second input node of the phase comparator. A local oscillator (LO) output node provides an LO signal having an LO frequency based on the reference frequency and the channel word. A feedback back couples the LO output node to the second input node of the phase comparator through the channel control block. A non-linear error correction element is operably coupled on a coupling path extending between the phase comparator and the DCO.

Abstract: This disclosure relates to a continuous open loop control to closed loop control transition.

Abstract: An amplifier circuit is described comprising a first field effect transistor comprising a first source/drain terminal coupled to a first supply terminal, a second source/drain terminal coupled to an output of the amplifier circuit and a gate terminal; a second field effect transistor comprising a first source/drain terminal coupled to an input of the amplifier circuit, a second source/drain terminal coupled to the gate terminal of the first field effect transistor and a gate terminal; a third field effect transistor comprising a first source/drain terminal coupled to a first bias current source of the amplifier circuit, a second source/drain terminal and a gate terminal coupled to its first source/drain terminal and the gate terminal of the second field effect transistor; a fourth field effect transistor comprising a first source/drain terminal coupled to a second bias current source, a second source/drain terminal coupled to a second supply terminal and a gate terminal coupled to the second source/drain term

Abstract: An amplifier circuit is described comprising a first field effect transistor comprising a first source/drain terminal coupled to a first supply terminal, a second source/drain terminal coupled to an output of the amplifier circuit and a gate terminal; a second field effect transistor comprising a first source/drain terminal coupled to an input of the amplifier circuit, a second source/drain terminal coupled to the gate terminal of the first field effect transistor and a gate terminal; a third field effect transistor comprising a first source/drain terminal coupled to a first bias current source of the amplifier circuit, a second source/drain terminal and a gate terminal coupled to its first source/drain terminal and the gate terminal of the second field effect transistor; a fourth field effect transistor comprising a first source/drain terminal coupled to a second bias current source, a second source/drain terminal coupled to a second supply terminal and a gate terminal coupled to the second source/drain term

Abstract: A semiconductor device is described having at least one semiconductor chip, the chip having an active area on a top side thereof, the active area formed at least in part of low-k material, said low-k material defining a low-k subarea of said active area; an embedding material, in which said at least one semiconductor chip is embedded, at least part of the embedding material forming a coplanar area with said active area; at least one contact area within the low-k subarea; a redistribution layer on the coplanar area, the redistribution layer connected to said contact areas; at least one first-level interconnect, located outside said low-k subarea, the first-level interconnect electrically connected to at least one of said contact areas via the redistribution layer.

Abstract: Some aspects relate to a semiconductor device disposed on a semiconductor substrate. The device includes an STI region that laterally surrounds a base portion of a semiconductor fin. An anode region, which has a first conductivity type, and a cathode region, which has a second conductivity type, are arranged in an upper portion of the semiconductor fin. A first doped base region, which has the second conductivity type, is arranged in the base of the fin underneath the anode region. A second doped base region, which has the first conductivity type, is arranged in the base of the fin underneath the cathode region. A current control unit is arranged between the anode region and the cathode region. The current control unit is arranged to selectively enable and disable current flow in the upper portion of the fin based on a trigger signal. Other devices and methods are also disclosed.

Abstract: A noise reduction device may be provided. The noise reduction device may include: an input configured to receive an input signal including a representation in a frequency domain of an audio signal, wherein the representation includes a plurality of time frames and a plurality of coefficients for each time frame; a noise detection circuit configured to determine a first indicator being indicative of a bandwidth of a coefficient over at least two time; a noise reduction circuit configured to reduce based on the first indicator a noise component in the audio signal; and an output configured to output an output signal including a representation in the frequency domain of the audio signal with the reduced noise component.

Abstract: A communication device is described including a transceiver configured to establish a communication channel via a first radio cell and receive idle mode information of a second radio cell via the communication channel.

Abstract: A semiconductor device is described having at least one semiconductor chip, the chip having an active area on a top side thereof, the active area formed at least in part of low-k material, said low-k material defining a low-k subarea of said active area; an embedding material, in which said at least one semiconductor chip is embedded, at least part of the embedding material forming a coplanar area with said active area; at least one contact area within the low-k subarea; a redistribution layer on the coplanar area, the redistribution layer connected to said contact areas; at least one first-level interconnect, located outside said low-k subarea, the first-level interconnect electrically connected to at least one of said contact areas via the redistribution layer.

Abstract: An apparatus for determining a target precoding matrix from a plurality of precoding matrix candidates is provided. The apparatus includes a covariance matrix value provider, a real part determiner and a precoding matrix determiner. The precoding matrix determiner is adapted to determine the target precoding matrix from the plurality of precoding matrix candidates, wherein the precoding matrix determiner is configured to determine the target precoding matrix based on at least one of the one or more real covariance values.

Abstract: The method includes receiving a data signal, the data signal including two training sequences, performing a first evaluation of the data signal based on a first training sequence of the two training sequences, performing a second evaluation of the data signal based on a second training sequence of the two training sequences, and processing the data signal based on a result of the first and second evaluations.