Abstract: A pattern-matching system, such as of the RETE type, is updated. The updating operation is generalize to operate with correct match resuslts for generalized RETE networks (ones where join nodes may have either predecessor be another join node), and for arbitrary partial update state, characterized by stop nodes designating how far update operations have progressed for particular update tokens (designated suspended tokens) at any particular time. The updating operation consists of the following steps: First, all tokens only partially updated through the network are shadowed, in that the partial result memories associated with the stop nodes are put into the state that exists or existed before the suspended tokens arrive at the stop nodes. Then for each suspended token, it is pushed to resume nodes connected as RHS (or LHS) inputs in a descending order of resume nodes.

Abstract: A complementary bipolar transistor structure having one symmetrical intrinsic region for both the NPN and PNP transistors and a method for fabricating the structure. The transistor structure includes a vertical NPN transistor operating in the upward direction and a vertical PNP transistor operating in a downward direction. In the method, the sub-emitter and the sub-collector regions are formed by depositing a first epitaxial layer of semiconductor material of a first conductivity type on the surface of a semiconductor substrate of a second conductivity type, and forming the sub-collector by etching a shallow trench in the first layer and depositing semiconductor material of a second conductivity type by LTE and planarizing.

Abstract: APL, an interpretive processor, cooperates with external routines by calling those external routines to process data passed to them and receives results from the external routines. The called external routines, during their respective execution of the call, can request internal services of the calling APL interpretive processor. Such requests include execution of internal APL functions or operators, calling other external routines, recursive execution of external routines, and setting or obtaining values of internal APL data items.

Abstract: An improved edge design for a printed circuit board used with a connector having spring biased contact members. The printed circuit board has a nose piece bonded thereon which is made of a lubritious, insulating material for deflecting the spring biased contact members without causing damage to the members or the electrical contacts thereon. In a preferred embodiment, each spring biased member is fixed in the connector at one end and has a bent portion with an electrical contact on the bent portion. The electrical contact is in an impact protected position when its spring biased member is undeflected, and moves to a contact making position for contact with an input/output tab on the printed circuit board as the spring biased member is deflected around its fixed end during the plugging in operation of the printed circuit board.

Abstract: High resolution absorption microscopy, spectroscopy and similar applications are implemented by providing for a measurement tip which is maintained spaced from a sample under investigation sufficiently close so as to equalize thermal levels in the tip and the sample; generally within about 10 Angstroms. Energy is applied to the sample being investigated and either a steady state or dynamic junction potential is measured. The junction potential is representative of local sample temperature. The close separation can be maintained by techniques employed in scanning tunneling microscopy, atomic force microscopy or capacitance microscopy. In the event the close separation is maintained using scanning tunneling microscopy techniques, then a switching arrangement is provided for connecting a conductive film (either of the sample or supported on a sample) to either a suitable potential or ground and simultaneously connecting the STM tip either in a feedback loop or to a device for measuring the junction potential.

Abstract: A signal coding process more particularly suitable for coding a voice signal. At least a portion of the frequency bandwidth of said voice signal is split into several subbands, the content of which is then requantized using a dynamic allocation of requantizing levels throughout the subbands. The process is also made to provide optimal level allocations. The requantized signal samples throughout the subbands are packed into a binary word.

Abstract: A TAB package is described which includes a flexible dielectric film with an outer edge, back and front faces and an aperture therein. The front face, as is conventional, is provided with a plurality of beam leads, which leads extend into the aperture and connect to a semiconductor chip. Thermally conductive body means is provided which has a well formed therein, the well defined by a lip comprising the outer rim of the body means. The back face of the semiconductor chip is thermally connected to the thermally conductive body means and the flexible dielectric film is formed to conform to the surface of the well and to extend over its rim whereby the beam leads also conform to the well and rim structure. The beam leads are thereby made available for electrical connection in the vicinity of the rim. Means are also provided for attaching the outer edge of the film to the thermally conductive body means so as to enable flexure of the film in the event of differential expansion or contraction at connection points.

Abstract: A system for designing an intercommunication network among a plurality of devices. The system includes a device for storing rules to meet design requirements and a mechanism connected to the device for storing rules in order to revise the rules dynamically. Also provided is a device for storing data and a mechanism connected to the device for storing data in order to revise the data. A requestor has the ability to access all rules and to revise a portion of the data. Moreover, a designer has the ability to access all rules and to revise another portion of the data, which portion has at least one subportion that cannot be revised by the requestor.

Abstract: A method of editing compound documents containing both text and non-text components, such as image, graphics or digital-audio objects. The method transforms a compound document in modified revisable form architecture to an internal editing format. In the transformation process, non-text components are recognized and catalogued in a component index generated for the compound document in the internal editing format. The component index contains information on the characteristics of the non-text components and describes the size, location and type of each non-text component. A reference or referencing control to the non-text component is placed in the text at the location the user wishes to print or display the non-text component in the final document. Through the invention, it is possible to represent and display a single non-text component multiple times within the compound document while storing only a single physical representation of the non-text component within the document.

Abstract: This invention relates to printing elements for use in a serial wire matrix printer having a plurality of driven wire printing elements. Each printing element has actuating means associated therewith to drive the elements against a ribbon from a retracted position to an actuated position and returned. Each actuating means includes an elongated drive element anchored at opposite ends thereof to piezoelectric crystal stacks. The piezoelectric stacks have electrical supply means for causing expansion of the crystal stacks responsive to an electric signal. The drive element is normally maintained in a taut bowed position and is secured to the piezoelectric crystal stacks so as to be driven toward a straightened condition upon actuation to the piezoelectrical crystal stacks to thereby drive the printing element axially to the printing or actuated position from the retracted position upon actuation of the crystal assembly.

Abstract: A computer system and method for operating a computer system capable of running in mutually incompatible real and protected addressing modes, in which programs written for one mode can be run in the other mode without modification. The operating system using BIOS assembles two different common data areas for the two modes, each inclusive of device block pointers, function transfer table pointers, data pointers, and function pointers. The common data area for the real mode is assembled first. To assemble the pointers for the protected mode common data area, the offset values from the real mode area are copied directly, and then selector values are inserted whose physical addresses correspond to the segments of the corresponding pointers in the real mode area. The selector values are derived from a segment descriptor table.

Abstract: A high speed counter circuit for counting electrical pulses includes a master/slave flip-flop at the input stage of the counter. An AND gate logically ANDs the pulses being counted with the master output to produce a first gating signal. A plurality of cascade coupled flip-flops each having a slave and an inverse slave output are provided. The clock input to each cascade coupled flip-flop is produced by the logical OR of the electrical pulses being counted, the first gating signal and the slave output of all preceding flip-flops of the counter. The counter output is provided by the inverse slave output of each flip-flop.

Abstract: A computer system having trace arrays and registers that provide error tracing that permits retry of operations in a pipelined, multiprocessing environment after the operations have been allowed to quiesce. The trace arrays in each retry domain include one master trace array. The master arrays store an event trace identification code, a cross reference event trace indentification code, an error flag, and a cross reference bit. The trace arrays provide a record of the events occurring between the occurrence of an error and the completion of quiescence, when retry can be attemped. Error registers are used to record events in which errors occur during quiescence, where trace arrays cannot be implemented.

Abstract: Apparatus for recording a displayed frame of video data by storing the binary data bits from identical segments of each video scan line, thereafter supplying the stored bits of the segments to a traversing matrix print head for recording the bits in those segments, and repeating the process with data bits from a different series of scan line segments. The number of data bits comprising a segment usually corresponds to the number of recording elements in the print head, and the number of print head excursions will vary inversely to the number of data bits in each segment. A resulting recorded video frame thus appears rotated 90.degree. with respect to the original frame orientation.

Abstract: An improved internal reader function is disclosed in which all internal reader jobs are dynamically created (and scheduled) and canceled. The operator no longer needs to guess how many internal readers to create and cancel in order to handle the ever-changing computer system workload. Instead, a subsystem of the computer system operating system continuously and optimally handles the workload by automatically creating new internal reader jobs or assigning work to previously automatically created internal reader jobs which have completed processing and are waiting for additional work, i.e. data sets, to be processed. To handle this dynamic processing, a control block structure is created to keep track of the internal reader jobs. The improved subsystem also eliminates "Bottlenecks" since all data sets to be processed are transferred directly to an internal reader job data set control block.

Abstract: The invention provides a method of securing remote terminal access to a central computer. The method uses the services of a physically secure coprocessor which is, or will be, coupled to the remote terminal for the purposes of effecting remote access to the central computer. The method comprises transferring an encrypted decryption key from the central computer to the physically secure coprocessor. The coupling between the coprocessor and remote terminal allows a file to be encrypted which can confirm that the remote terminal (which is the source of the encrypted file) has or had access to the specific coprocessor to which the encrypted decryption key had previously been transferred. Thereafter the encrypted file is transferred to the central computer and is examined there to confirm that the source of the file has access to the specific coprocessor which received the encrypted decryption key.

Abstract: An improved apparatus and process are described in which a direct negative is formed using commercially available multi-stylus recording heads. A negative precursor comprised of a transparent support and an opaque thermoplastic ink layer carried thereon, is brought into contact with an ink receiving medium comprised of a resistive layer and a thin conductive ink receiving layer thereon. Electrical currents are provided by the recording styli of the multi-stylus recording head to the resistive layer to provide sufficient heat to soften regions of the opaque ink brought into contact with the conductive layer, by which regions of said opaque ink are transferred to the ink receiving conductive layer. In this manner, a pattern of opaque ink regions is removed from the surface of said transparent support, whereby a direct negative is formed having light opaque and light transparent regions.

Abstract: The memory control subsystem controls and arbitrates access to a memory shared by a plurality of users. A processor with its cache and input/output devices has direct access to the memory through a direct memory access bus.The controls subsystem comprises a processor controller, a DMA controller and a memory controller.A processor request is buffered into the processor controller and is serviced immediately if the memory controller is available. A simultaneous transfer between the devices and buffers in the DMA controller is possible. If the memory controller is busy, the DMA controller causes the DMA transfer to be interrupted, the processor request to be serviced and the DMA transfer to be resumed afterwards.Write requests made by the processor are buffered into processor controller and an acknowledgement signal is sent to the processor which can resume execution without waiting the memory update completion.