Abstract: One embodiment is directed towards a method of manufacturing a packaged circuit. The method includes partially etching an internal surface of a lead frame at dividing lines between future sections of the lead frame as first partial etch. One or more dies are attached to the internal surface of the lead frame and encapsulated. The method also includes partially etching an external surface of the lead frame at the dividing lines to disconnect different sections of lead frame as a second partial etch, wherein the second partial etch removes a laterally wider portion of the lead frame than the first partial etch of the internal surface; and partially etching the external surface of the lead frame as a third partial etch, wherein the third partial etch overlaps a portion of the second partial etch and extends deeper into the lead frame than the second partial etch.

Abstract: A dynamic voltage response network for a switching regulator with droop control providing a droop control signal includes a voltage identification setting network, a pass and hold system, and a reset network. The voltage identification setting network initiates a hold condition and adjusts an output voltage reference in response to a change in a voltage identification input. The pass and hold system passes the droop control signal during a pass condition and holds the droop control signal during the hold condition. The reset network resets the pass and hold system to the pass condition in response to a reset signal. The reset signal may be provided in response to a variety of conditions, such as load transients, proximity between the developed droop control signal and the held droop control signal, timeout after the output voltage reference is adjusted, among other reset conditions.

Abstract: An embodiment is an apparatus that includes an energy-storage circuit and a rectifying circuit. The energy-storage circuit is configured to generate a current that flows in a direction, and the rectifying circuit is configured to substantially block the current from flowing in a reverse direction in response to the current. Such an apparatus may be configured to block a reverse current before it begins to flow. For example, such an apparatus may include a transistor disposed in the path of the current, and may be configured to deactivate the transistor while a forward current is still flowing. Furthermore, by being configured to block the current from flowing in a reverse direction in response to the current itself, such an apparatus may better block a reverse current than an apparatus that blocks a reverse current in another manner, such as in response to a voltage across a rectifying transistor.

Abstract: Linearizers can improve the linearity of power amplifiers by canceling or reducing amplitude of non-linearity components, (e.g., IM3, IM5, IM7, IM9, etc.) generated by the power amplifier. The linearizers can obtain samples of signals output by the power amplifier and process the samples to produce a compensation signal that is applied onto or into a transmission path leading to the power amplifier's input. The compensation signal is generated such that when amplified by the power amplifier, the amplified compensation signal cancels or reduces at least a portion of the non-linearity components produced by the power amplifier. A controller can improve the correction of the non-linearity components by executing one or more calibration algorithms and/or one or more tuning algorithms and adjusting settings of the linearizer based on the results of the algorithm(s).

Abstract: Optoelectronic devices (e.g., optical proximity sensors), methods for fabricating optoelectronic devices, and systems including optoelectronic devices, are described herein. An optoelectronic device includes a light detector die that includes a light detector sensor area. A light source die is attached to a portion of the light detector die that does not include the light detector sensor area. An opaque barrier is formed between the light detector sensor area and the light source die, and a light transmissive material encapsulates the light detector sensor area and the light source die. Rather than requiring a separate base substrate (e.g., a PCB substrate) to which are connected a light source die and a light detector die, the light source die is connected to the light detector die, such that the light detector die acts as the base for the finished optoelectronic device. This provides for cost reductions and reduces the total package footprint.

Abstract: An optoelectronics apparatus selectively drives a light source, and includes four electrically isolated photodetector (PD) segments that detect light that has reflected off an object. Each of the four PD segments produces a corresponding signal, referred to as signals A, B, C and D, indicative of the light detected by the respective PD segment. Circuitry is used to produce a first motion signal indicative of a sum of the signals A plus B minus a sum of the signals C plus D, i.e., the first motion signal is indicative of (A+B)?(C+D). Further circuitry produces a second motion signal indicative of (B+C)?(A+D). Additional circuitry produces a signal and/or data that is indicative of a direction and/or rate of motion of an object, in dependence on the first and second motion signals.

Abstract: Techniques for the estimation of sample-time and gain mismatch errors in a two-channel time interleaved analog to digital converter that are devoid of any multiplication operation. In a sample-time mismatch error evaluation, the signs and the absolute values from the two ADCs are used to provide an estimate of the sample-time mismatch error. In a gain error estimation algorithm, the absolute values of the outputs from the two ADCs are subtracted and accumulated. The errors can then be corrected, in a preferred embodiment, using suitable adaptive sample time and gain correction techniques.

Abstract: Embodiments of the subject application provide for a circuit comprising: a lead frame having a first plurality of exposed terminals, the lead frame defining a plane; a laminate substrate in the plane defined by the lead frame, adjacent to the lead frame, and electrically coupled to the lead frame, the laminate substrate having a first surface including a second plurality of exposed terminals and a second surface opposite the first surface; a first one or more dies mounted on the lead frame and electrically coupled to the lead frame; and a second one or more dies mounted on the second surface of the laminate substrate and electrically coupled to the laminate substrate.

Abstract: A circuit module includes a plurality of electronic components and a single-layer conductive package substrate. The single-layer conductive package substrate is adapted to physically support and electrically interconnect the electronic components. The substrate has a peripheral portion and an interior portion. The peripheral portion includes a plurality of peripheral contact pads coupled to corresponding electronic components. The interior portion includes a plurality of floating contact pads that are electrically isolated from the peripheral contact pads and are coupled to corresponding electronic components.

Abstract: A lead frame having a die thereon connects a conductive area on the die to a lead frame contact using a conductive clip that includes a structural portion that is received with a recess-like “tub” formed in the lead frame contact. The end of the clip received in the tub is held in place during subsequent handling by a solder paste deposit until the clip and leadframe undergo solder reflow to effect a reliable electrical connection. The effective surface area between one side of the clip and the other side of the clip within the tub is different so that the surface tension of the liquefied solder formed during the solder reflow step will “draw” the clip into a preferred alignment against a “stop” surface.

Abstract: A regulator system with dynamic droop including a regulator control network which is adapted to control regulation of an output voltage to a reference level, a DC droop network which provides a droop signal to modify the reference level based on output load according to a predetermined DC load line, and a dynamic droop network which adjusts the droop signal to delay recovery to the predetermined DC load line within an AC load line tolerance in response to a load transient. A transient reduction network may be included to reduce transient overshoot for load insertion or release depending upon duty cycle type. The dynamic droop network adjusts the droop signal to optimize utilization of an AC delay parameter while transitioning between an AC offset voltage allowance and the predetermined DC load line.

Abstract: A predictive current feedback system for a switched mode regulator including a sample and hold network for sampling voltage across a lower switch of the regulator and for providing a hold signal indicative thereof, and a predictive current feedback network which adds an offset adjustment to the hold signal based on a duration of a pulse width of a pulse control signal developed by the regulator. Sampling may be done while the lower switch is on for providing a hold value indicative of inductor current while the pulse control signal is low. The offset adjustment may be added to the hold signal in response to a transient event when the pulse signal is high. The offset may be incremental values after each of incremental time periods after a nominal time period, or may be a time-varying value. Adjustment may be made while the pulse signal is low as well.

Abstract: A modulator with balanced slope compensation including a control network, a slope compensation network, an offset network and an adjust network. The control network receives a feedback signal indicative of an output voltage and provides a loop control signal. The slope compensation network develops a slope compensation signal. The offset network determines a DC offset of the slope compensation signal. The adjust network combines the DC offset, the slope compensation signal and the loop control signal to provide a balanced slope compensated control signal. The DC offset may be determined as a peak of the slope compensation signal. The slope compensation signal may be developed based on the output voltage and a pulse control signal, in which the pulse control signal is developed using the balanced slope compensated control signal.

Abstract: A communication system comprising a first and second transceiver is provided. The first transceiver has a first and second port coupled to a communication medium, wherein a first differential capacitor couples the first and second ports together. The second transceiver has a third and fourth port each AC coupled to the communication medium, wherein a second differential capacitor couples the third and fourth ports together.

Abstract: A voltage regulation circuit includes a power stage for generating a regulated output voltage responsive to an input voltage and at least one PWM signal. A voltage divider circuit is connected to the output of the power stage and generates a feedback voltage. First circuitry generates the at least one PWM signal responsive to a voltage error signal, a filtered output voltage signal and a ramp voltage signal. The filtered output voltage is used for substantially removing loop gain change caused by the voltage divider circuit. A voltage compensation circuit generates the voltage error signal responsive to a feedback voltage and a reference voltage.

Abstract: A single-cycle charge regulator (SCCR) may be used in operating a power converter at a constant frequency without requiring compensation. The SCCR may include a first control loop to generate an error value based on the output voltage of the power converter and a reference voltage, and to generate a first control value based on the error value to control steady-state behavior of the output of the power converter. A second control loop may generate a second control value based on the error value, to regulate response of the power converter to a transient deviation on the output voltage.

Abstract: Circuits, methods, and apparatus that reduce the power required to drive transistors in switching power supply regulators under various load conditions. One example provides a power supply regulator having multiple parallel transistors in order to reduce series on resistance. When the regulator is lightly loaded, a reduced number of devices are driven by the regulator. That is, one or more devices are not driven, rather their gates are held at a voltage such that the devices remain in the off or non-conductive state. When the regulator is more heavily loaded, more or all of the devices are driven.

Abstract: A clip interconnect comprises a columnar part, a bridge part, and a locking feature. The bridge part has a plurality of sides. The columnar part and the bridge part are configured to form an angle at an interface between the columnar part and the bridge part. The locking feature is located in at least one of the plurality of sides of the bridge part. The locking feature comprises an alternating pattern of teeth and valleys.

Abstract: An embodiment of a controller for a multidirectional signal converter is operable to cause the converter to regulate a first signal at a first converter node, and to have a switch timing that is independent of a direction of power transfer between the first converter node and a second converter node. For example, in an embodiment, such a controller may be part of a bidirectional voltage converter that handles power transfer between two loads. Such a voltage converter may have improved conversion efficiency and a smaller size and lower component count as compared to a conventional multidirectional voltage converter. Furthermore, such a voltage converter may be operable with a common switching scheme regardless of the direction of power transfer, and without the need for an indicator of the instantaneous direction of power flow.

Abstract: A circuit comprises a first input for receiving a supply voltage and a second input for receiving a sensed current signal from an output of a DC to DC converter. The circuit also includes an output voltage for providing an adjustable drive voltage to a drive circuit. The circuit additionally includes circuitry for adjusting the drive voltage responsive to supply voltage and the sensed current signal.