Abstract: Four related but independent aspects are described: (1) a method and a system to derive mesh surface descriptions (also called connectivity-wireframes) and material properties from objects represented as a scalar field (e.g. discrete multi-dimensional data), scalar functions (e.g. implicit surfaces) or any other surface description, (2) a compact, optionally multi-scalable, optionally view-dependent, optionally animation-friendly, multi-dimensional surface representation method and system comprising a combination of a surface mesh description and material properties associated with a reference grid, (3) a digital coding and decoding method and system of a combined surface mesh representation with connectivity information and material properties and a reference grid, and (4) a method and system for conversion of other surface descriptions to the combined surface mesh representation and reference grid.

Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.

Abstract: A semiconductor device includes: an n-transistor including a first gate insulating film made of a high-dielectric-constant material and a first gate electrode fully silicided with a metal, the first gate insulating film and the first gate electrode being formed in this order over a semiconductor region; and a p-transistor including a second gate insulating film made of the high-dielectric-constant material and a second gate electrode fully silicided with the metal, the second gate insulating film and the second gate electrode being formed in this order over the semiconductor region. If the metal has a work function larger than a Fermi level in potential energy of electrons of silicon, a metal concentration of the second gate electrode is higher than that of the first gate electrode whereas if the metal has a work function smaller than the Fermi level of silicon, a metal concentration of the second gate electrode is lower than that of the first gate electrode.

Abstract: A semiconductor device includes: a semiconductor substrate; a gate insulating film formed on the semiconductor substrate and made of a high-dielectric-constant material composed of a plurality of layers stacked perpendicularly to a principal surface of the semiconductor substrate and associated with respective phases; and a gate electrode formed on the gate insulating film.

Abstract: A method for removing organic contaminants from a semiconductor surface whereby the semiconductor is held in a tank and the tank is filled with a fluid such as a liquid or a gas. Organic contaminants, such as photoresist, photoresidue, and dry etched residue, occur in process steps of semiconductor fabrication and at times, require removal. The organic contaminants are removed from the semiconductor surface by holding the semiconductor inside a tank. The method may be practiced using gas phase processing or liquid phase processing. The tank is filled with a gas mixture, a liquid, and/or a fluid, such as water, water vapor, ozone and/or an additive acting as a scavenger (a substance which counteracts the unwanted effects of other constituents of the system).

Abstract: Electronic devices are disclosed that may be used for infrared radiation detection. An example electronic device includes a substrate, a transistor included in the substrate and a silicon-germanium (Si—Ge) structural layer coupled with the transistor. The structural layer has a stress in a predetermined range, where the predetermined range for the stress is selected prior to deposition of the structural layer. Also, the structural layer is deposited on the substrate subsequent to formation of the transistor such that deposition of the structural layer does not substantially adversely affect the operation of the transistor.

Abstract: The present invention is a design apparatus compiled on a computer environment for generating from a behavioral description of a system comprising at least one digital system part, an implementable description for said system, said behavioral description being represented on said computer environment as a first set of objects with a first set of relations therebetween, said implementable description being represented on said computer environment as a second set of objects with a second set of relations therebetween, said first and second set of objects being part of a design environment.

Abstract: This invention relates to a method and apparatus for channel estimation. A method of determining a maximum likelihood frequency domain estimate of the channel response of a channel between at least one transmitting peer and at least one receiving peer, the method comprising transmitting NU reference tones from the transmitting peer to the receiving peer; capturing the NU reference tones at the receiving peer; and determining at the receiving peer from the NU reference tones the maximum likelihood frequency domain estimate of the channel response at NF predetermined frequencies by directly exploiting the finiteness of the time response of the channel.

Abstract: Four related but independent aspects are described: (1) a method and a system to derive mesh surface descriptions (also called connectivity-wireframes) from objects represented as a scalar field (e.g. discrete multi-dimensional data), scalar functions (e.g. implicit surfaces) or any other surface description, (2) a compact, optionally multi-scalable, optionally view-dependent, optionally animation-friendly, multi-dimensional surface representation method and system comprising a combination of a surface mesh description associated with a reference grid, (3) a digital coding and decoding method and system of a combined surface mesh representation with connectivity information and a reference grid, and (4) a method and system for conversion of other surface descriptions to the combined surface mesh representation and reference grid. The presentation of the surface of an object may be transmitted across a communications channel by means of a bit stream.

Abstract: The invention presents video information stream encoding methods used in applications of a data storage and transfer design methodology for data-dominated applications. The invention relates to video encoding methods with variable video frames designed such that the digital system on which the methods are implemented, consumes a minimal of power, during their execution and still obtain excellent performance such as speed compliance. The resulting video information stream encoding methods can be mapped on different processor architectures and custom hardware. The methods enable combined low power consumption, reduced bus loading and increased performance to achieve speed compliance. The encoding methods are essentially based on block-based motion estimation and grouping of motion estimations of various video frames.

Abstract: An electronic system for receiving spread spectrum signals, in particular GPS and/or GLONASS signals is described. In particular, the functional specification for the design of an advanced GPS and/or GLONASS receiver (AGGR) is disclosed. The AGGR is preferably fabricated including at least one sub-system implemented as an application specific integrated circuit (ASIC). The present disclosure describes the AGGR functionality and its modes of operation to a detail allowing a future user of the device to understand its features and limitations and to assess its suitability for an envisaged application. A method and an apparatus are described for processing received spread spectrum signals modulated with a unique pseudo-random code including a capability of hierarchically chaining a plurality of channel modules in series, specific forms of delay line units and correlator units which can process CA-code, P-code and Y-code signals.

Abstract: A level-shifter architecture with high-voltage driving capability and extremely low power consumption, exploiting dynamic control of the charge on the gate electrodes of the high-voltage output transistors, is provided. The architecture can be integrated in CMOS technology and can be applied to various applications, including monolithic integration of high-voltage display driver circuits in battery-powered applications.

Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.

Abstract: A method of fabricating an infrared detector, a method of controlling the stress in a polycrystalline SiGE layer and an infrared detector device is disclosed. The method of fabricating includes the steps of forming a sacrificial layer on a substrate; patterning said sacrificial layer; establishing a layer consisting essentially of polycrystalline SiGe on said sacrificial layer; depositing an infrared absorber on said polycrystalline SiGe layer; and thereafter removing the sacrificial layer. The method of controlling the stress in a polycrystalline SiGe layer deposited on a substrate is based on varying the deposition pressure. The infrared detector device comprises an active area and an infrared absorber, wherein the active area comprises a polycrystalline SiGe layer, and is suspended above a substrate.

Abstract: A method for forming an opening in an organic insulating layer by covering the insulating layer with a bilayer containing a resist hard mask layer and a resist layer on top of the resist hard mask layer. The bilayer is patterned, and an opening is created by plasma etching the insulating layer in a reaction chamber containing a gas mixture. The plasma etching is controlled so that virtually no etch residues are deposited and so that the side walls of the opening are fluorinated to enhance the anisotropy of the etching. The gas mixture can be a mixture of a fluorine-containing gas and an inert gas, a mixture of an oxygen-containing gas and an inert gas, or a mixture of hydrogen bromide and an additive.

Abstract: The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate; step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate, the dopant from said solids-based dopant source diffusing directly into said substrate to form a first diffusion region and, at the same time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate to form a second diffusion region in at least some areas of said substrate to form a second diffusion region in at least some areas of said substrate not covered by said pattern; and step 3) forming a metal contact pattern substantially in alignment with

Abstract: The invention presents methods and systems for plating conductive patterns which at least result in a high uniformity and avoid parasitical plating effects. A plating system is disclosed for plating conductive patterns formed at a first surface of a substrate. The system is such that exposure surfaces not to be plated is inhibited. A first electrode of the system is immersed in the plating solution while the second electrode is in contact with another than the first surface of the substrate. The conductive patterns to be plated are temporarily electrically connected with the second electrode.

Abstract: The invention presents video information stream encoding methods used in applications of a data storage and transfer design methodology for data-dominated applications. The invention relates to video encoding methods with variable video frames designed such that the digital system on which the methods are implemented, consumes a minimal of power, during their execution and still obtain excellent performance such as speed compliance. The resulting video information stream encoding methods can be mapped on different processor architectures and custom hardware. The methods enable combined low power consumption, reduced bus loading and increased performance to achieve speed compliance. The encoding methods are essentially based on block-based motion estimation and grouping of motion estimations of various video frames.

Abstract: A system and method for multi-level iterative filtering of a data structure, e.g., an image, wherein elements of the data structure form the zero layer in the zero level and the data layer in each subsequent level is given by the results of one iteration. First, the method of the present system includes subdividing each level into a plurality of regions, there being data dependency between the data in one data layer in one level and the data layers in any other level of a region. Second, the method includes filtering each level by lapped-region processing. Lastly., the method includes scheduling the data processing of each level to provide substantially regional synchronization of the filtering at each level. In one embodiment, the sequence for traversing the regions is selected so that outputs from processing the regions are scheduled to occur at substantially equal time intervals.

Abstract: The present invention is related to a metallization structure on a fluorine-containing dielectric. This metallization structure includes a conductive pattern; a fluorine-containing dielectric; and a barrier layer containing a material, i.e. a near noble metal such as Co, Ni, Pt, and Pd. The barrier layer includes at least a first part, being positioned between the fluorine-containing dielectric and the conductive pattern, the first part containing at least a first and a second sub-layer, the first sub-layer contacting the fluorine-containing dielectric being impermeable for fluorine.