Patents Assigned to InterUniversitaire Microelektronica
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Patent number: 6643117Abstract: A ferro-electric capacitor comprising a first electrode comprising at least a layer of a conductive oxide having at least two sub-layers of individual grains, wherein individual grains of a top sub-layer of the two sub-layers are oriented randomly. The capacitor further comprises a second electrode that is isolated from said first electrode. The capacitor further comprises a ferro-electric PZT layer that is sandwiched between said first electrode and said second electrode. A method of making the ferro-electric capacitor is also provided.Type: GrantFiled: January 21, 2003Date of Patent: November 4, 2003Assignee: Interuniversitair Microelektronica CentrumInventors: Gerd Norga, Dirk Wouters
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Patent number: 6626026Abstract: An apparatus that is configured to sense the presence of gases, vapors and liquids using acoustic waves. The apparatus comprises a first part that is configured to generate acoustic waves. The apparatus further comprises a second part having a sensing and acoustic wave guiding device, which is configured to sense the presence of such substances and propagate acoustic waves. The first part is removably fixable to the second part of the apparatus. When the first part is fixed to the second part, the acoustic waves propagate in the second part.Type: GrantFiled: April 6, 2001Date of Patent: September 30, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Pedro Banda, Andrew Campitelli
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Patent number: 6602760Abstract: A method of producing a semiconductor layer onto a semiconductor substrate. The method comprises providing a first semiconductor substrate, and providing a second semiconductor substrate. The method also comprises producing a porous layer, which has a porosity profile, on top of the first semiconductor substrate, and producing a porous layer, which has a porosity profile, on top of the second semiconductor substrate. The method further comprises bringing the porous layer of the second substrate into contact with the porous layer of the first substrate, so as to form a bond between the two substrates, performing a thermal annealing step, and lifting off of the second substrate, leaving a layer of the second substrate's semiconductor material attached to the first substrate.Type: GrantFiled: December 19, 2001Date of Patent: August 5, 2003Assignees: Interuniversitair Microelektronica Centrum (IMEC), UmicoreInventors: Jef Poortmans, Giovanni Flamand, Renat Bilyalov
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Patent number: 6603605Abstract: A system and method for guiding a beam of electromagnetic radiation is disclosed. The system includes at least a first stack of dielectric layers, the first stack comprising at least a first substack, a second substack and a third substack, the third substack separating said first and second substack, the first substack comprising at least one dielectric layer, the second substack comprises at least one dielectric layer, the third substack comprises at least one dielectric layer. The dielectric layers of the first substack and the second substack equidistant from the third substack have the same refractive index.Type: GrantFiled: November 6, 2000Date of Patent: August 5, 2003Assignees: Interuniversitair Microelektronica Centrum (IMEC, VZW), Universiteit GentInventors: Peter Bienstman, Roel Baets
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Patent number: 6599814Abstract: The present invention is related to a method for removal of silicon carbide layers and in particular amorphous SiC of a substrate. Initially, the exposed part of a carbide-silicon layer is at least partly converted into an oxide-silicon layer by exposing the carbide-silicon layer to an oxygen containing plasma. The oxide-silicon layer is then removed from the substrate.Type: GrantFiled: February 19, 2002Date of Patent: July 29, 2003Assignees: Interuniversitair Microelektronica Centrum (IMEC), Dow3Corning corporationInventors: Serge Vanhaelemeersch, Herman Meynen, Philip D. Dembowski
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Patent number: 6593251Abstract: The present invention concerns a method to produce a porous oxygen-silicon insulating layer comprising following steps: applying a silicon oxygen layer to a substrate exposing the said substrate to a HF ambient.Type: GrantFiled: July 9, 2001Date of Patent: July 15, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Mikhail Baklanov, Denis Shamiryan, Karen Maex, Serge Vanhaelemeersch
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Patent number: 6591284Abstract: The power consumption, memory allocation, and CPU time used in a signal processor executing a fast transform can be optimized by using a particular method of scheduling the calculations. The transform typically is used to transform a first m-dimensional indexed array into a second m-dimensional indexed array. The elements of the first m-dimensional array are grouped according to the index difference between the elements of the particular butterfly code of that stage. A second grouping of elements is composed of butterfly code elements having non-maximal index differences. The second group advantageously includes elements also assigned to the first group. The butterfly codes of the groups are arranged sequentially and are executed in the sequential schedule. In a second embodiment, elements are grouped according to a group specific threshold value. Memory is allocated to the groups according to the size of the group such that the access to memory is minimized during execution.Type: GrantFiled: July 10, 2000Date of Patent: July 8, 2003Assignee: Interuniversitair Microelektronica CentrumInventors: Erik Brockmeyer, Cedric Ghez, Francky Catthoor, Johan D'Eer
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Patent number: 6580120Abstract: A planar high-density EEPROM split gate memory structure, is formed using two poly-layers and chemical-mechanical-polishing processes. Stripes of contiguous poly lines, alternately formed in one of the two poly-layers, constitute the memory structure. Source and drain regions are formed self-aligned to the outer borders of this memory structure. Depending on the biasing scheme a poly line is used as the select gate of the memory cell while an adjacent poly line is used as program gate, so to have charge stored underneath this adjacent poly line using source-side-injection of charge carriers. The other poly lines are biased to form conductive channels between the select and program gate to the source and drain regions. These conductive channels form soft source and drain regions next to the select and program gate in use.Type: GrantFiled: May 28, 2002Date of Patent: June 17, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC VZW)Inventor: Luc Haspeslagh
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Patent number: 6568408Abstract: A method and an apparatus for removing a liquid, i.e a wet processing liquid, from a surface of at least one substrate is disclosed. A liquid is supplied on a surface of substrate. Simultaneously or thereafter besides the liquid also a gaseous substance can be supplied thereby creating at least locally a sharply defined liquid-vapor boundary. The gaseous substance and the liquid can be selected such that the gaseous substance is miscible with the liquid and when mixed with the liquid yields a mixture having a surface tension lower than that of the liquid. According to the invention, the substrate is subjected to a rotary movement at a speed to guide said liquid-vapor boundary over said substrate thereby removing said liquid from said substrate.Type: GrantFiled: March 13, 2002Date of Patent: May 27, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC, vzw)Inventors: Paul Mertens, Mark Meuris, Marc Heyns
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Patent number: 6555414Abstract: The present invention is related to a flip-chip-on-board (FCOB) assembly technology applicable for mounting large chips with high I/O count or small pitch, mounted on low-cost or low-grade substrates. The assembly technology uses both an isotropically conductive adhesive (ICA) and a non-conductive material (NCA) in the same assembly cycle. The thermocompression step establishes at the same time the electrical and mechanical interconnections and the curing of the adhesives.Type: GrantFiled: February 9, 2001Date of Patent: April 29, 2003Assignee: Interuniversitair Microelektronica Centrum, vzwInventors: Jan Vanfleteren, Sergei Stoukach, Bjorn Vandecasteele
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Patent number: 6551409Abstract: A method for removing organic contaminants from a semiconductor surface whereby the semiconductor is held in a tank and the tank is filled with a fluid such as a liquid or a gas. Organic contaminants, such as photoresist, photoresidue, and dry etched residue, occur in process steps of semiconductor fabrication and at times, require removal. The organic contaminants are removed from the semiconductor surface by holding the semiconductor inside a tank. The method is practiced using gas phase processing. The tank is filled with a gas mixture, comprising water vapor and ozone.Type: GrantFiled: September 18, 1998Date of Patent: April 22, 2003Assignees: Interuniversitair Microelektronica Centrum, vzw, Nederlandse Philips Bedrijven B.V.Inventors: Stefan DeGendt, Dirk Knotter, Marc Heyns, Marc Meuris, Paul Mertens
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Patent number: 6548327Abstract: The present invention is related to a method for electroless plating Nickel/Gold on aluminium bonding pads of single chips or wafer parts. This method result in uniformly plated singulated chips, single dice or wafer parts in a much more simple and cost-effective way. The proposed method comprises the steps of attaching to die or wafer part to a non-conductive adhesive or substrate.Type: GrantFiled: April 24, 2001Date of Patent: April 15, 2003Assignees: Interuniversitair Microelektronica Centrum, vzw, Universiteit GentInventors: Herbert De Pauw, Jan Vanfleteren, Suixin Zhang
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Patent number: 6530385Abstract: An apparatus for wet cleaning or etching of flat substrates comprising a tank with an inlet opening and outlet opening for said substrates. Said tank contains a cleaning liquid and is installed in a gaseous environment. At least one of the openings is a slice in a sidewall of the tank and is present below the liquid-surface. In the tank there may be a portion above the liquid filled with a gas with a pressure being lower than the pressure within said environment. The method comprises the step of transferring a substrate through the cleaning or etching liquid at a level underneath the surface of said liquid making use of said apparatus.Type: GrantFiled: December 29, 2000Date of Patent: March 11, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Marc Meuris, Paul Mertens, Marc Heyns
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Patent number: 6531852Abstract: The present invention is related to a high voltage generating device comprising a high voltage generating component having as input a voltage signal constructed at least by comparing a reference current and a feedback current, said feedback current being related to the output voltage generated by said high voltage generating component.Type: GrantFiled: September 21, 2001Date of Patent: March 11, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventor: Jan Doutreloigne
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Patent number: 6521109Abstract: A device for detecting an analyte in a sample comprising an active layer comprising at least a dielectric material, a source electrode, a drain electrode and a semiconducting substrate which acts as current pathway between source and drain. The conductivity of said semiconducting layer can be influenced by the interaction of the active layer with the sample containing the analyte to detect. The device is fabricated such that properties like low price, disposability, reduced drift of the device and suitability for biomedical and pharmaceutical applications are obtained. To fulfill these requirements, the device described in this application will be based on organic-containing materials.Type: GrantFiled: September 13, 2000Date of Patent: February 18, 2003Assignee: Interuniversitair Microelektronica Centrum (IMEC) vzwInventors: Carmen Bartic, Jef Poortmans, Kris Baert
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Publication number: 20020148483Abstract: A method and an apparatus for removing a liquid, i.e. a wet processing liquid, from at least one surface of at least one substrate is disclosed. A liquid is supplied on a surface of substrate. Simultaneously or thereafter the liquid or the substrate is locally heated to thereby reduce the surface tension of said liquid. By doing so, at least locally a sharply defined liquid-ambient boundary is created. According to the invention, the substrate is subjected to a rotary movement at a speed to guide said liquid-ambient boundary over the surface of the substrate thereby removing said liquid from said surface.Type: ApplicationFiled: November 1, 2001Publication date: October 17, 2002Applicant: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Paul Mertens, Marc Meuris, Marc Heyns
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Patent number: 6398975Abstract: A method and apparatus for dispensing a liquid on the surface of a localized zone of a substrate, for example for cleaning of etching purposes. Along with the liquid, a gaseous tensio-active substance is supplied, which is miscible with said liquid and when mixed with the liquid, reduces the surface tension of said liquid, thus containing the liquid in a local zone of the substrate surface.Type: GrantFiled: April 20, 2000Date of Patent: June 4, 2002Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Paul Mertens, Marc Meuris, Marc Heyns
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Patent number: 6391785Abstract: Methods are disclosed for selective deposition on desired materials. In particular, barrier materials are selectively formed on insulating surfaces, as compared to conductive surfaces. In the context of contact formation and trench fill, particularly damascene and dual damascene metallization, the method advantageously lines insulating surfaces with a barrier material. The selective formation allows the deposition to be “bottomless,” thus leaving the conductive material at a via bottom exposed for direct metal-to-metal contact when further conductive material is deposited into the opening after barrier formation on the insulating surfaces. Desirably, the selective deposition is accomplished by atomic layer deposition (ALD), resulting in highly conformal coverage of the insulating sidewalls in the opening.Type: GrantFiled: August 23, 2000Date of Patent: May 21, 2002Assignees: Interuniversitair Microelektronica Centrum (IMEC), ASM Microchemistry OYInventors: Alessandra Satta, Karen Maex, Kai-Erik Elers, Ville Antero Saanila, Pekka Juha Soininen, Suvi P. Haukka
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Patent number: 6380039Abstract: A scaleable device concept and particularly a method for fabrication thereof is disclosed, which allows for a minimal well-controlled gate overlap by using low resistivity source/drain extension regions with shallow junctions. By using such shallow junctions, which are obtained using L-shaped spacers, the gate overlap is no longer dependent on the junction depth of the source/drain contact regions. Particularly the L-shaped spacers are used to locally reduce the penetration depth of the source/drain implantation in the substrate. This concept is particularly interesting for FET's having a channel length below 0.25 &mgr;m because this approach broadens the process window of the silicidation process of the source/drain contact regions. Moreover, the extension regions have to be subjected only to a limited thermal budget.Type: GrantFiled: April 1, 1999Date of Patent: April 30, 2002Assignee: Interuniversitair Microelektronica Centrum (IMEC VZW)Inventors: Goncal Badenes, Ludo Deferm, Stephan Beckx, Serge Vanhaelemeersch
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Patent number: RE37512Abstract: Method of preparing on a solar cell the top contact pattern which consists of a set of parallel narrow finger lines and wide collector lines deposited essentially at right angles to the finger lines on the semiconductor substrate, characterized in that it comprises at least the following steps: (a) screen printing and drying the set of contact finger lines; (b) printing and drying the wide collector lines on the top of the set of finger lines in a subsequent step; (c) firing both finger lines and collector lines in a single final step in order to form an ohmic contact between the finger lines and the semiconductor substrate and between the finger lines and the wide collector lines.Type: GrantFiled: March 10, 2000Date of Patent: January 15, 2002Assignee: Interuniversitair Microelektronica Centrum (IMEC) VZWInventors: Jozef Szlufcik, Johan Nijs, Roland Jozef Fick