Abstract: A signal processing device adapted for simultaneous processing of at least two process threads in a multi-processing manner is disclosed. In one embodiment, the device comprises a plurality of functional units capable of executing word- or subword-level operations on data. The device further comprises means for interconnecting the plurality of functional units, the means for interconnecting supporting a plurality of dynamically switchable interconnect arrangements, and at least one of the interconnect arrangements interconnects the plurality of functional units into at least two non-overlapping processing units each with a pre-determined topology. The device further comprises at least two control modules each assigned to one of the processing units.

Abstract: A non-destructive and simple analytical method is provided which allows in situ monitoring of plasma damage during the plasma processing such as resist stripping. If a low-k film is damaged during plasma processing, one of the reaction products is water, which is remained adsorbed onto the low-k film (into pores), if the temperature is lower than 100-150 C. A plasma (e.g. He) that emits high energy EUV photons (E>20 eV) which is able to destruct water molecules forming electronically excited oxygen atoms is used to detect the adsorbed water. The excited oxygen is detected from optical emission at 777 nm. Therefore, the higher the adsorbed water concentration (higher damage), a more intensive (oxygen) signal is detected. Therefore, intensity of oxygen signal is a measure of plasma damage in the previous strip step.

Abstract: The present invention discloses an analogue-to-digital converter comprising at least two voltage comparator devices. Each of the voltage comparator devices comprises a differential structure of transistors and is arranged for being fed with a same input signal and for generating an own internal voltage reference by means of an imbalance in the differential structure, said two internal voltage references being different. Each voltage comparator is arranged for generating an output signal indicative of a bit position of a digital approximation of the input signal.

Abstract: One inventive aspect is related to an atomic force microscopy probe. The probe comprises a tip configuration with two probe tips on one cantilever arm. The probe tips are electrically isolated from each other and of approximately the same height with respect to the cantilever arm. The outer surface of the tip configuration has the shape of a body with a base plane and an apex. The body is divided into two sub-parts by a gap located approximately symmetrically with respect to the apex and approximately perpendicular to the base plane. Another inventive aspect related to methods for producing such an AFM probe.

Abstract: A new MOSFET device is described comprising a metal gate electrode, a gate dielectric and an interfacial layer. The interfacial layer comprises a lanthanum hafnium oxide material for modulating the effective work function of the metal gate. The gate dielectric material in contact with the interfacial layer is different that the interfacial layer material. A method for its manufacture is also provided and its applications.

Abstract: A method is disclosed for relaxing strain in a multi-gate device, the method comprising providing a substrate with a strained material, patterning a plurality of fins in the strained material, defining a first region comprising at least one fin, defining a second region comprising at least one fin, providing a diffusion barrier layer on the first region, performing a hydrogen anneal such that the strain in the second region is relaxed.

Abstract: A method for manufacturing a MOSFET device with a fully silicided (FUSI) gate is described. This method may be used to prevent formation of shorts between the FUSI gate and a contact to a source and/or a drain region. In particular, the method discloses the formation of an expansion volume above a gate dielectric. The volume is designed to substantially contain the fully silicided gate.

Abstract: A method of making at least one marker (MX) for double gate SOI processing on a SOI wafer is disclosed. The marker has a diffracting structure in a first direction and the diffracting structure is configured to generate an asymmetrical diffraction pattern during use in an alignment and overlay detection system for detection in the first direction.

Abstract: Methods of producing a composite substrate and devices made by the methods are disclosed. One of the methods comprises providing a flexible sacrificial layer, producing one or more patterned conducting layers on the flexible sacrificial layer, bending the sacrificial layer into a predetermined shape, providing a stretchable and/or flexible material on top of and in between features of the one or more patterned layers.

Abstract: A method is provided for modifying a poly(arylene vinylene) or poly(heteroarylene vinylene) precursor polymer having dithiocarbamate moieties by reacting it with an acid and further optionally reacting the acid-modified polymer with a nucleophillic agent. Also provided are novel polymers and copolymers bearing nucleophillic side groups which are useful as components of electronic devices, e.g. in the form of thin layers.

Abstract: A method is provided for modifying a poly(arylene vinylene) or poly(heteroarylene vinylene) precursor polymer having dithiocarbamate moieties by reacting it with an acid and further optionally reacting the acid-modified polymer with a nucleophilic agent. Also provided are novel polymers and copolymers bearing nucleophilic side groups which are useful as components of electronic devices, e.g. in the form of thin layers.

Abstract: A method for determining an estimate of statistical properties of an electronic system comprising individual components subject to manufacturing process variability is disclosed. In one aspect, the method comprises obtaining statistical properties of the performance of individual components of the electronic system, obtaining information about execution of an application on the system, simulating execution of the application based on the obtained information about execution of the application on the system for a simulated electronic system realization constructed by selecting individual components with the obtained statistical properties determining the delay and energy of the electronic system, and determining the statistical properties of the delay and energy of the electronic system.

Abstract: In one aspect of the invention, a method or apparatus is described for determining concentration(s) of one or more analytes in a sample using plasmonic excitations. In another aspect, a method relates to designing systems for such concentration determination, wherein metallic nanostructures are used in combination with local electrical detection of such plasmon resonances via a semiconducting photodetector. In certain aspects, the method exploits the coupling of said metallic nanostructure(s) to a semiconducting photodetector, said detector being placed in the “metallic structure's” near field. Surface plasmon excitation can be transduced efficiently into an electrical signal through absorption of light that is evanescently coupled or scattered in a semiconductor volume. This local detection technique allows the construction of sensitive nanoscale bioprobes and arrays thereof.

Abstract: The present disclosure relates to a method for calibrating transient behaviour of an electrostatic discharge (ESD) test system. The system includes an ESD pulse generator and probe needles for applying a predetermined pulse on a device under test. The probe needles are connected to the ESD pulse generator via conductors. The test system includes measurement equipment for detecting transient behaviour of the device under test by simultaneously capturing voltage and current waveforms the device as a result of the pulse. The method comprises the steps of: (a) applying the ESD test system on a first known system with a first known impedance, (b) applying the ESD test system on a second known system with a known second impedance, and (c) determining calibration data for the transient behaviour the ESD test system on the basis of captured voltage and current waveforms, taking into account said known first and second impedances.

Abstract: A method for forming a semiconductor device on a substrate having a first major surface lying in a plane and the semiconductor device are disclosed. In one aspect, the method comprises, after patterning the substrate to form at least one structure extending from the substrate in a direction substantially perpendicular to a major surface of the substrate, forming locally modified regions at locations in the substrate not covered by the structure, thus locally increasing etching resistance of these regions. Forming locally modified regions may prevent under-etching of the structure during further process steps in the formation of the semiconductor device.

Abstract: A method of determining the behavior of an electronic system comprising electronic components under variability is disclosed. In one aspect, the method comprises for at least one parameter of at least one of the electronic components, showing variability defining a range and a population of possible values within the range, each possible value having a probability of occurrence, thereby defining an input domain. The method further comprises selecting inputs randomly from the input domain, wherein the probability to sample (PTS) is obtained from the probability of occurrence (PTOIR). The method further comprises performing simulation to obtain the performance parameters of the electronic system, thereby defining an output domain sample.

Abstract: The current invention provides a stepping actuator, achieving large range up to ±35 ?m with low operating voltages of 15V or lower and large output forces of up to ±110 ?N. The actuator has an in-plane-angular deflection conversion which allows achieving step sizes varying from few nanometers to few micrometers with a minor change in the design. According to certain embodiments of the invention, the stepping actuator comprises a geometrical structure with a displacement magnification ratio of between 0.15 and 2 at operating voltages of 15V or lower. The present invention also provides a method for forming such stepping actuators.

Abstract: A dual workfunction semiconductor device which comprises a first and second control electrode comprising a metal-semiconductor compound, e.g. a silicide or a germanide, and a dual workfunction semiconductor device thus obtained are disclosed. In one aspect, the method comprises forming a blocking region for preventing diffusion of metal from the metal-semiconductor compound of the first control electrode to the metal-semiconductor compound of the second control electrode, the blocking region being formed at a location where an interface between the first and second control electrodes is to be formed or is formed. By preventing metal to diffuse from the one to the other control electrode the constitution of the metal-semiconductor compounds of the first and second control electrodes may remain substantially unchanged during e.g. thermal steps in further processing of the device.

Abstract: The invention relates to a voltage controlled oscillator for generating a variable frequency. The oscillator comprises an oscillator core and a transconductive portion for compensating current losses in the oscillator core. The oscillator core comprises an inductive portion with at least one inductive element and a capacitive portion whose capacitance can be continuously varied by means of a control voltage for varying said frequency. The capacitive portion comprises multiple variable capacitive elements whose capacitance is continuously variable by means of said control voltage, each variable capacitive element being switchable for being added to or removed from the capacitive portion.

Abstract: The present disclosure relates to a system comprising at least a first and a second essentially analogue portion and an essentially digital portion, the analogue portions forming a part of a unidirectional circular network. First communication means is provided between the digital portion and the first analogue portion. Second communication means is provided between the first and second analogue portions. The first and second communication means are configurable for establishing communication between the digital portion and the second analogue portion. The first and second communication means are arranged to determine if a packet communicated over the first or second communication means is of interest for any of the analogue portions.