Patents Assigned to KAISHA TOSHIBA
-
Patent number: 8527717Abstract: A content data storage device which stores content data which includes a wide-band content and a narrow-band content includes a buffer memory temporarily storing the content data to be externally input, a storage unit including a plurality of nonvolatile memories configured to be written for each page and storing in turn the content data to be output from the buffer memory, and a controller controlling an output from the buffer memory so as to output content data of one page to the storage unit when the content data of not less than one page is stored in the buffer memory, wherein the controller adds dummy data to the narrow-band content as the content data of one page, if the narrow-band content stored in the buffer memory reaches the prescribed capacity.Type: GrantFiled: February 1, 2008Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Toshiaki Aoki
-
Patent number: 8526148Abstract: A semiconductor device includes a first interconnect connected to a high voltage side power supply voltage, a second interconnect connected to the high voltage side power supply voltage, a switching transistor, and a protective element connected in parallel with the switching transistor between the high voltage side power supply voltage and a low voltage side power supply voltage. A first end of the switching transistor is connected to the first interconnect, and a second end is connected to an output terminal. The protective element includes a first p-type semiconductor region connected to the first interconnect, an n-type semiconductor region in contact with the first p-type semiconductor region and connected to the second interconnect, and a second p-type semiconductor region in contact with the n-type semiconductor region, spaced from the first p-type semiconductor region, and connected to the low voltage side power supply voltage.Type: GrantFiled: September 1, 2011Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Takehito Ikimura
-
Patent number: 8525202Abstract: According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are apart from each other. The LED chip is provided above the first and second lead frames, and the LED chip has one terminal connected to the first lead frame and another terminal connected to the second lead frame. In addition, the resin body covers the first and second lead frames and the LED chip, and has an upper surface with a surface roughness of 0.15 ?m or higher and a side surface with a surface roughness higher than the surface roughness of the upper surface.Type: GrantFiled: August 3, 2010Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Gen Watari, Satoshi Shimizu, Mami Yamamoto, Hidenori Egoshi, Hiroaki Oshio, Tatsuo Tonedachi, Kazuhisa Iwashita, Tetsuro Komatsu, Teruo Takeuchi
-
Patent number: 8525823Abstract: According to one embodiment, an image display device has a liquid crystal panel, a backlight, an intensity setting unit, a presumption unit, a signal correction unit, an error calculation unit and a control unit. The intensity setting unit sets intensities of the light sources, respectively. The presumption unit presumes color information based on intensity information representing the intensities. The signal correction unit corrects an input video signal according to the color information, and obtains a corrected video signal. The error calculation unit presumes a display image from the corrected video signal and the input video signal, and calculates display errors between the presumed display image and an input image corresponding to the input video signal. The control unit controls sets the intensities of the light sources as the emission intensities of the backlight so that the display errors obtained from the error calculation unit can be minimum.Type: GrantFiled: September 19, 2011Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Yuma Sano, Ryosuke Nonaka, Masahiro Baba
-
Patent number: 8525399Abstract: According to the embodiment, an electron emission element includes a conductive substrate, a first diamond layer of a first conductivity type formed on the conductive substrate, and a second diamond layer of the first conductivity type formed on the first diamond layer. Thereby, it becomes possible to provide the electron emission element having a high electron emission amount and a high current density even in a low electric field at low temperature and the electron emission apparatus using this electron emission element.Type: GrantFiled: September 23, 2010Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Mariko Suzuki, Tadashi Sakai, Naoshi Sakuma, Masayuki Katagiri, Yuichi Yamazaki
-
Patent number: 8527914Abstract: A flare map calculating method of an embodiment calculates an optical image intensity distribution in each division region set in a pattern region. Furthermore, an average value of the optical image intensity distribution is calculated in each division region. A pattern or plural patterns, which has a pattern density corresponding to the average value, is calculated as a corresponding density pattern in each division region. Furthermore, a density map, which represents a pattern density distribution within the pattern region, is generated based on the corresponding density pattern, and a flare map representing a flare intensity distribution within the pattern region is calculated by convolution integral of the density map and a point spread function.Type: GrantFiled: September 14, 2012Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Taiga Uno, Toshiya Kotani, Satoshi Tanaka
-
Patent number: 8525715Abstract: There is provided with an A/D conversion apparatus which the first terminal receives a reference voltage signal, the single-ended to differential converter conducts single-ended to differential conversion on the reference voltage signal to obtain a first differential signal, the A/D converter conducts A/D conversion on the first differential signal based on the reference voltage signal to obtain a first digital signal, the digital circuit detects a DC offset which is a difference between the first digital signal and a digital signal, the second terminal receives an input signal, the single-ended to differential converter conducts single-ended to differential conversion on the input signal to acquire a second differential signal, the A/D converter conducts A/D conversion on the second differential signal based on the reference voltage signal to acquire a second digital signal, and the digital circuit subtracts the DC offset from the second digital signal to obtain a third digital signal.Type: GrantFiled: June 18, 2012Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Taichi Ogawa, Masanori Furuta
-
Patent number: 8525252Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a semiconductor region, a tunnel insulator provided above the semiconductor region, a charge storage insulator provided above the tunnel insulator, a block insulator provided above the charge storage insulator, a control gate electrode provided above the block insulator, and an interface region including a metal element, the interface region being provided at one interface selected from between the semiconductor region and the tunnel insulator, the tunnel insulator and the charge storage insulator, the charge storage insulator and the block insulator, and the block insulator and the control gate electrode.Type: GrantFiled: September 15, 2011Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Kenichiro Toratani, Masayuki Tanaka, Kazuhiro Matsuo
-
Patent number: 8526785Abstract: With this invention, at least one of a video file containing video information, a still picture file containing still picture information, and an audio file containing audio information and a management file having management information on a control method of reproducing the information in the file are recorded on an information storage medium. This realizes a data structure that causes the recording and deleting places on the information storage medium to correspond spuriously to places on a single tape, such as a VTR tape. Use of the data structure provides users with an easy-to-use interface.Type: GrantFiled: July 16, 2009Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hideo Ando, Hiroaki Unno
-
Patent number: 8525046Abstract: According to one embodiment, an electronic apparatus includes a housing having electric insulation properties, and a circuit element installed in the housing and including a plurality of connection terminals, wherein the housing includes an inner surface including a mounting region on which the circuit element is mounted, a plurality of adhesive filled portions in the mounting region, which are separated by a division wall in order to correspond to the connection terminals of the circuit element, and through which the connection terminals are inserted, and a plurality of traces provided on the inner surface of the housing, one ends of the traces running through the adhesive filled portions, wherein the adhesive filled portions of the housing are filled with conductive adhesive which fix the circuit element to the mounting region, and wherein the connection terminals are electrically connected to the traces by the conductive adhesive.Type: GrantFiled: December 6, 2010Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Takahiro Sugai
-
Patent number: 8526212Abstract: A semiconductor memory device comprising: a memory cell array in which memory cells each containing a variable resistive element and a rectifier element connected in series are arranged at intersections of a plurality of first wirings and a plurality of second wirings; and a control circuit for selectively driving said first wirings and said second wirings; wherein said control circuit applies a first voltage to said selected first wiring, and changes said first voltage based on the position of said selected memory cell within said memory cell array to apply a second voltage to said selected second wiring, so that a predetermined potential difference is applied to a selected memory cell arranged at the intersection between said selected first wiring and said selected second wiring.Type: GrantFiled: May 22, 2012Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Hiroshi Maejima
-
Patent number: 8526339Abstract: An echo cancellation circuit in a full duplex two-way communication system comprising: an input/output terminal; a subtractor having a positive and a negative input terminals, in which a first transmission signal is inputted to the negative input terminal as a pseudo echo signal, the first transmission signal is inputted through an output buffer to the positive input terminal as an echo signal, the pseudo echo signal inputted to the negative input terminal is subtracted from the echo signal inputted to the positive input terminal; and a result of the subtraction is outputted; and an echo cancellation error reducing unit having a D/A converter at an input side or an output side of the subtractor.Type: GrantFiled: March 9, 2011Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Shinji Nakatsuka, Kazuhiro Oda
-
Patent number: 8526789Abstract: With this invention, at least one of a video file containing video information, a still picture file containing still picture information, and an audio file containing audio information and a management file having management information on a control method of reproducing the information in the file are recorded on an information storage medium. This realizes a data structure that causes the recording and deleting places on the information storage medium to correspond spuriously to places on a single tape, such as a VTR tape. Use of the data structure provides users with an easy-to-use interface.Type: GrantFiled: July 21, 2009Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hideo Ando, Hiroaki Unno
-
Patent number: 8526696Abstract: Based on medical image data acquired in each time phase included in a one-cycle interval, first tracking part tracks the position of a first region of interest set in a first time phase in each time phase and tracks the position of a second region of interest set in a second time phase in each time phase. Based on position information of the first region of interest and the second region of interest in each time phase, position correction part obtains position information of a region of interest in each time phase so that it passes through the position of the first region of interest in the first time phase and the position of the second region of interest in the second time phase. Motion-information calculator obtains motion information of a tissue based on the obtained position information.Type: GrantFiled: January 26, 2010Date of Patent: September 3, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems CorporationInventors: Yasuhiko Abe, Tetsuya Kawagishi
-
Patent number: 8526838Abstract: According to one embodiment, an image forming apparatus includes a document sensor to detect a width of a document stacked on an automatic document feeder (ADF), a sheet sensor to detect a width of a sheet stacked on a manual feed tray, memory to store, correspondingly to sheets of various sizes, print patterns based on which an entire area of a document image can be printed according to a document size, a controller which receives detection information from the sensors as input information, selects print patterns from the memory based on the input information, and displays the selected print patterns on a monitor, and a selector by which a user selects, from the print patterns displayed on the monitor, one pattern based on which a document image is printed on a sheet stacked on the ADF or the manual feed tray.Type: GrantFiled: February 2, 2010Date of Patent: September 3, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki KaishaInventor: Mitsuhiko Otaki
-
Patent number: 8525182Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; a source electrode and a drain electrode provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source electrode and the drain electrode above the gate electrode.Type: GrantFiled: February 3, 2012Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
-
Patent number: 8526038Abstract: The present invention provides a technique capable of preventing, in a system that transmits a print job from a network terminal to a printing apparatus through a print job managing server, useless consumption of a storage area of the printing apparatus and an unnecessary increase in traffic in a network. A print job managing server includes: a transmission-destination-information acquiring unit configured to acquire job transmission destination information for specifying at least one printing apparatus that is a job transmission destination associated in advance with information concerning a transmission source of a print job; and a job transmitting unit configured to transmit the print job to the printing apparatus, which is the job transmission destination, on the basis of the acquired job transmission destination information.Type: GrantFiled: January 25, 2010Date of Patent: September 3, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki KaishaInventors: Toshihiro Ida, Kazuhiro Ogura, Shinji Makishima, Akihiro Mizutani, Yusuke Hamada
-
Patent number: 8525195Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, a light emitting portion, a multilayered structural body, and an n-side intermediate layer. The light emitting portion is provided between the semiconductor layers. The light emitting portion includes barrier layers containing GaN, and a well layer provided between the barrier layers. The well layer contains Inx1Ga1-x1N. The body is provided between the n-type semiconductor layer and the light emitting portion. The body includes: first layers containing GaN, and a second layer provided between the first layers. The second layer contains Inx2Ga1-x2N. Second In composition ratio x2 is not less than 0.6 times of first In composition ratio x1 and is lower than the first In composition x1. The intermediate layer is provided between the body and the light emitting portion and includes a third layer containing Aly1Ga1-y1N (0<y1?0.01).Type: GrantFiled: September 1, 2010Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8526076Abstract: An illumination apparatus includes a light source that generates light used for reading an image and a light guide body which extends in a predetermined direction and onto which the light from the light source is incident. The light guide body includes a pair of first faces that reflect the light so as to cause the light to direct to an image reading region from directions different from one another, a second face which emits the light directing from the first faces toward the image reading region and onto which the light reflected from the image reading region is incident, and a third face which emits the light that is incident from the second face and passes between the pair of first faces.Type: GrantFiled: March 10, 2011Date of Patent: September 3, 2013Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki KaishaInventor: Sasuke Endoh
-
Patent number: 8527730Abstract: A data updating method, a memory system and a memory device in which the memory device is connectable to a host device and has a memory section and a memory controller, the memory section consists of a first memory section which can be divided into partitions having multiple different attributes, and a work space which is managed by the memory controller, and the method of updating data which is stored in the memory device uses one of the writing methods which has been selected from among multiple different writing methods of writing data into the partition, depending on the attribute of the partition, to perform an updating process, and can securely update the data.Type: GrantFiled: September 9, 2008Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Akihisa Fujimoto