Patents Assigned to KAISHA TOSHIBA
  • Publication number: 20130220224
    Abstract: According to one embodiment, in a method for manufacturing a semiconductor device, a surface region of a semiconductor substrate is modified into an amorphous layer. A microwave is irradiated to the semiconductor substrate in which the amorphous layer is formed in a dopant-containing gas atmosphere so as to form a diffusion layer in the semiconductor substrate. The dopant is diffused into the amorphous layer and is activated.
    Type: Application
    Filed: March 15, 2013
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kabushiki Kaisha Toshiba
  • Publication number: 20130221196
    Abstract: According to one embodiment, an image sensor includes an image-sensing element region formed by arranging a plurality of image-sensing elements on a semiconductor substrate and element isolation portions formed to isolate the image-sensing elements, and a logic circuit region formed in a region different from the image-sensing element region on the substrate and including a plurality of gate patterns. Further, dummy element isolation portions are arranged with a constant pitch in the boundary region between the image-sensing element region and the logic circuit region.
    Type: Application
    Filed: January 9, 2013
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kabushiki Kaisha Toshiba
  • Publication number: 20130222625
    Abstract: According to one embodiment, a high dynamic range synthesizing circuit includes an interpolation processing unit. The interpolation processing unit generates an interpolated signal for a first pixel, which is set as a target pixel, through an interpolation process using a second image signal from a second pixel which is a peripheral pixel. The interpolation processing unit generates an interpolated signal for the second pixel, which is set as a target pixel, through an interpolation process using the first image signal from the first pixel which is a peripheral pixel.
    Type: Application
    Filed: February 5, 2013
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kabushiki Kaisha Toshiba
  • Publication number: 20130221474
    Abstract: According to one embodiment, an image sensor includes an image-sensing element region formed by arranging a plurality of image-sensing elements on a semiconductor substrate, and a logic circuit region formed in a region different from the image-sensing element region on the substrate and including a plurality of gate patterns. Further, dummy gate patterns are formed with a constant pitch on the image-sensing element region.
    Type: Application
    Filed: January 9, 2013
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kabushiki Kaisha Toshiba
  • Publication number: 20130223130
    Abstract: A semiconductor memory device includes a cell array having a plurality of first wirings and a plurality of second wirings intersecting each other and memory cells disposed at intersections between the plurality of first wirings and the plurality of second wirings. The semiconductor memory device further includes a control circuit for selectively driving the plurality of first wirings and the plurality of second wirings. The control circuit applies a first voltage for a first operation to a first select wiring and applies a second voltage for a second operation different from the first operation to a second select wiring and applies a third voltage for the first and second operation to a third select wiring. The first operation is completed before the second operation is completed. The control circuit applies a fourth voltage for a third operation to a forth select wiring before the second operation is completed.
    Type: Application
    Filed: April 8, 2013
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kabushiki Kaisha Toshiba
  • Publication number: 20130223701
    Abstract: A medical image processing apparatus comprises a structure identifying part, an image generator, and a display controller. The structure identifying part identifies a tubular structure inside a subject and a core line in the axial direction of the tubular structure based on medical image data. The image generator generates medical images when viewing a predetermined observation object from a desired view point position inside the tubular structure. The display controller causes the display to display medical images. Furthermore, at each timing, the image generator identifies view point position at which the relative distance between the position of the observation object and the view point position becomes even among each of the timings, and generates a medical image from the view point position for each timing. Moreover, the display controller causes the display to display a plurality of the medical images generated for each of the timings in chronological order.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 29, 2013
    Applicants: Toshiba Medical Systems Corporation, Kabushiki Kaisha Toshiba
    Inventors: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
  • Publication number: 20130227246
    Abstract: A management information generating method wherein logical and physical block addresses (BAs) of continuous addresses are associated with each other in the BA translation table. When a logical block is constructed, an allowable value is set for the number of defective physical blocks. A logical block having fewer defects than the set number is set usable, and a logical block having more defects than the set number is set unusable. System logical block construction is performed to preferentially select physical blocks from a plane list including a large number of usable blocks to equalize the number of usable blocks in each plane list. It is determined whether the number of free blocks is insufficient on the basis of a first management unit and whether the storage area for the indicated capacity can be reserved on the basis of the management unit different from the first unit.
    Type: Application
    Filed: September 11, 2012
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takashi HIRAO, Hirokuni YANO, Aurelien Nam Phong TRAN, Mitsunori TADOKORO, Hiroki MATSUDAIRA, Tatsuya SUMIYOSHI, Yoshimi NIISATO, Kenji TANAKA
  • Publication number: 20130222196
    Abstract: According to one embodiment, a wireless device includes a circuit board, a semiconductor chip, a sealing resin, a conductive film, and an antenna element. The semiconductor chip includes a transmitting/receiving circuit and is mounted on the circuit board. The sealing resin seals the semiconductor chip. The conductive film covers a first surface portion of the sealing resin. An aperture is formed in a portion of the conductive film that corresponds to a second surface portion of the sealing resin other than the first surface portion, and the second surface portion is included in a side surface of the sealing resin and closest to an antenna terminal connected to the antenna element.
    Type: Application
    Filed: September 5, 2012
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha TOSHIBA
    Inventors: Koh HASHIMOTO, Yukako Tsutsumi, Takayoshi Ito, Koji Akita, Keiju Yamada
  • Publication number: 20130227173
    Abstract: According to one embodiment, an information notification apparatus includes a table and a notifier. The table is configured to store information about root nodes and information related to the nodes. The notifier is configured to generate, when a communication node is a root node, new information for that root node. The notifier is further configured to read out, when the communication node is not a root node, the information from the table. The notifier is further configured to notify the communication node of the new information or the information read out from the table.
    Type: Application
    Filed: December 21, 2012
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuyuki TANAKA, Mitsuru KANDA
  • Publication number: 20130221378
    Abstract: An LED manufacturing method includes the steps of forming a first insulator film on a semiconductor layer, forming a laminated body including a mask layer and an electrode on the first insulator film, forming a second insulator film to cover the laminated body and a first region of the first insulator film where a laminated body is not formed, anisotropic etching the second insulator film to expose the top surface of the mask layer and a second region of the first insulator film, exposing the surface of a semiconductor layer by removing the first insulator film while keeping the first insulator film between the laminated body and the semiconductor layer, removing the mask layer, and forming a clear conducting layer on top of the exposed surface of the semiconductor layer and the electrode.
    Type: Application
    Filed: September 6, 2012
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tokuhiko MATSUNAGA, Katsufumi Kondo
  • Publication number: 20130223173
    Abstract: According to one embodiment, a semiconductor memory device includes a memory cell array including blocks, each block being capable of executing a write, read, or erase operation independently of other blocks. A control portion is configured to execute the operation of a first block among the blocks in a first cycle, set a selection inhibited region within a range of a predetermined distance from the first block, until a temperature relaxation time for relaxing a temperature of the first block has elapsed, set a region except the selection inhibited region among the blocks as a second block, and execute the operation of the second block in a second cycle.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kabushiki Kaisha Toshiba
  • Publication number: 20130221234
    Abstract: According to one embodiment, there is provided a laser ion source. The laser ion source includes a vacuum chamber which is vacuum-exhausted and in which a target is transported and set, a valve which is opened when the target is transported into the vacuum chamber and is closed except for the transportation, a target supply chamber which holds the target to be movable, and a transportation unit which transports to the vacuum chamber the target held on the target supply chamber while opening the valve after the target supply chamber is vacuum-exhausted while closing the valve.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: KABUSHIKI KAISHA TOSHIBA
  • Publication number: 20130227372
    Abstract: According to one embodiment, an encoding apparatus includes an encoding unit. The encoding unit encodes a data bit sequence to generate a codeword corresponding to a parity check matrix. The parity check matrix is based on a protograph. In the protograph, each of n check nodes of a first type is connected to n variable nodes of a first type by a total of at least one edge of a first type, and to n variable nodes of a second type by a total of at least two edges of a second type. In the protograph, each of n check nodes of a second type is connected to the n variable nodes of the second type by a total of r edges of a third type, and to n variable nodes of a third type by a total of g edges of a fourth type.
    Type: Application
    Filed: December 26, 2012
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hironori UCHIKAWA
  • Publication number: 20130224641
    Abstract: A nonmagnetic single-component developer uses an external additive which contains ? percent by weight of wet silica having an average particle size of 80-150 nm and ? percent by weight of burning silica having an average particle size of 8-20 nm. ?/? is 2-5, and ?+? is 2-10 percent by weight. After a silica separation test is conducted, the residual ratio X is 50-95 percent by weight, the percentage of the ratio of the residual amount of the silica a/b is in the rage of (X2/(1+?/?)/100)/(X?X2/(1+?/?)/100)×100 to (X2/(1+?/?)/100×((1?X/100)+1))/(X?X2/(1+?/?)/100×((1?X/100)+1))×100.
    Type: Application
    Filed: February 1, 2013
    Publication date: August 29, 2013
    Applicants: TOSHIBA TEC KABUSHIKI KAISHA, KABUSHIKI KAISHA TOSHIBA
    Inventors: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
  • Publication number: 20130222410
    Abstract: According to one embodiment, an image display apparatus includes a data output unit, a first display device and a second display device. The data output unit is configured to output first data and second data. The first display device includes a first display unit. The second display device includes a second display unit. The data output unit is configured to implement at least one selected from a first output operation and a second output operation. The first output operation includes a first operation and a second operation. The first operation is configured to output the first data. The second operation is configured to output the second data after the first operation. The second output operation includes a third operation and a fourth operation. The third operation is configured to output the second data. The fourth operation is configured to output the first data after the third operation.
    Type: Application
    Filed: February 11, 2013
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: KABUSHIKI KAISHA TOSHIBA
  • Publication number: 20130222043
    Abstract: In the device, a pair of transistors includes first and second transistors connected in parallel between a power-supply-line and a power-supply or between a ground-line and a ground-potential. A third transistor is connected between the power-supply-line and the power-supply or between the ground-line and the ground-potential. First to third nodes are gate nodes of the first to third transistors. A first buffer outputs a first control-signal for controlling the first transistor. A second buffer is connected between the first node and the second and third nodes to receive the first control-signal and transmit a second control-signal for controlling the second and third transistors to the second and third nodes in parallel. When power-supplying starts, the second control signal drives the second and third transistors to the conductive-state after the first control-signal controls the first transistor to be driven in an intermediate-state between the conductive-state and a shutoff-state.
    Type: Application
    Filed: August 30, 2012
    Publication date: August 29, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Takahiro YAMASHITA
  • Publication number: 20130227157
    Abstract: According to one embodiment, a terminal apparatus includes a first processing unit, second processing unit, and determiner. The first processing unit is configured to execute message processing as an authentication client for network access authentication. The second processing unit is configured to execute message processing as an authentication relay between a network access authentication server and an authentication client in another terminal apparatus. The determiner is configured to choose one of the first processing unit and the second processing unit on how to process a message which is sent by the network access authentication server or the other terminal apparatus.
    Type: Application
    Filed: December 21, 2012
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yasuyuki TANAKA
  • Publication number: 20130222706
    Abstract: According to one embodiment, a television includes a first member and a second member. The second member is configured to be temporarily mounted at a first position of the first member, and to be moved from the first position to a second position and to be fixed to the first member at the second position.
    Type: Application
    Filed: December 6, 2012
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: KABUSHIKI KAISHA TOSHIBA
  • Publication number: 20130223703
    Abstract: The storage stores three-dimensional image data at a plurality of time points indicating the flexible site of a biological body. A reconstruction processor subjects the projection data to reconstruction processing to generate three-dimensional image data regarding the flexible site for each of a plurality of timing points. An extracting part extracts a plurality of construction sites constructing the flexible site from the image data. An analyzing part calculates positional information indicating the position of the first site in the plurality of construction sites extracted from the image data at the first timing point, and the position of the first site extracted from the image data at the second timing point. An image processor generates a plurality of medical images indicating temporal changes in the relative position of the second site in the plurality of construction sites to the first site based on the positional information.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 29, 2013
    Applicants: Toshiba Medical Systems Corporation, Kabushiki Kaisha Toshiba
    Inventors: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
  • Publication number: 20130222536
    Abstract: According to one embodiment, a 3D glasses apparatus for displaying a 3D image includes: a measurement module configured to measure a size of a user's head by using left and right legs of the 3D glasses apparatus when a user uses the 3D glasses apparatus; and a detection module configured to detect whether a measurement value measured by the measurement module is smaller than a reference value; and a controller configured to control a 3D image signal not to be displayed in accordance with the judgment result of the detection module.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 29, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kabushiki Kaisha Toshiba