Patents Assigned to KATHOLIEKE UNIVERSITEIT LEUVEN KU LEUVEN
  • Patent number: 10115961
    Abstract: The disclosure relates to a method for the fabrication of a thin-film solid-state battery with Ni(OH)2 electrode, battery cell, and battery. One example embodiment is a method for fabricating a thin-film solid-state battery cell on a substrate comprising a first current collector layer. The method includes depositing above the first current collector layer a first electrode layer. The first electrode layer is a nanoporous composite layer that includes a plurality of pores having pore walls. The first electrode layer includes a mixture of a dielectric material and an active electrode material. The method also includes depositing above the first electrode layer a porous dielectric layer. The method further includes depositing directly on the porous dielectric layer a second electrode layer. Depositing the second electrode layer includes depositing a porous Ni(OH)2 layer using an electrochemical deposition process.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: October 30, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D, Panasonic Corporation
    Inventors: Philippe Vereecken, Stanislaw Zankowski, Nathalie Hendrickx, Maarten Mees, Mitsuhiro Murata, Haruhiko Habuta
  • Patent number: 10094020
    Abstract: A method of producing a metal-organic framework (MOF) film on a substrate is disclosed, the method comprising providing a substrate having a main surface and forming on said main surface a MOF film using an organometallic compound precursor and at least one organic ligand, wherein each of said organometallic compound precursor and said at least one organic ligand is provided only in vapour phase.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: October 9, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Ivo Stassen, Rob Ameloot, Dirk De Vos, Philippe M. Vereecken
  • Publication number: 20180279958
    Abstract: Example embodiments relate to systems and methods for heart rate detection with motion artifact reduction. One embodiment includes an electronic system for heart rate detection. The electronic system includes a random sampling sensor module. The random sampling sensor module includes a first sensor circuit configured to provide nonuniform random samples below a Nyquist rate of a photoplethysmographic signal. The random sample sensor module also includes a second sensor circuit configured to provided nonuniform random samples below a Nyquist rate of a motion signal. The motion signal and the photoplethysmographic signals are sampled with an equivalent pattern. The electronic system also includes a heart rate detection module. The heart rate detection module is configured to calculate a heart rave value based on frequencies corresponding to peak powers of calculated power spectral density value sets corresponding to the photoplethysmographic signals in a frequency range of interest.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 4, 2018
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Venkata Rajesh Pamula, Marian Verhelst
  • Publication number: 20180279898
    Abstract: Disclosed is a system for estimating arterial blood pressure. The system includes a heartbeat detection module configured to receive an electrocardiogram signal, and detect one or more QRS complexes of the electrocardiogram signal. The system also includes a photoplethysmographic sensor module configured to trigger a light emitter, thereby generating a plurality of samples of a photoplethysmographic signal. Further, the system includes a blood pressure calculation module configured to receive information about the detected one or more QRS complexes and the plurality of photoplethysmographic signal samples, and calculate at least one blood pressure value based on a pulse arrival time period between the electrocardiogram and the photoplethysmographic signal.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 4, 2018
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Venkata Rajesh Pamula, Marian Verhelst
  • Patent number: 10079145
    Abstract: The present disclosure relates to a method for pattern formation on a substrate. An example embodiment includes a method for pattern formation. The method includes providing a photoresist layer on a composite substrate. The method also includes patterning the photoresist layer by lithography to define a plurality of parallel stripe photoresist structures. The method further includes providing a block copolymer on and along the composite substrate, in between the parallel stripe photoresist structures. The block copolymer includes a first component and a second component. The method additionally includes subjecting the block copolymer to predetermined conditions to cause phase separation of the first component and the second component. In addition, the method includes performing a sequential infiltration synthesis process. Still further, the method includes selectively removing the parallel stripe photoresist structures. Additionally, the method includes defining a core stripe structure.
    Type: Grant
    Filed: October 13, 2016
    Date of Patent: September 18, 2018
    Assignees: IMEC VZW, KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D
    Inventors: Boon Teik Chan, Arjun Singh
  • Patent number: 10061209
    Abstract: The disclosure relates to a method for verifying a printed pattern. In an example embodiment, the method includes defining sectors of at least a portion of the features in the reference pattern, determining a contour of the printed pattern, and superimposing the contour of the printed pattern on the reference pattern. The method also includes determining surface areas of sectors of the printed pattern that correspond to the sectors of the reference pattern and calculating one or more parameters as a function of at least one of the surface areas, the parameters being related to a single sector or to multiple sectors. The method additionally includes evaluating the parameters with respect to a reference value.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: August 28, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Julien Mailfert, Philippe Leray, Sandip Halder
  • Patent number: 10033078
    Abstract: The present disclosure relates to a tunable magnonic crystal device comprising a spin wave waveguide, a magnonic crystal structure in or on the spin wave waveguide, and a magneto-electric cell operably connected to the magnonic crystal structure. The magnonic crystal structure is adapted for selectively filtering a spin wave spectral component of a spin wave propagating through the spin wave waveguide so as to provide a filtered spin wave. The magneto-electric cell comprises an electrode for receiving a control voltage, and adjusting the control voltage controls a spectral parameter of the spectral component of the spin wave via an interaction, dependent on the control voltage, between the magneto-electric cell and a magnetic property of the magnonic crystal structure.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: July 24, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Florin Ciubotaru, Hanns Christoph Adelmann, Xiao Sun
  • Patent number: 10014437
    Abstract: An optical semiconductor device comprises, on a substrate, a fin of diamond-cubic semiconductor material and, at the base of the fin, a slab of that semiconductor material, in a diamond-hexagonal structure, that extends over the full width of the fin, the slab being configured as an optically active material. This semiconductor material can contain silicon. A method for manufacturing the optical semiconductor device comprises annealing the sidewalls of the fin, thereby inducing a stress gradient along the width of the fin.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: July 3, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&D
    Inventors: Hugo Bender, Yang Qiu
  • Publication number: 20180183212
    Abstract: An electrically-operated semiconductor laser device and method for forming the laser device are provided. The laser device includes a fin structure to which a waveguide is optically coupled. The waveguide is optically coupled to passive waveguides at either end thereof. The fin structure includes an array of fin elements, each fin element comprising Group III-V materials.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 28, 2018
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D, Universiteit Gent
    Inventors: Joris Van Campenhout, Clement Merckling, Maria Ioanna Pantouvaki, Ashwyn Srinivasan, Irina Kulkova
  • Publication number: 20180173109
    Abstract: An example embodiment relates to a method for making a mask layer. The method may include providing a patterned layer on a substrate, the patterned layer including at least a first set of lines of an organic material of a first nature, the lines having a line height, a first line width roughness, and being separated either by voids or by a material of a second nature. The method may further include infiltrating at least a top portion of the first set of lines with a metal or ceramic material. The method may further include removing the organic material by oxidative plasma etching, thereby forming a second set of lines of metal or ceramic material on the substrate, the second set of lines having a second line width roughness, smaller than the first line width roughness.
    Type: Application
    Filed: November 15, 2017
    Publication date: June 21, 2018
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Roel Gronheid, Arjun Singh, Werner Knaepen
  • Publication number: 20180175193
    Abstract: A semiconductor device is disclosed that includes a substrate and at least a first, second, third, and fourth vertical transistor supported by the substrate. Each transistor comprises a vertical channel, a polarity gate electrode forming a polarity gate adapted to act on a first portion of the channel to affect a polarity of the channel, and a control gate electrode forming a control gate adapted to act on a second portion of the channel to control the electrical conductivity of the channel. The polarity gate electrode and the control gate electrode of each one of the transistors extend laterally from their respective gate and in mutually opposite directions, and the transistors are laterally spaced from each other and arranged such that the control gate electrodes of the first and third transistor face each other and the control gate electrodes of the second and fourth transistor face each other.
    Type: Application
    Filed: December 8, 2017
    Publication date: June 21, 2018
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Praveen Raghavan, Odysseas Zografos
  • Patent number: 9984874
    Abstract: Method of producing one or more transition metal dichalcogenide (MX2) layers on a substrate, comprising the steps of: obtaining a substrate having a surface and depositing MX2 on the surface using ALD deposition, starting from a metal halide precursor and a chalcogen source (H2X), at a deposition temperature of about 300° C. Suitable metals are Mo and W, suitable chalcogenides are S, Se and Te. The substrate may be (111) oriented. Also mixtures of two or more MX2 layers of different compositions can be deposited on the substrate, by repeating at least some of the steps of the method.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: May 29, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Matty Caymax, Markus Heyne, Annelies Delabie
  • Publication number: 20180108734
    Abstract: Within examples, a semiconductor device includes a first structure that includes a first doped semiconductor material of a first doping type. The semiconductor device further includes a metal in contact with the first structure, and a second structure that includes a second doped semiconductor material of the first doping type in contact with the first structure. A band off-set for majority charge carriers between the first doped semiconductor material and the second doped semiconductor material is sufficiently large for charge carriers from the second doped semiconductor material to be transferred into the first doped semiconductor material.
    Type: Application
    Filed: October 18, 2017
    Publication date: April 19, 2018
    Applicants: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Hao Yu, Geoffrey Pourtois
  • Patent number: 9927559
    Abstract: The disclosure relates to wavelength-controlled directivity of all-dielectric optical nanoantennas. One example embodiment is an optical nanoantenna for directionally scattering light in a visible or a near-infrared spectral range. The optical nanoantenna includes a substrate. The optical nanoantenna also includes an antenna structure disposed on the substrate. The antenna structure includes a dielectric material having a refractive index that is higher than a refractive index of the substrate and a refractive index of a surrounding medium. The antenna structure includes a structure having two distinct end portions. The antenna structure is asymmetric with respect to at least one mirror reflection in a plane that is orthogonal to a plane of the substrate.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: March 27, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Jiaqi Li, Niels Verellen, Pol Van Dorpe, Dries Vercruysse
  • Patent number: 9899220
    Abstract: A method for patterning a substrate is disclosed. The method includes applying a first directed self-assembly (DSA) patterning process that defines a first patterned layer on top of the substrate. The pattern of the first patterned layer is to be transferred into the substrate. The method also includes applying a planarizing layer on top of the first patterned layer. The method further includes applying a second DSA patterning process that defines a second patterned layer on top of the planarizing layer, thereby not patterning the planarizing layer. A pattern of the second patterned layer is to be transferred into the substrate. Projections of the pattern of the second patterned layer and the pattern of the first patterned layer on the substrate have no overlap. Additionally, the method includes transferring the patterns defined by the first patterned layer and the second patterned layer into the substrate.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: February 20, 2018
    Assignees: IMEC VZW, KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D
    Inventors: Boon Teik Chan, Zheng Tao, Arjun Singh, Jan Doise
  • Patent number: 9899501
    Abstract: A semiconductor device comprises a two-dimensional (2D) material layer, the 2D material layer comprising a channel region in between a source region and a drain region; a first gate stack and a second gate stack in contact with the 2D material layer, the first and second gate stack being spaced apart over a distance; the first gate stack located on the channel region of the 2D material layer and in between the source region and the second gate stack, the first gate stack arranged to control the injection of carriers from the source region to the channel region and the second gate stack located on the channel region of the 2D material layer; the second gate stack arranged to control the conduction of the channel region.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: February 20, 2018
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Geoffrey Pourtois, Anh Khoa Lu, Cedric Huyghebaert
  • Patent number: 9885949
    Abstract: The disclosure is directed to a method for designing a lithographic mask to print a pattern of structural features, wherein an OPC-based methodology may be used for producing one or more simulated patterns as they would be printed through the optimized mask. A real mask is then produced according to the optimized design, and an actual print is made through the mask. To evaluate the printed pattern and the PW on wafer more accurately, experimental contours are extracted from the CD-SEM measurements of the printed pattern. The verification of the mask is based on a comparison between on the one hand the contour obtained from the printed pattern, and on the other hand the intended pattern and/or the simulated contour. A direct comparison can be made between simulation and experiment, without losing all the pieces of info contained in each single CD-SEM picture.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: February 6, 2018
    Assignees: IMEC VZW, KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D
    Inventors: Julien Mailfert, Werner Gillijns
  • Patent number: 9879058
    Abstract: The present invention is related to the use of compounds or pharmaceutically acceptable salts thereof that modulate astrocytic release of substances through connexin and pannexin hemichannels, for the treatment of psychiatric disorders. Compounds or pharmaceutically acceptable salts thereof used in the present invention comprise any compound that differentially modulates, blocks, opens, inhibits, and/or activates connexin and/or pannexin hemichannels from astrocytes while not affecting gap junctions. The invention is also related to a method for treating psychiatric disorders, comprising administering to a mammal or human a therapeutically effective amount of a compound or a pharmaceutically acceptable salt thereof, that modulates astrocytic release of substances through connexin and pannexin hemichannels. Pharmaceutical compositions and a screening method are also considered in the present invention.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: January 30, 2018
    Assignees: Universidad Andres Bello, Universiteit Gent, Katholieke Universiteit Leuven, Ku Leuven R & D
    Inventors: Jimmy Stehberg Liberman, Luc Gilbert Leybaert Sinia, Geert Albert Bultynck Demets, Mauricio Antonio Retamal Lucero, Fernando Danilo Gonzalez Nilo
  • Patent number: 9862601
    Abstract: A system (100) is described for characterizing and/or manipulating molecules. The system may especially be suitable for biological molecules, although the invention is not limited thereto. The system (100) comprises a substrate (110) comprising a nanostructure (120) being suitable for translocation of molecules through the nanostructure (120). It furthermore comprises a means (210) for translocating molecules through the nanostructure (120) and a plasmonic force field generating means (130) adapted for influencing the translocation speed of the particle by applying a plasmonic force field at the nanostructure (120). A corresponding method also is described.
    Type: Grant
    Filed: December 24, 2010
    Date of Patent: January 9, 2018
    Assignees: IMEC, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Chang Chen, Pol Van Dorpe, Kai Cheng, Tim Stakenborg, Liesbet Lagae
  • Patent number: 9842734
    Abstract: A method is provided for forming a feature of a target material on a substrate. The method including: forming a feature of a sacrificial material on the substrate; and forming the feature of the target material by a deposition process during which the feature of the sacrificial material is removed from the substrate by forming a volatile reaction product with a precursor of the deposition process, wherein the sacrificial material is replaced by the target material and the target material is selectively deposited on surface portions of the substrate, which portions were covered by the feature of the sacrificial material, to form the feature of the target material.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: December 12, 2017
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Annelies Delabie, Markus Heyne