Patents Assigned to Kokusai Electric
  • Patent number: 9732426
    Abstract: According to the present disclosure, a film containing carbon added at a high concentration is formed with high controllability. A method of manufacturing a semiconductor device includes forming a film containing silicon, carbon and a predetermined element on a substrate by performing a cycle a predetermined number of times. The predetermined element is one of nitrogen and oxygen. The cycle includes supplying a precursor gas containing at least two silicon atoms per one molecule, carbon and a halogen element and having an Si—C bonding to the substrate, and supplying a modifying gas containing the predetermined element to the substrate.
    Type: Grant
    Filed: August 6, 2014
    Date of Patent: August 15, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Satoshi Shimamoto, Yoshiro Hirose, Atsushi Sano
  • Patent number: 9735007
    Abstract: A method of processing a substrate includes: growing a first layer including a first element and a second element by supplying a first precursor containing the first element and a second precursor containing the second element to the substrate; and growing a second layer including the second element and a third element by supplying the second precursor and a third precursor containing the third element to the substrate. The act of growing the first layer and the act of growing the second layer are alternately performed a predetermined number of times, and the act of growing the first layer is performed before the act of growing the second layer to selectively grow a laminated film on a conductive film exposed on the surface of the substrate. The first layer and the second layer are laminated to form the laminated film.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: August 15, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC, INC.
    Inventors: Masahito Kitamura, Takahiro Morikawa
  • Patent number: 9732421
    Abstract: There is provided a substrate processing apparatus. The substrate processing apparatus includes a processing space configured to process a substrate placed on a substrate receiving surface on a substrate support, a gas supply system configured to supply gases into the processing space from the opposite side of the substrate receiving surface, an exhaust buffer chamber including a communication hole communicating with the processing space at least at a side portion of the processing space and a gas flow blocking wall extending in a blocking direction of the gases flowing through the communication hole, and a first heating element configured to heat the exhaust buffer chamber.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: August 15, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tsukasa Kamakura
  • Patent number: 9728400
    Abstract: A method of manufacturing a semiconductor device is disclosed. The method includes forming a film on a substrate by performing a cycle a predetermined number of times, wherein the cycle includes non-simultaneously performing: supplying a precursor gas to the substrate in a process chamber; exhausting the precursor gas in the process chamber through an exhaust system; confining a reaction gas, which differs in chemical structure from the precursor gas, in the process chamber by supplying the reaction gas to the substrate in the process chamber while the exhaust system is closed; and exhausting the reaction gas in the process chamber through the exhaust system while the exhaust system is opened.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: August 8, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takeo Hanashima, Hiroshi Ashihara
  • Patent number: 9728409
    Abstract: Provided is a method of manufacturing a semiconductor device, including: forming a stacked metal nitride film including a first metal nitride film and a second metal nitride film on a substrate by alternately performing steps (a) and (b) a plurality of times, wherein the step (a) includes alternately supplying: a first metal source containing a first halogen element and a metal element; and a nitrogen-containing source to the substrate a plurality of times to form the first metal nitride film, and the step (b) includes alternately supplying: a second metal source containing a second halogen element different from the first halogen element and the metal element; and the nitrogen-containing source to the substrate a plurality of times to form the second metal nitride film.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: August 8, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Harada, Kimihiko Nakatani, Hiroshi Ashihara
  • Patent number: 9728431
    Abstract: The present invention provides a technique for improving the productivity of a processing apparatus including a plurality of process chambers. There is provided a technique including a method for manufacturing a semiconductor device including: (a) transferring a last remaining substrate stored in an xth storage unit of a plurality of storage units to an empty nth chamber in an mth processing unit of a plurality of processing units; and (b) transferring a first one of a plurality of substrates stored in an (x+1)th storage unit of the plurality of storage units to one of chambers in an (m+1)th processing unit of the plurality of processing units (where x, m and n are natural numbers).
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: August 8, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Naofumi Ohashi, Toshiyuki Kikuchi, Shun Matsui, Tadashi Takasaki
  • Publication number: 20170221738
    Abstract: A substrate processing apparatus includes a first reaction chamber including: a first heating unit, a first processing space, and a first transfer space disposed under the first processing space, a second reaction chamber including: a second heating unit, a second processing space, and a second transfer space disposed under the second processing space; a first sidewall and a second sidewall defining the first reaction chamber and the second reaction chamber, wherein the first sidewall is shared by the first reaction chamber and the second reaction chamber, and a cooling channel disposed in the first sidewall and the second sidewall such that a cooling efficiency of the first sidewall is higher than that of the second sidewall, wherein the first reaction chamber and the second reaction chamber are disposed adjacent to each other with the first sidewall therebetween.
    Type: Application
    Filed: March 15, 2016
    Publication date: August 3, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Akira TAKAHASHI, Kazuyuki TOYODA
  • Publication number: 20170222972
    Abstract: An IP communication system has a switching hub having at least first to (n+1)-th ports (where n is an integer equal to or greater than two); first to n-th IP devices connected to the respective first to n-th ports; and an IP address setting unit connected to the (n+1)-th port. The IP address setting unit transmits, to the switching hub, a first port open instruction to open the first port and to close the second to n-th ports, and thereafter transmits, to the switching hub, a first IP address to be set to the first IP device. Upon reception of the first port open instruction from the IP address setting unit, the switching hub opens the first port and closes the second to n-th ports. Upon reception of the first IP address, the switching hub transmits the first IP address to the first IP device.
    Type: Application
    Filed: September 30, 2014
    Publication date: August 3, 2017
    Applicant: Hitachi Kokusai Electric Inc.
    Inventor: Tomoki MATSUKAWA
  • Publication number: 20170218513
    Abstract: A substrate processing apparatus includes a transfer chamber; an upper gas supply mechanism for supplying a gas into an upper region of the transfer chamber through a first gas supply port; and a lower gas supply mechanism configured to supply the gas into a lower region of the transfer chamber through a second gas supply port. The upper gas supply mechanism includes a first buffer chamber at a back surface of the first gas supply port; a pair of upper ducts at both sides of the first buffer chamber; and a first ventilation unit at lower ends of the pair of upper ducts. The lower gas supply mechanism includes a second buffer chamber at a back surface of the second gas supply port; a lower duct at lower surface of the second buffer chamber; and a second ventilation unit at a lower end of the lower duct.
    Type: Application
    Filed: February 1, 2017
    Publication date: August 3, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Takayuki NAKADA, Tomoshi TANIYAMA, Kenji SHIRAKO
  • Publication number: 20170221699
    Abstract: There is provided a method of manufacturing a semiconductor device, which includes: forming a seed layer doped with a dopant on a substrate by performing a cycle a predetermined number of times, the cycle including: supplying a halogen-based first process gas to the substrate, supplying a non-halogen-based second process gas to the substrate, and supplying a dopant gas to the substrate; and supplying a third process gas to the substrate to form a film on the seed layer.
    Type: Application
    Filed: January 25, 2017
    Publication date: August 3, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yugo ORIHASHI, Atsushi MORIYA
  • Publication number: 20170221698
    Abstract: A semiconductor device manufacturing method includes forming a film having a desired composition on a substrate by selectively performing at least one of: performing, n1 times, a cycle including processes of sequentially supplying a first precursor gas, a nitriding gas and an oxidizing gas to the substrate; performing, n2 times, a cycle including processes of sequentially supplying the first precursor gas, the oxidizing gas and the nitriding gas to the substrate; performing, n3 times, a cycle including processes of sequentially supplying a second precursor gas containing a chemical bond of a predetermined element and carbon, which is more than that contained in the first precursor gas, the nitriding gas and the oxidizing gas to the substrate; and performing, n4 times, a cycle including processes of sequentially supplying the second precursor gas, the oxidizing gas and the nitriding gas to the substrate.
    Type: Application
    Filed: January 31, 2017
    Publication date: August 3, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Yoshitomo HASHIMOTO, Yoshiro HIROSE
  • Patent number: 9720407
    Abstract: A substrate processing system includes a monitored data receiving unit receiving a plurality of types of monitored data; a temporary memory unit periodically storing the monitored data; a monitored data rate detection unit detecting, as a monitored data rate, a total number of times each type of monitored data changes during a first time period by more than a predetermined amount; a monitored data writing allocation unit allocating a storing frequency to each type of monitored data based on the monitored data rate and an upper limit; a monitored data writing unit writing the monitored data to the temporary memory unit during the second time period based on the storing frequency; an accumulative memory unit storing the monitored data for a plurality of periods; and an accumulative data writing unit reading the monitored data for every third time period and storing the monitored data in the accumulative memory unit.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: August 1, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yoshitaka Koyama, Hiroyuki Iwakura
  • Publication number: 20170213727
    Abstract: A method of manufacturing a semiconductor device includes alternately performing supplying a first process gas containing silicon and a halogen element to a substrate having a surface on which monocrystalline silicon and an insulation film are exposed and supplying a second process gas containing silicon and not containing a halogen element to the substrate, and supplying a third process gas containing silicon to the substrate, whereby a first silicon film is homo-epitaxially grown on the monocrystalline silicon and a second silicon film differing in crystal structure from the first silicon film is grown on the insulation film.
    Type: Application
    Filed: March 24, 2017
    Publication date: July 27, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi MORIYA, Naoharu NAKAISO, Yugo ORIHASHI, Kotaro MURAKAMI
  • Patent number: 9716568
    Abstract: The present invention relates to a radio communication system that provides a transmission technique capable of suppressing degradation of communication quality even in an area other than an interference area of two base station radio waves. Further, the transmission technique and the communication system include implementation of a Differential Space-Time Block Coding (DSTBC) method relating to transmission diversity in radio communication utilizing, for example, base stations with transmission antennas that transmit respective sequence signals of the DSTBC.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: July 25, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Hiroyuki Akutagawa, Takehiko Kobayashi
  • Patent number: 9713171
    Abstract: Provided is a wireless communication system that is capable of preventing interference between secondary use systems that do not use a database. The wireless communication system uses a white space for opposing communication between a base station and a terminal station. At startup, the base station transmits a preamble over a cycle that is n-times a frame length (where n is an integer 2 or greater), changes a set frequency channel if ranging is not detected from a terminal station within a fixed time interval, and begins normal operation using the set frequency channel if ranging is detected. At startup, the terminal station detects a preamble within a received signal, changes a set frequency channel if a peak is detected at each frame length, and transmits a ranging signal if peaks are detected for cycles that are n-times the frame length and peaks are not detected for other cycles.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: July 18, 2017
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kei Yanagisawa, Masayuki Takekawa, Keigo Hasegawa
  • Patent number: 9711348
    Abstract: The present invention increases controllability of a composition ratio of a multi-element film that contains a predetermined element and at least one element selected from the group consisting of boron, oxygen, carbon and nitrogen. There is provided a method of manufacturing a semiconductor device, including: forming a laminated film where a first film and a second film are laminated on a substrate by performing a cycle a predetermined number of times, the cycle including: (a) forming the first film being free of borazine ring structure and including a predetermined element and at least one element selected from the group consisting of oxygen, carbon and nitrogen; and (b) forming the second film having a borazine ring structure and including at least boron and nitrogen.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: July 18, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Atsushi Sano, Yoshiro Hirose
  • Patent number: 9708708
    Abstract: A film is efficiently formed by sufficiently supplying a source gas to substrates accommodated in a process chamber, and the uniformity of a film formed on the substrates is improved. A method of a semiconductor device manufacturing includes (a) supplying a source gas to an upper region of a process chamber through a first gas supply hole disposed at a front end of a first nozzle disposed in a lower region of the process chamber where the source gas is not pyrolyzed; (b) supplying the source gas to substrates disposed in the lower region and a middle region of the process chamber through a plurality of second gas supply holes of a second nozzle; and (c) supplying a reactive gas to substrates disposed in the lower region, the middle region and the upper region of the process chamber through a plurality of third gas supply holes of a third nozzle.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: July 18, 2017
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventors: Noriyuki Isobe, Yuji Takebayashi, Kenichi Suzaki, Takeshi Kasai, Atsushi Hirano, Koichi Oikawa
  • Publication number: 20170198391
    Abstract: A technique for performing high-temperature substrate processing includes a plurality of chambers where substrates are processed, wherein the chambers are disposed adjacent to one another; a gas supply unit configured to alternately supply first and second gasses to each of the chambers; a first exhaust pipe installed in each of the chambers and configured to exhaust the first and second gasses; a first heater installed at the first exhaust pipe and configured to heat the first exhaust pipe to a temperature higher than a temperature whereat a source of the first gas is vaporized under vapor pressure; an electronic box installed at each of the chambers, wherein the electronic box is disposed adjacent to a gas box accommodating a portion of the first exhaust pipe; and a thermal reduction structure surrounding the first exhaust pipe and configured to reduce heat from the first heater being conducted to the electronic box.
    Type: Application
    Filed: March 18, 2016
    Publication date: July 13, 2017
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Hiroshi ASHIHARA
  • Patent number: D793974
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: August 8, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hitoshi Murata, Takatomo Yamaguchi
  • Patent number: D793975
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: August 8, 2017
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hitoshi Murata, Yuichi Wada, Takashi Yahata, Hidenari Yoshida, Shuhei Saido