Abstract: A faceplate of a showerhead has a bottom side that faces a plasma generation region and a top side that faces a plenum into which a process gas is supplied during operation of a substrate processing system. The faceplate includes apertures formed through the bottom side and openings formed through the top side. Each of the apertures is formed to extend through a portion of an overall thickness of the faceplate to intersect with at least one of the openings to form a corresponding flow path for process gas through the faceplate. Each of the apertures has a cross-section that has a hollow cathode discharge suppression dimension in at least one direction. Each of the openings has a cross-section that has a smallest cross-sectional dimension that is greater than the hollow cathode discharge suppression dimension.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.

Abstract: Methods, systems, and computer programs are presented for determining the recipe for manufacturing a semiconductor with the use of machine learning (ML) to accelerate the definition of recipes. One general aspect includes a method that includes an operation for performing experiments for processing a component, each experiment controlled by a recipe, from a set of recipes, that identifies parameters for manufacturing equipment. The method further includes an operation for performing virtual simulations for processing the component, each simulation controlled by one recipe from the set of recipes. An ML model is obtained by training an ML algorithm using experiment results and virtual results from the virtual simulations. The method further includes operations for receiving specifications for a desired processing of the component, and creating, by the ML model, a new recipe for processing the component based on the specifications.

Abstract: A substrate support includes an edge ring, one or more heating elements, and a cable configured to provide power from a power source to the edge ring and the one or more heating elements. The cable includes a first plurality of wires connected to the edge ring, a second plurality of wires connected to the one or more heating elements, a filter module, wherein the first plurality of wires and the second plurality of wires are twisted together within the filter module, and an isolation device. The isolation device is connected to the first plurality of wires and disposed between the filter module and the edge ring. The isolation device is configured to compensate for a resonance frequency generated during operation of the edge ring and the one or more heating elements.

Abstract: Methods and related apparatus for depositing an ashable hard mask (AHM) on a substrate include pulsing a low frequency radio frequency component at a high power. Pulsing low frequency power may be used to increase the selectivity or reduce the stress of an AHM. The AHM may then be used to etch features into underlying layers of the substrate.

Abstract: A collar may be provided having an aperture through it through which the turret of a wafer handling robot may be extended or retracted. The collar may have one or more radial gas passages. Gas directed inwards towards the turret from the radial passage(s) may turn downward when it strikes the turret. A bellows may be optionally affixed to the bottom of the turret and to the bottom of the base such that the volume of the base occupied by the turret and the bellows remains generally fixed regardless of the degree to which the turret is extended from the base.

Abstract: A substrate processing system for treating a substrate includes a manifold, a plurality of injector assemblies located in a processing chamber, and a dose controller. Each of the plurality of injector assemblies is in fluid communication with the manifold and includes a valve including an inlet and an outlet. The dose controller is configured to communicate with the valve in each of the plurality of injector assemblies. The dose controller is configured to adjust a pulse width supplied to the valve in each of the plurality of injector assemblies to provide spatial dosing and at least one of compensate for upstream skew caused by a prior process and pre-compensate for downstream skew expected from a subsequent process.

Abstract: An ElectroStatic Chuck (ESC) including a chucking surface having at least a portion covered with a coating of silicon oxide (SiO2), silicon nitride (Si3N4) or a combination of both. The coating can be applied in situ a processing chamber of a substrate processing tool and periodically removed and re-applied in situ to create fresh coating.

Abstract: A method includes arranging a substrate in a processing chamber, and exposing the substrate to a gas mixture including a first metal precursor gas and a second metal precursor gas to deposit a first metal precursor and a second metal precursor onto the substrate at the same time. The method further includes purging the processing chamber, supplying a reactant common to both the first metal precursor and the second metal precursor to form a layer of an alloy on the substrate, and purging the processing chamber.

Abstract: Various carrier ring designs and configurations to control an amount of deposition at a wafer's front side and bevel edge are provided. The carrier ring designs can control the amount of deposition at various locations of the wafer while deposition is performed on the wafer's back side, with no deposition desired on the front side of the wafer. These locations include front side, edge, and back side of bevel; and front and back side of the wafer. Edge profiles of the carrier rings are designed to control flow of process gases, flow of front side purge gas, and plasma effects. In some designs, through holes are added to the carrier rings to control gas flows. The edge profiles and added features can reduce or eliminate deposition at the wafer's front side and bevel edge.

Abstract: Methods and apparatuses for forming an encapsulation bilayer over a chalcogenide material on a semiconductor substrate are provided. Methods involve forming a bilayer including a barrier layer directly on chalcogenide material deposited using pulsed plasma plasma-enhanced chemical vapor deposition (PP-PECVD) and an encapsulation layer over the barrier layer deposited using plasma-enhanced atomic layer deposition (PEALD). In various embodiments, the barrier layer is formed using a halogen-free silicon precursor and the encapsulation layer deposited by PEALD is formed using a halogen-containing silicon precursor and a hydrogen-free nitrogen-containing reactant.

Abstract: Selective deposition of a sacrificial material on a semiconductor substrate, the substrate having a surface with a plurality of regions of substrate materials having different selectivities for the sacrificial material, may be conducted such that substantial deposition of the sacrificial material occurs on a first region of the substrate surface, and no substantial deposition occurs on a second region of the substrate surface. Deposition of a non-sacrificial material may then be conducted on the substrate, such that substantial deposition of the non-sacrificial material occurs on the second region and no substantial deposition of the non-sacrificial material occurs on the first region. The sacrificial material may then be removed such that net deposition of the non-sacrificial material occurs substantially only on the second region.

Abstract: Systems and methods for real-time control of temperature within a plasma chamber are described. One of the methods includes sensing a voltage in real time of a rail that is coupled to a voltage source. The voltage source supplies a voltage to multiple heater elements of the plasma chamber. The voltage that is sensed is used to adjust one or more duty cycles of corresponding one or more of the heater elements. The adjusted one or more duty cycles facilitate achieving and maintaining a temperature value within the plasma chamber over time.

Abstract: Molybdenum-containing films are deposited on semiconductor substrates using reactions of molybdenum-containing precursors in ALD and CVD processes. In some embodiments, the precursors can be used for deposition of molybdenum metal films with low levels of incorporation of carbon and nitrogen. In some embodiments, the films are deposited using fluorine-free precursors in a presence of exposed silicon-containing layers without using etch stop layers. The precursor, in some embodiments, is a compound that includes molybdenum, at least one halogen that forms a bond with molybdenum, and at chamber least one organic ligand that includes an element selected from the group consisting of N, O, and S, that forms a bond with molybdenum, In another aspect, the precursor is a molybdenum, compound with at least one sulfur-containing ligand, and preferably no molybdenum-carbon bonds.

Abstract: A tool for driving a component with a knurling pattern around an outer surface of the component is provided. A shaft, with a first end, is in the form of at least a partial cylinder, where the at least partial cylinder has a first inner diameter that is less than an outer diameter of the knurling pattern. Serrations in the shaft have a pattern that matches the knurling pattern, which allow the serration in the shaft to engage with the knurling pattern so that when the shaft is rotated, the component is rotated.

Abstract: A system for controlling of wafer bow in plasma processing stations is described. The system includes a circuit that provides a low frequency RF signal and another circuit that provides a high frequency RF signal. The system includes an output circuit and the stations. The output circuit combines the low frequency RF signal and the high frequency RF signal to generate a plurality of combined RF signals for the stations. Amount of low frequency power delivered to one of the stations depends on wafer bow, such as non-flatness of a wafer. A bowed wafer decreases low frequency power delivered to the station in a multi-station chamber with a common RF source. A shunt inductor is coupled in parallel to each of the stations to increase an amount of current to the station with a bowed wafer. Hence, station power becomes less sensitive to wafer bow to minimize wafer bowing.

Abstract: A semiconductor substrate processing apparatus includes a vacuum chamber having a processing zone in which a semiconductor substrate may be processed, a process gas source in fluid communication with the vacuum chamber for supplying a process gas into the vacuum chamber, a showerhead module through which process gas from the process gas source is supplied to the processing zone of the vacuum chamber, and a substrate pedestal module.

Abstract: An apparatus may be provided that includes a substrate having one or more microfluidic valve structures. The valve structures are non-elastomeric, non-polymeric, non-metallic membrane valves for use in high-vacuum application. Such valves are functional even when the fluid-control side of the valve is exposed to a sub-atmospheric pressure field which may generally act to collapse/seal traditional elastomeric membrane valve.

Abstract: A first edge ring for a substrate support is provided. The first edge ring includes an annular-shaped body and one or more lift pin receiving elements. The annular-shaped body is sized and shaped to surround an upper portion of the substrate support. The annular-shaped body defines an upper surface, a lower surface, a radially inner surface, and a radially outer surface. The one or more lift pin receiving elements are disposed along the lower surface of the annular-shaped body and sized and shaped to receive and provide kinematic coupling with top ends respectively of three or more lift pins.

Abstract: Methods and apparatus for processing a substrate in a multi-frequency plasma processing chamber are disclosed. The base RF signal pulses between a high power level and a low power level. Each of the non-base RF generators, responsive to a control signal, proactively switches between a first predefined power level and a second predefined power level as the base RF signal pulses. Alternatively or additionally, each of the non-base RF generators, responsive to a control signal, proactively switches between a first predefined RF frequency and a second predefined RF frequency as the base RF signal pulses. Techniques are disclosed for ascertaining in advance of production time the first and second predefined power levels and/or the first and second predefined RF frequencies for the non-base RF signals.