Abstract: A confinement ring coupling arrangement for coupling, in a plasma processing chamber, a confinement ring to a plunger. The plunger is configured to move the confinement ring to deploy and stow the confinement ring to facilitate processing of a substrate within the plasma processing chamber. The confinement ring coupling arrangement includes a hanger adapter having a locking head, the hanger adapter being configured to be coupled with the plunger. The confinement ring coupling arrangement further includes a hanging bore disposed in the confinement ring and configured to receive the locking head and to secure the locking head within the hanging bore during stowing and deployment of the confinement ring, wherein a diameter of the locking head is sufficiently smaller than a cross-section dimension of the hanging bore to prevent a sidewall of the locking head from scraping against a sidewall of the hanging bore during the stowing and deployment of the confinement ring.
Abstract: The invention is a method of etching an integrated circuit (IC) structure that includes a metal hard mask layer. The etching of the metal hard mask layer is performed by first feeding a gas mixture comprising a fluorine containing gas and oxygen (O2) gas to a reactor. The method then proceeds to generate a plasma that etches the metal hard mask layer. The method can be applied to either performing a via etch or a trench etch. Additionally, the invention teaches the removal of a photoresist layer without affecting the metal hard mask layer.
Type:
Grant
Filed:
September 18, 2002
Date of Patent:
August 16, 2005
Assignee:
Lam Research Corporation
Inventors:
SiYi Li, S.M. Rega Sadjadi, Sean S. Kang, Tri Le, Bi-Ming Yen, Scott Briggs
Abstract: A system and method of measuring a metallic layer on a substrate within a multi-step substrate process includes modifying a metallic layer on the substrate such as forming a metallic layer or removing at least a portion of the metallic layer. At least one sensor is positioned a predetermined distance from the surface of the substrate. The surface of the substrate is mapped to determine a uniformity of the metallic layer on the surface of the substrate.
Type:
Grant
Filed:
September 19, 2002
Date of Patent:
August 16, 2005
Assignee:
Lam Research Corporation
Inventors:
Yehiel Gotkis, Aleksander Owczarz, David Hemker, Nicolas Bright, Rodney Kistler
Abstract: An end point detection system may compare a production image developed during processing of production semiconductor wafer with a reference image. The reference image is representative of a desired state of processing of the production semiconductor wafer. The reference image is determined by processing a reference semiconductor wafer. The reference semiconductor wafer may be part of a wafer group of similar wafers that includes the production semiconductor wafer. The end point detection system may dynamically develop the production image during processing of the production semiconductor wafer. Indication may be provided by the end point detection system when the reference image and the production image are substantially similar.
Abstract: Methods are provided for monitoring and controlling a chemical mechanical planarization (CMP) process. Relationships between motor torques and CMP process parameters are determined and utilized to provide a basis for monitoring and controlling the CMP process. Motor current measurements obtained during the CMP process are converted to motor torques to provide for use of the relationships in monitoring and controlling the CMP process. The motor current measurements and relationships are also used to determine and monitor a coefficient of friction present during the CMP process.
Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and a fluoride compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.
Type:
Grant
Filed:
August 12, 2003
Date of Patent:
August 9, 2005
Assignee:
Lam Research Corporation
Inventors:
Liming Zhang, Yuexing Zhao, Diane J. Hymes, Wilbur C. Krusell
Abstract: A confinement ring support assembly for coupling together a plurality of confinement rings in a plasma processing chamber. The confinement ring support assembly includes a post having first end and a second end. The post further includes a first lip having an associated first sliding surface, and a second lip having an associated second sliding surface. The first lip is disposed at a first position on the post, the second lip being disposed at a second position at a different arc relative to the first location on the post, the second position being disposed between the first position and the first end along a longitudinal axis of the post. The confinement ring support assembly further includes a first washer configured to move slidably from the first lip past the second lip toward the first end of the post.
Abstract: This invention is an apparatus for purging unwanted gasses from the Front Opening Unified Pod (FOUP). It consists of a purging wand which is inserted into the chamber for an optimal purge. The purging wand moves back and forth along a simple axis activated by a linkage robot. The wand is carried along a track with the FOUP and when its reaches its optimal position inside the FOUP, the source of cleaning gas is allowed to flow into and spray out of the wand thereby purging the FOUP. After the purging is completed, the linkage robot withdraws the wand from within the FOUP to its original position.
Abstract: In chemical mechanical polishing, a wafer carrier plate is provided with a cavity for reception of a sensor positioned very close to a wafer to be polished. Energy resulting from contact between a polishing pad and an exposed surface of the wafer is transmitted only a very short distance to the sensor and is sensed by the sensor, providing data as to the nature of properties of the exposed surface of the wafer, and of transitions of those properties. Correlation methods provide graphs relating sensed energy to the surface properties, and to the transitions. The correlation graphs provide process status data for process control.
Type:
Grant
Filed:
October 14, 2004
Date of Patent:
August 2, 2005
Assignee:
Lam Research Corporation
Inventors:
Rodney Kistler, David J. Hemker, Yehiel Gotkis, Aleksander Owczarz, Bruno Morel, Damon V. Williams
Abstract: A method for etching a wafer having a pattern of photoresist material thereon is disclosed. The method includes curing the photoresist material with a bromine containing plasma. Then a main etch of the wafer is carried out. A method for curing a pattern of photoresist material on a wafer is also disclosed. The curing method includes providing a bromine containing plasma and exposing the photoresist material to the plasma, such that a layer of the wafer below the photoresist material is not etched through. A composition of a plasma for curing a photoresist material on a wafer in a high density plasma processing device includes bromine.
Type:
Grant
Filed:
August 14, 2002
Date of Patent:
August 2, 2005
Assignee:
Lam Research Corporation
Inventors:
Yousun Kim Taylor, Wendy Nguyen, Chris G. N. Lee
Abstract: A system and method of determining multiple uniformity metrics of a semiconductor wafer includes quantitatively defining a location metric of a nonuniformity on the surface of the wafer. A quantity is measured at multiple locations on a top surface of the wafer and a center of mass is of the nonuniformity is determined.
Abstract: An etch processor for etching a wafer includes a chuck for holding the wafer and a temperature sensor reporting a temperature of the wafer. The chuck includes a heater controlled by a temperature control system. The temperature sensor is operatively coupled to the temperature control system to maintain the temperature of the chuck at a selectable setpoint temperature. A first setpoint temperature and a second setpoint temperature are selected. The wafer is placed on the chuck and set to the first setpoint temperature. The wafer is then processed for a first period of time at the first setpoint temperature and for a second period of time at the second setpoint temperature.
Type:
Grant
Filed:
September 4, 2002
Date of Patent:
July 26, 2005
Assignee:
Lam Research Corporation
Inventors:
Tom A. Kamp, Richard Gottscho, Steve Lee, Chris Lee, Yoko Yamaguchi, Vahid Vahedi, Aaron Eppler
Abstract: This invention relates to a method of oxide hardmask aluminum etching in metal dry etch processors. It consists of two steps: the step of dry etching an aluminum interconnect stack by using an etch gas composed mainly of boron trichloride/chlorine/fluoroform/nitrogen, and the step of removing etch remnants by using a vapor plasma. The function of the etch gas is to etch the aluminum interconnection pattern in the semi-conductor, and the function of the water vapor plasma is to prevent the corrosion of a chip during the process of removing etch remnants, which will further reduce water rinsing and solution cleaning as in conventional practice, of water rinsing and solution cleaning after removal of photoresist.
Type:
Grant
Filed:
May 6, 2002
Date of Patent:
July 26, 2005
Assignee:
Lam Research Corporation
Inventors:
Ann Chien, Brett C. Richardson, Sterling M. Goyer
Abstract: A method for detecting a thickness of a layer of a wafer to be processed is provided. The method includes defining a plurality of sensors configured to create a set of complementary sensors proximate the wafer. Further included in the method is distributing the plurality of sensors along a particular radius of the wafer such that each sensor of the plurality of sensors is out of phase with an adjacent sensor by a same angle. The method also includes measuring signals generated by the plurality of sensors. Further included is averaging the signals generated by the plurality of sensors so as to generate a combination signal. The averaging is configured to remove noise from the combination signal such that the combination signal is capable of being correlated to identify the thickness of the layer.
Type:
Grant
Filed:
August 5, 2004
Date of Patent:
July 26, 2005
Assignee:
Lam Research Corporation
Inventors:
Yehiel Gotkis, Rodney Kistler, Aleksander Owczarz, David Hemker, Nicolas J. Bright
Abstract: A method for cleaning and drying a front and a back surface of a substrate is provided. The method includes brush scrubbing the back surface of the substrate using a brush scrubbing fluid chemistry. The method further includes applying a front meniscus onto the front surface of the substrate upon completing the brush scrubbing of the back surface. The front meniscus includes a front cleaning chemistry that is chemically compatible with the brush scrubbing fluid chemistry.
Abstract: A method for preparing a surface of a substrate is provided. The method includes scanning the surface of the substrate by a meniscus, preparing the surface of the substrate using the meniscus, and performing a next preparation operation on the surface of the substrate that was prepared without performing a rinsing operation.
Type:
Application
Filed:
June 30, 2004
Publication date:
July 21, 2005
Applicant:
LAM RESEARCH CORP.
Inventors:
Michael Raykin, John de Larios, Mikhail Korolik, Michael Smith, Carl Woods
Abstract: An RF generating system operates with high efficiency to supply RF output power to a plasma load. The RF generating system is capable of modulating the RF output power at frequencies up to the frequency of the RF output power while maintaining high efficiency operation. Broadband frequency modulation of the RF output power suppresses instabilities thereby minimizing unstable behavior of the plasma load.
Abstract: A system and method for achieving a silicon carbide to low-k dielectric etch selectivity ratio of greater than 1:1 using a chlorine containing gas and either hydrogen (H2) gas or nitrogen (N2) gas is described. The method is applied to a semiconductor substrate having a low-k dielectric layer and a silicon carbide layer. The chlorine containing gas is a gas mixture that includes either HCl, BCl3, Cl2, or any combination thereof. In one embodiment, the method provides for supplying an etchant gas comprising a chlorine containing gas and a hydrogen (H2) gas. The etchant gas is then energized to generate a plasma which then etches openings in the silicon carbide at a faster etch rate than the low-k dielectric etch rate. In an alternative embodiment, the etchant gas mixture comprises a chlorine containing gas and a nitrogen (N2) gas.
Type:
Grant
Filed:
July 19, 2002
Date of Patent:
July 19, 2005
Assignee:
Lam Research Corporation
Inventors:
Sean S. Kang, Si Yi Li, S. M. Reza Sadjadi
Abstract: A plasma processing system having a grounded chamber and an RF power feed connected to a bottom electrode is tested. A first capacitance between the bottom electrode and the grounded chamber is measured at atmosphere. Consumable hardware parts are installed in the chamber. A second capacitance between the bottom electrode and the grounded chamber is measured at vacuum with the grounded chamber including all of the installed consumable hardware parts. The first capacitance measurement and the second capacitance measurement are respectively compared with a first reference value and a second reference value to identify and determine any defects in the plasma processing system. The first and second reference value respectively are representative of the capacitance of a defect-free chamber at atmosphere and the capacitance of a defect-free chamber including all of the installed consumable hardware parts at vacuum.
Abstract: A method for etching a layer over a substrate is provided. A gas-modulated cyclic process is performed for more than three cycles. Each cycle comprises performing a protective layer forming phase using first gas chemistry with a deposition gas chemistry, which is performed in about 0.0055 to 7 seconds for each cycle and performing an etching phase for the feature through the etch mask using a second gas chemistry using a reactive etching gas chemistry, which is performed in about 0.005 to 14 seconds for each cycle. The protective layer forming phase comprises providing the deposition gas and forming a plasma from the deposition gas. Each etching phase comprises providing a reactive etching gas and forming a plasma from the reactive etching gas.