Abstract: A corrosion resistant component of semiconductor processing equipment such as a plasma chamber comprises zirconia toughened ceramic material as an outermost surface of the component. The component can be made entirely of the ceramic material or the ceramic material can be provided as a coating on a substrate such as aluminum or aluminum alloy, stainless steel, or refractory metal. The zirconia toughened ceramic can be tetragonal zirconia polycrystalline (TZP) material, partially-stabilized zirconia (PSZ), or a zirconia dispersion toughened ceramic (ZTC) such as zirconia-toughened alumina (tetragonal zirconia particles dispersed in Al2O3). In the case of a ceramic zirconia toughened coating, one or more intermediate layers may be provided between the component and the ceramic coating. To promote adhesion of the ceramic coating, the component surface or the intermediate layer surface may be subjected to a surface roughening treatment prior to depositing the ceramic coating.

Abstract: An apparatus and method for in-situ monitoring of thickness during chemical-mechanical polishing (CMP) of a substrate using a polishing tool and a film thickness monitor. The tool has an opening placed in it. The opening contains a monitoring window secured in it to create a monitoring channel. A film thickness monitor (comprising an ellipsometer, a beam profile reflectometer, or a stress pulse analyzer) views the substrate through the monitoring channel to provide an indication of the thickness of a film carried by the substrate. This information can be used to determine the end point of the CMP process, determine removal rate at any given circumference of a substrate, determine average removal rate across a substrate surface, determine removal rate variation across a substrate surface, and optimize removal rate and uniformity.

Abstract: A method for etching features in an integrated circuit wafer, the wafer incorporating at least one dielectric layer is provided. Generally, the wafer is disposed within a reaction chamber. An etchant gas comprising a hydrocarbon additive and an active etchant is flowed into the reaction chamber. A plasma is formed from the etchant gas within the reaction chamber. The feature is etched in at least a portion of the dielectric layer.

Abstract: A central controller for use in a semiconductor manufacturing equipment integrates a plurality of controllers with an open architecture allowing real-time communication between the various control loops. The central controller includes at least one central processing unit (CPU) executing high level input output (i/o) and control algorithms and at least one integrated i/o controller providing integrated interface to sensors and control hardware. The integrated i/o controller performs basic i/o and low level control functions and communicates with the CPU through a bus to perform or enable controls of various subsystems of the semiconductor manufacturing equipment.

Abstract: In a linear chemical mechanical planarization (CMP) system, a surface of each roller of a pair of rollers is disclosed which includes a first set of grooves covering a first portion of the surface of the roller where the first set of grooves has a first pitch that angles outwardly toward a first outer edge of the roller. The surface also includes a second set of grooves covering a second portion of the surface of the roller where the second set of grooves has a second pitch that angles outwardly toward a second outer edge of the roller with the second pitch angling away from the first pitch. The surface further includes a first set of lateral channels arranged along the first portion, and a second set of lateral channels arranged along the second portion. The first set of lateral channels crosses the first set of grooves, and the second set of lateral channels crosses the second set of grooves.

Abstract: A method for optimizing the planarizing length of a polishing pad is disclosed that includes forming a substantially constant network of islands and trenches into a first side of a polishing pad. The trenches are formed to a pre-determined distance apart. The polishing pad is fit to a chemical-mechanical polishing system. A surface layer of a semiconductor wafer is planarized with the first side of the polishing pad. Upon completion of the polishing process, the planarized wafer surface layer is observed. If the wafer surface layer is planarized to an amount outside of a set target polishing range, the distance between the trenches on the first side of the polishing pad is uniformly decreased. The above steps are repeated until the wafer surface layer is planarized to an amount within the set target polishing range.

Abstract: Liquid is removed from wafers for drying a wafer that has been wet in a liquid bath. The wafer and the bath are separated at a controlled rate as the wafer is positioned in a gas-filled volume. The controlled rate is generally not less than the maximum rate at which a meniscus will form between the liquid bath and the surface of the wafer when the liquid bath and the wafer are separated. The gas-filled volume is defined by a hot chamber that continuously transfers thermal energy to the wafer in the gas-filled volume. Hot gas directed into the volume and across the wafer and out of the volume continuously transfers thermal energy to the wafer.

Abstract: A method scales plasma process settings from a first processing device to a second processing device. The first processing device has a first geometry and a first set of process parameters. The second processing device has a second geometry and a second set of process parameters. A first set of plasma process settings that generates the first set of process parameters of the first processing device having the first geometry is determined. The first set of plasma process settings is reduced to isolate at least one variable on which the first set of plasma process settings depends on for each plasma process setting. A scaling factor is calculated for each plasma process setting from the first set of plasma process settings such that the first set of process parameters substantially equals the second set of process parameters.

Abstract: An asymmetric double-sided substrate scrubber is provided. The asymmetric double-sided substrate scrubber includes a first roller and a second roller. The first roller is constructed from a first material having a first density and the second roller is constructed from a second material having a second density. The second density is designed to be greater than the first density. The first roller is designed to be applied onto a first side of a substrate with a first force and the second roller is designed to be applied onto a second side of the substrate with a second force. The second force is configured to be substantially equivalent to the first force.

Abstract: Methods for preparing semiconductor wafers are provided. A method includes disposing a pair of wafer preparation assemblies in an opposing relationship in an enclosure. Each of the wafer preparation assemblies having a first wafer preparation member and a second wafer preparation member. The method includes disposing a semiconductor wafer between the wafer preparation assemblies in a vertical orientation and rotating the wafer. The method also includes orienting the wafer preparation assemblies such that the first wafer preparation members contact opposing surfaces of the rotating wafer in an opposing relationship, and orienting the wafer preparation assemblies such that the second wafer preparation members contact opposing surfaces of the rotating wafer in an opposing relationship.

Abstract: Methods and apparatus are provided for combining the manufacturing of a fixed-abrasive substrate and the chemical mechanical planarization of semiconductor wafers using a single process path.

Abstract: A semiconductor manufacturing process wherein an organic antireflective coating is etched with an O2-free sulfur containing gas which provides selectivity with respect to an underlying layer and/or minimizes the lateral etch rate of an overlying photoresist to maintain critical dimensions defined by the photoresist. The etchant gas can include SO2 and a carrier gas such as Ar or He and optional additions of other gases such as HBr. The process is useful for etching 0.25 micron and smaller contact or via openings in forming structures such as damascene structures.

Abstract: A method for preparing a semiconductor wafer surface is provided which includes providing a plurality of source inlets and a plurality of source outlets and applying isopropyl alcohol (IPA) vapor gas through the plurality of source inlets to the wafer surface when the plurality of source inlets and outlets are in close proximity to the wafer surface. The method also includes applying a fluid through the plurality of source inlets to the wafer surface while applying the IPA vapor gas, and removing the applied IPA vapor gas and fluid from the wafer surface through the plurality of source outlets.

Abstract: An invention is disclosed for end point triggering in a chemical mechanical polishing process. A sensor array is positioned beneath a polishing belt having an end point window. The polishing belt is then rotated during the CMP process, and a transverse position of the end point window is determined based on a portion of the sensor array covered by a particular portion of the polishing belt. The particular portion of the polishing belt can be the end point window, a trigger slot, or a portion of the polishing belt covered by a reflective material. The sensor array can optionally be a charged coupled device (CCD), or a linear array of sensors. In operation, the positional information is determined based on which sensors are covered by the particular portion of the polishing belt. The positional information is then communicated to a belt steering system, which corrects the transverse position of the end point window based on which sensors are covered by the particular portion of the polishing belt.

Abstract: A polishing tool includes a polish pad, a bladder, a fluid, and a flux guide. A bladder containing fluid supports the polishing pad that is positioned adjacent to a surface to be polished. Flux guides positioned along a portion of the bladder direct a field or a magnetic flux to selected locations of the bladder. The method of polishing a surface adjusts the field or the magnetic flux emanating from the flux guides which changes the mechanical properties of the fluid. By adjusting the magnitude of the field or level of magnetic flux flowing from the flux guides independent pressure adjustments occur at selected locations of the bladder that control the polishing profile of the surface.

Abstract: A corrosion resistant component of semiconductor processing equipment such as a plasma chamber includes a boron nitride/yttria composite containing surface and process for manufacture thereof.

Abstract: A bowl includes a bottom wall having a generally circular shape. A sidewall extends upwardly from the bottom wall to define a cylindrical chamber. The sidewall has a projection that extends into the cylindrical chamber. The projection has a top surface that defines a step in the cylindrical chamber and a sloped surface that extends between the top surface and an inner surface of the sidewall. The top surface of the projection is sloped slightly downwardly. The sloped surface of the projection is oriented relative to the top surface such that extensions of the top surface and the sloped surface define an angle in a range from about 30 degrees to about 45 degrees. A spin, rinse, and dry module including the bowl and a method for loading a semiconductor wafer into a spin, rinse, and dry module also are described.

Abstract: Systems and apparatus for evaluating the effectiveness of wafer drying techniques are provided. The systems and apparatus include a laser or any other source configured to apply light radiation to the surface of a substrate that has been rinsed with a solution containing an analytically detectable compound prior to a drying process. Any residue of the analytically detectable compound is excited by the source, and the resulting energy is imaged with a confocal microscope or similar device to identify regions of the surface of the substrate of ineffective drying.

Abstract: A method of producing a chemical mechanical planarization (CMP) polishing belt structure is disclosed that includes forming a strip of substantially rigid material into a support belt having an interior surface and an exterior surface. At least a portion of the exterior surface of the support belt is altered to form a plurality of gripping members integral with the exterior surface of the support belt. An interior surface of a seamless CMP belt is applied to the exterior surface of the support belt such that the plurality of gripping members engage the interior surface of the seamless CMP belt in a non-slip grip.

Abstract: A method is described comprising removing an oxide from a surface and then commencing application of a passivation layer to the surface within 5 seconds of the oxide removal. The surface may be a copper surface which may further comprise a bonding pad surface. Removing the oxide may further comprise applying a solution comprising citric acid or hydrochloric acid. Applying the passivation layer may further comprise applying a solution comprising a member of the azole family where the azole family member may further comprise BTA. The method may also further comprise completely applying the passivation layer 35 seconds after commencing its application.