Patents Assigned to Lapis Semiconductor Co., Ltd.
  • Publication number: 20220199048
    Abstract: A display driver drives a display device including a plurality of data lines and a demultiplexer. The demultiplexer includes a plurality of first switches connected to the respective plurality of data lines, and a series of driving voltages including a plurality of driving voltages is supplied via a first wiring. The demultiplexer supplies the plurality of driving voltages to the respective plurality of data lines via the plurality of first switches. The display driver includes: a voltage multiplexing part that generates the series of driving voltages; a second switch connected between the voltage multiplexing part and the first wiring; and a controller connected to the plurality of first switches and the second switch.
    Type: Application
    Filed: April 10, 2020
    Publication date: June 23, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroyoshi ICHIKURA
  • Patent number: 11368128
    Abstract: A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: June 21, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Masayuki Otsuka
  • Patent number: 11367407
    Abstract: A display driver according to the present invention includes a control part and a fault detection circuit. The control part sequentially incorporates first fault detection data and second fault detection data into a video signal during non-display periods of the video signal. The fault detection circuit binarizes each of a first pixel driving voltage and a second pixel driving voltage with a predetermined threshold voltage to obtain a first signal and a second signal. The first pixel driving voltage is generated based on the first fault detection data. The second pixel driving voltage is generated based on the second fault detection data. The fault detection circuit determines whether the first signal and the second signal match and outputs a fault detection signal that indicates a presence of a fault when the first signal and the second signal match.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: June 21, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroaki Ishii
  • Patent number: 11368642
    Abstract: A method of manufacturing a semiconductor device and a method of manufacturing a solid-state imaging device, including preparing an SOI wafer in which a silicon layer is disposed on an FZ wafer that is a silicon wafer manufactured according to an FZ method, with an insulation layer being interposed between the silicon layer and the FZ wafer, removing a part of the silicon layer, as an element isolation region, to form a trench for division of the silicon layer, and forming plural circuit elements that each include at least a part of the silicon layer other than the element isolation region, and which are isolated from each other by the element isolation region.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: June 21, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Noriyuki Miura
  • Patent number: 11360041
    Abstract: A reference electrode is provided with an accommodation portion that is provided with a tube-shaped lead-out portion that can guide an accommodated internal liquid; a liquid junction portion that is connected to an end of the lead-out portion, and that allows the internal liquid to seep out; a liquid dripping portion that has a first end connected to the liquid junction portion, that has a second end that protrudes into the accommodation portion, and that guides the internal liquid to the liquid junction portion; and an internal electrode having at least a portion that is positioned further towards the first end side than the second end of the liquid dripping portion.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: June 14, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Masao Okihara
  • Publication number: 20220182550
    Abstract: An imaging device and a horizontal direction detection method capable of detecting a horizontal angle of a camera with high accuracy in a simple configuration are provided. The imaging device includes an imaging unit configured to obtain image data by photographing a predetermined subject, an image rotation unit configured to cause a display image based on the image data to be rotated on a display plane step by step, a count unit configured to count the number of pixels of a specific color included in the display image in a scanning line direction within the display plane and obtain a count value for each of rotated display images, and a determination unit configured to determine a horizontal direction of a photographing angle of the imaging unit based on the count value for each of the rotated display images.
    Type: Application
    Filed: February 21, 2022
    Publication date: June 9, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Yuki Imatoh
  • Patent number: 11356113
    Abstract: A digital-to-analog conversion circuit includes: a decoder that, if set to a first selection state, selects two different reference voltages from a reference voltage group on the basis of a digital data signal and outputs the two reference voltages as first and second selection voltages, and if set to a second selection state, selects two reference voltages from the reference voltage group in a manner allowing redundancy and outputs the two reference voltages as the first and second selection voltages; and an amplifier circuit that amplifies and outputs a voltage obtained by averaging a combination of the first and second selection voltages with weighting factors set in advance.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: June 7, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroshi Tsuchi
  • Publication number: 20220171227
    Abstract: An output circuit is provided, including: a positive polarity voltage signal supplying circuit to supply or block the supply of a positive polarity voltage signal having a voltage higher than a reference power source voltage to a first node; a negative polarity voltage signal supplying circuit to supply or block the supply of a negative polarity voltage signal having a voltage lower than the reference power source voltage to a second node; a first switch of which a source is connected to the first node and a drain is connected to a first output terminal; a second switch of which a source is connected to the second node and a drain is connected to the first output terminal; and third and fourth switches; a first and a second voltage control circuits respectively performing on-off control of the first and second switches.
    Type: Application
    Filed: February 21, 2022
    Publication date: June 2, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroshi TSUCHI
  • Publication number: 20220172675
    Abstract: A display driving device includes a high voltage operating unit obtaining an operating current according to the application of the high power supply voltage from the first voltage application line; a low voltage operating unit that operates according to an application of a low power supply voltage to control the high voltage operating unit; a recycling circuit that receives the operating current from the high voltage operating unit via a relay coupling line and applies the low power supply voltage to the low voltage operating unit while supplying the received operating current to a reference potential line via the low voltage operating unit; and a current bypass circuit that flows a part of the operating current flowing through the relay coupling line into the reference potential line without supplying the part of the operating current to the recycling circuit according to a voltage increase in the low power supply voltage.
    Type: Application
    Filed: March 30, 2020
    Publication date: June 2, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Hiroyoshi ICHIKURA
  • Patent number: 11347257
    Abstract: An output signal generation circuit includes a first pulse generation circuit configured to receive first information and generate a first pulse signal including the first information, the first pulse signal having a first pulse width that is a minimum pulse width of the first pulse signal, a second pulse generation circuit configured to receive second information and the first pulse signal, and generate a second pulse signal in which the second information is superimposed on the first pulse signal, the second pulse signal having a second pulse width smaller than the first pulse width, and an output circuit configured to output the second pulse signal.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: May 31, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenjiro Matoba, Kazuhiro Yamashita
  • Patent number: 11341886
    Abstract: The present invention includes: a first decoder that outputs mutually different two voltages as first and second selection voltages based on a first bit group of a digital data signal in a first selection state, and outputs one or both of the two voltages as the first and the second selection voltages in a second selection state; a second decoder that outputs mutually different two voltages as third and fourth selection voltages based on a second bit group of the digital data signal in the first selection state and outputs one voltage based on the second bit group as the third and the fourth selection voltages in the second selection state; and an amplifier circuit that averages a combination of the first and the second selection voltages or the third and the fourth selection voltages with predetermined weighting ratios and outputs the averaged voltage.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: May 24, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroshi Tsuchi
  • Patent number: 11328683
    Abstract: A display device has: a display panel; a source driver group including 2j source drivers that are arranged in the lengthwise direction of gate lines; and a display controller that is connected to the 2j source drivers via j data supply lines provided in common between adjacent pairs of source drivers. The display controller outputs j pixel data piece groups, into which m/2 pixel data pieces were divided, to the data supply lines. The (2k)th source driver receives m/(4j) pixel data pieces via a data supply line, and receives three pixel data pieces from the (2k+1)th source driver. The (2k)th source driver generates m/(2j) of gradation voltage signals on the basis of the pixel data pieces.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: May 10, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Daisei Nagata
  • Publication number: 20220130772
    Abstract: A semiconductor device, including: a semiconductor substrate formed of silicon carbide, components being formed at one surface of the semiconductor substrate; a periphery portion disposed at a pre-specified region of a periphery of the semiconductor substrate, the components not being formed at the periphery portion; and a plurality of trenches or portions of trenches formed at the periphery portion, an interior of each of the trenches being filled with a material with a different coefficient of thermal expansion from the silicon carbide.
    Type: Application
    Filed: October 21, 2021
    Publication date: April 28, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi FURUTA, Masao TSUJIMOTO, Nobuhiro TERADA, Masahiro HARAGUCHI, Tsuyoshi INOUE, Yuuichi KANEKO, Hiroki KUROKI, Takaaki KODAIRA
  • Patent number: 11315517
    Abstract: A modulated data signal is generated so as to change such that a length of a data period indicative of a timing of writing of the gradation voltage signal to each of the pixel portions becomes a length according to a distance from the data driver to each of the pixel portions. The timing control unit writes a video data signal to a memory at a timing according to a data period of the video data signal. The timing control unit reads the video data signal from the memory at a timing according to a period as a result of correction of a data period of the modulated data signal on the basis of a difference between an average value of lengths of the data periods of the video data signals and an average value of lengths of the data periods of the modulated data signals.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: April 26, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Keita Watanabe
  • Patent number: 11309234
    Abstract: A semiconductor device includes: an oscillator including external terminals disposed on a first face with a specific distance along a first direction; an integrated circuit including a first region formed with first electrode pads along one side, and a second region formed with second electrode pads on two opposing sides of the first region; a lead frame that includes terminals at a peripheral portion, and on which the oscillator and the integrated circuit are mounted such that the external terminals, the first and second electrode pads face in a substantially same direction and such that one side of the integrated circuit is substantially parallel to the first direction; a first bonding wire that connects one external terminal to one first electrode pad; a second bonding wire that connects one terminal of one lead frame to one second electrode pad; and a sealing member that seals all of the components.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: April 19, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Toshihisa Sone, Kazuya Yamada, Akihiro Takei, Yuichi Yoshida, Kengo Takemasa
  • Publication number: 20220114982
    Abstract: A display device and data driver are provided. The display device includes a plurality of data drivers provided for a predetermined number of data lines in a plurality of data lines. The plurality of data drivers receive the serialized video data signal from the display controller, generate a modulated data timing signal whose period changes within the one frame period, and supply a gradation voltage signal to each of the predetermined number of data lines for each of data periods based on a data timing of the modulated data timing signal, each of data periods corresponding to the data timing of the modulated data timing signal.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 14, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Hiroshi TSUCHI, Koji Higuchi
  • Publication number: 20220102338
    Abstract: A high-density source region is formed along a surface of a semiconductor substrate and is connected to either one of a power source line and ground line. A low-density source region has an exposed surface at a surface of the semiconductor substrate and is in contact with the high-density source region. A high-density drain region is formed along the surface of the semiconductor substrate and is connected to the other one of the power source line and the ground line. A low-density drain region has an exposed surface at the surface of the semiconductor substrate, is in contact with the high-density drain region, and extends to a deeper region from the surface of the semiconductor substrate than does the low-density source region. A gate electrode is connected to either one of the power source line and the ground line.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 31, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Masahiko HIGASHI, Marie MOCHIZUKI
  • Publication number: 20220102300
    Abstract: The semiconductor device according to the present invention comprises; a semiconductor element having one surface with a plurality of electrode pads; an electrode structure including a plurality of metal terminals and a sealing resin. The plurality of metal terminals being disposed in a region along a circumference of the one surface. The sealing resin holding the plurality of metal terminals and being disposed on the one surface of the semiconductor element. The electrode structure includes a first surface opposed to the one surface of the semiconductor element, a second surface positioned in an opposite side of the first surface, and a third surface positioned between the first surface and the second surface. Each of the plurality of metal terminals is exposed from the sealing resin in at least a part of the second surface and at least a part of the third surface.
    Type: Application
    Filed: September 28, 2021
    Publication date: March 31, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Takashi SHIMADA
  • Patent number: 11289744
    Abstract: A battery monitoring system prevents damage to a device utilizing stacked battery cells, reduces the time required for battery replacement, and increases the capacity and reduces the size of the battery monitoring system. A battery unit includes: two or more battery cells configured to generate a DC voltage; two or more measurement units configured to measure a voltage value of the two or more battery cells and obtain measurement signals representing a measurement result; two or more transmission loop antennas configured to generate an AC magnetic field corresponding to the measurement signals; a reception loop antenna configured to receive the AC magnetic fields and generate a reception signal corresponding to the AC magnetic fields; a receiver configured to demodulate the reception signal to generate information representing the measurement results; and a magnetic core that runs through the transmission loop antennas and the reception loop antenna.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: March 29, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Hiroji Akahori
  • Patent number: 11284004
    Abstract: An imaging device and a horizontal direction detection method capable of detecting a horizontal angle of a camera with high accuracy in a simple configuration are provided. The imaging device includes an imaging unit configured to obtain image data by photographing a predetermined subject, an image rotation unit configured to cause a display image based on the image data to be rotated on a display plane step by step, a count unit configured to count the number of pixels of a specific color included in the display image in a scanning line direction within the display plane and obtain a count value for each of rotated display images, and a determination unit configured to determine a horizontal direction of a photographing angle of the imaging unit based on the count value for each of the rotated display images.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: March 22, 2022
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventor: Yuki Imatoh