Patents Assigned to Lapis Semiconductor Co., Ltd.
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Patent number: 11756912Abstract: A semiconductor device includes an SiC semiconductor substrate including a diffusion layer, a first electrode provided on the SiC semiconductor substrate, a second electrode provided on the first electrode, and a resin section that is substantially the same size in a plan view as the SiC semiconductor substrate, and that is configured to seal in the second electrode.Type: GrantFiled: June 17, 2021Date of Patent: September 12, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Taiichi Ogumi
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Patent number: 11745651Abstract: A communication controller that receives moving body related information detected by a sensor and transmits a parameter for generating a sound based on this moving body related information, and a sound generating unit that includes a circuit that generates a basic sound signal having a predetermined sound waveform, receives the parameter received by the communication controller, and outputs a sound signal obtained by adjusting the sound waveform of the basic sound signal based on the received parameter.Type: GrantFiled: September 28, 2020Date of Patent: September 5, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Hiroji Akahori
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Patent number: 11742305Abstract: A semiconductor device includes a lower insulating layer formed on a primary surface of a semiconductor substrate; a sealing layer formed in contact with a top surface of the lower insulating layer; and a conductive member including a first conductive member formed on the sealing layer and having a first film thickness and a second conductive member formed on the sealing layer in contact with a first conductive member and having a second film thickness that is smaller than the first film thickness.Type: GrantFiled: April 12, 2021Date of Patent: August 29, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Masanori Shindo
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Patent number: 11741915Abstract: The disclosure includes bus wiring constituted by wiring lines; a gradation voltage generation circuit that generates M gradation voltages representing brightness levels with M gradations, and applies the M gradation voltages to an intermediate portion on M wiring lines belonging to the bus wiring; a plurality of decoders, each of which receives M gradation voltages via the M wiring lines and selects one of the M gradation voltages according to the pixel data pieces to output the selected gradation voltage; a plurality of output amplifiers that individually amplifies the voltages output from the plurality of decoders and generates the amplified voltages as the plurality of pixel drive voltages; and first and second inter-gradation short circuits that short-circuit one ends of each of the M wiring lines and the other ends of each of the M wiring lines according to a load signal for capturing the pixel data pieces.Type: GrantFiled: May 31, 2022Date of Patent: August 29, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventors: Kenichi Shiibayashi, Keigo Otani
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Patent number: 11733204Abstract: A reference electrode including a casing through which one face at one side of a liquid junction that leaches an internal liquid is exposed, the casing being provided with an overhang portion that hangs out on the one face side of the liquid junction and prevents separation of the liquid junction from the casing; and an open portion that leaves a space on the one side of the liquid junction open toward a lateral direction along the one face.Type: GrantFiled: June 24, 2021Date of Patent: August 22, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Kazuhiro Nakano
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Patent number: 11728770Abstract: A semiconductor device including a first inverter circuit connected in parallel to a crystal vibrating element; a second inverter circuit connected to the first inverter circuit so as to share an input therewith, and outputting an oscillation signal; and a wave filter connected to the second inverter circuit and having a passband that is determined in advance and includes an oscillation frequency of the oscillation signal.Type: GrantFiled: June 15, 2020Date of Patent: August 15, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Koki Nakanishi
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Patent number: 11726356Abstract: An output circuit is provided, including: a positive polarity voltage signal supplying circuit to supply or block the supply of a positive polarity voltage signal having a voltage higher than a reference power source voltage to a first node; a negative polarity voltage signal supplying circuit to supply or block the supply of a negative polarity voltage signal having a voltage lower than the reference power source voltage to a second node; a first switch of which a source is connected to the first node and a drain is connected to a first output terminal; a second switch of which a source is connected to the second node and a drain is connected to the first output terminal; and third and fourth switches; a first and a second voltage control circuits respectively performing on-off control of the first and second switches.Type: GrantFiled: February 21, 2022Date of Patent: August 15, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Hiroshi Tsuchi
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Patent number: 11728815Abstract: A semiconductor device outputs, as an output signal synchronized to a phase-locked loop clock signal, a synchronized input signal that is synchronized to a reference clock signal of a phase-locked loop circuit. The semiconductor device includes the phase-locked loop circuit, a first flip-flop that receives the input signal in synchronization with the reference clock signal on the basis of a feedback signal inputted to a phase comparator of the phase-locked loop circuit 10, and a second flip-flop that receives an output from the first flip-flop on the basis of the phase-locked loop clock signal. The second flip-flop outputs the output from the first flip-flop as the output signal. A setup time to synchronize the input signal to the phase-locked loop clock signal is set to one half of a period of the reference clock signal.Type: GrantFiled: November 29, 2021Date of Patent: August 15, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Junya Ogawa, Katsuaki Matsui
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Publication number: 20230253326Abstract: A foundation portion and a conductive base portion disposed on the foundation portion are formed on a temporary support, a semiconductor element electrically connected to the base portion is disposed on a side of the temporary support on which the foundation portion and the base portion are formed, and an insulating layer coming into a state of burying the foundation portion, the base portion, and the semiconductor element is formed on the temporary support. Subsequently, surfaces of the foundation portion and the insulating layer on a side of the temporary support are exposed by removing the temporary support, and the exposed foundation portion is further removed, thereby disposing the base portion in a state of being more recessed than the surface of the insulating layer. An external connection terminal is formed on the exposed base portion to manufacture the semiconductor package.Type: ApplicationFiled: April 17, 2023Publication date: August 10, 2023Applicant: LAPIS Semiconductor Co., Ltd.Inventor: Masanori Shindo
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Patent number: 11719756Abstract: A battery monitoring system includes a plurality of battery cells connected in series; a cell voltage measurement circuit for measuring a voltage of the battery cells; a first terminal connected to the cell voltage measurement circuit; a second terminal isolated from the cell voltage measurement circuit; a plurality of protection elements each corresponding to each of the battery cells; and a protection circuit connected to the second terminal for discharging an electric current from the protection elements through the second terminal.Type: GrantFiled: June 23, 2021Date of Patent: August 8, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Naoaki Sugimura
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Patent number: 11711889Abstract: A shield case, joined to a circuit board on which electronic components are mounted and covering the electronic components, has a top plate portion covering the electronic components, and a plurality of terminal leg portions formed in a way of projecting in a direction intersecting with the top plate portion from a peripheral edge portion of the top plate portion. Each of the plurality of terminal leg portions has: a leg portion stretching from the top plate portion; a terminal portion which extends in a direction intersecting with the leg portion from a front-end of the leg portion and is joined to the circuit board; and an expansion terminal portion which is formed by bending a front-end portion of each of the terminal portions along an end surface of the circuit board and has a length exceeding a thickness of the circuit board.Type: GrantFiled: March 24, 2021Date of Patent: July 25, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Mitsuhiro Nakamura
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Patent number: 11705415Abstract: A semiconductor device includes: a first semiconductor chip; plural redistribution lines provided on a main face of the first semiconductor chip, the plural redistribution lines including a redistribution line that includes a first land and a redistribution line that includes a second land; a first electrode provided within the first land, one end of the first electrode being connected to the first land, and another end of the first electrode being connected to an external connection terminal; and a second electrode provided within the second land, one end of the second electrode being connected to the second land, wherein a shortest distance between an outer edge of the second land and an outer edge of the second electrode, is less than, a shortest distance between an outer edge of the first land and an outer edge of the first electrode.Type: GrantFiled: May 25, 2021Date of Patent: July 18, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Taiichi Ogumi
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Patent number: 11688896Abstract: A cell count determination device is configured to determine a cell count of a battery pack having installed therein a plurality of battery cells. The cell count determination device includes a plurality of switch elements provided in association with the plurality of battery cells, which can be increased or decreased in number in the battery pack. Each of the switch elements is configured to enter a conductive state if, while connected to the battery pack, a corresponding battery cell is present, and enter a non-conductive state if the corresponding battery cell is not present. The cell count determination device further includes a determination unit that is configured to determine the cell count of the connected battery pack on the basis of a combination of conductive states and non-conductive states among the plurality of switch elements.Type: GrantFiled: October 22, 2020Date of Patent: June 27, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Hisao Ohtake, Koji Suzuki
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Patent number: 11678139Abstract: Provided is a traveling direction determination device that determines, using an acceleration sensor that generates acceleration signals indicating acceleration in three axial directions together with a direction of the acceleration, a traveling direction of a moving object mounted with the acceleration sensor, the traveling direction determination device comprising a determination unit that executes a first determination process in which the determination unit selects, using the acceleration signals, any of the three axes as a gravity axis, the gravity axis being closest to an actual gravity direction of the moving object to determine a gravity direction of the moving object and a second determination process in which the determination unit selects either of the two axes excluding the axis selected as the gravity axis, as a travel axis, the travel axis being closest to an actual traveling direction of the moving object based on moving average values of the acceleration signals to determine the traveling direType: GrantFiled: March 3, 2021Date of Patent: June 13, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Kazunori Fujiwara
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Patent number: 11675652Abstract: To provide a semiconductor device having a monitoring function with a higher degree of freedom. The semiconductor device includes: a function part that executes a predetermined process triggered according to an activation signal sent from an external device and outputs a completion signal after the predetermined process is completed; a first clocking part that monitors a first abnormality in the predetermined process based on the activation signal and the completion signal; and a branch part pair including a first branch part and a second branch part, wherein the first branch part branches the activation signal and then sends the branched activation signal to the function part and the first clocking part, and the second branch part branches the completion signal and then sends the branched completion signal to the first clocking part and the external device.Type: GrantFiled: March 29, 2021Date of Patent: June 13, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Hiroji Akahori
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Patent number: 11674857Abstract: A semiconductor device includes first and second electrode pads for externally connecting two electrodes of a sensor capacitor that has a capacitance that changes according to an environmental change. The semiconductor device further includes a capacitor having a pair of electrodes, one of the pair of electrodes being connected to the first electrode pad, a capacitance circuit having a reference capacitance, and a determination circuit that includes first and second relay terminals. The determination circuit is configured to send a charging current from the first relay terminal to the other electrode of the capacitor and send a charging current from the second relay terminal to the capacitance circuit, and determine whether or not the size of a potential of the first relay terminal is greater than the size of a potential of the second relay terminal, thereby determining whether a capacitance of the sensor capacitor has changed or not.Type: GrantFiled: October 22, 2020Date of Patent: June 13, 2023Assignee: LAPIS SEMICONDUCTOR CO., LTD.Inventor: Masayuki Otsuka
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Patent number: 11676527Abstract: A display driver is provided. A designation of an output timing at each of first and kth output channels is received, and first and second delay pulse signals are generated at respective output timings of the first and the kth output channels. First to kth first direction delay shift signals where a first delay pulse signal is present after a delay increased for each output channel from the first toward the kth output channel are generated. First to kth second direction delay shift signals where a second delay pulse signal is present after the delay increased for each output channel from the kth toward the first output channel are generated. One whose timing at which a delay pulse signal is present is earlier is selected from each of the direction delay shift signals corresponding to the same output channel, and set as first to kth output timing signals.Type: GrantFiled: August 17, 2021Date of Patent: June 13, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Koji Higuchi
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Patent number: 11670216Abstract: A digital-to-analog conversion circuit, a data driver including the same, and a display device are provided. The circuit includes: a reference voltage generation part, generating a reference voltage group having different voltage values; a decoder, selecting and outputting multiple reference voltages with overlapping from the reference voltage group based on the digital data signal; an amplification circuit, where m (m being an integer of 1 or more and less than x) of first to xth input terminals respectively receive m of multiple reference voltages, and, as an output voltage, a voltage amplified by averaging the voltages respectively received by the first to xth input terminals with predetermined weighting ratios is output; and a selector, which, in a first selection state, supplies the output voltage to (x-m) input terminals among the first to xth input terminals, and in a second selection state, supplies the reference voltages to the (x-m) input terminals.Type: GrantFiled: July 19, 2021Date of Patent: June 6, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Hiroshi Tsuchi
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Patent number: 11664314Abstract: A foundation portion and a conductive base portion disposed on the foundation portion are formed on a temporary support, a semiconductor element electrically connected to the base portion is disposed on a side of the temporary support on which the foundation portion and the base portion are formed, and an insulating layer coming into a state of burying the foundation portion, the base portion, and the semiconductor element is formed on the temporary support. Subsequently, surfaces of the foundation portion and the insulating layer on a side of the temporary support are exposed by removing the temporary support, and the exposed foundation portion is further removed, thereby disposing the base portion in a state of being more recessed than the surface of the insulating layer. An external connection terminal is formed on the exposed base portion to manufacture the semiconductor package.Type: GrantFiled: March 12, 2020Date of Patent: May 30, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Masanori Shindo
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Patent number: 11659270Abstract: An imaging device and a horizontal direction detection method capable of detecting a horizontal angle of a camera with high accuracy in a simple configuration are provided. The imaging device includes an imaging unit configured to obtain image data by photographing a predetermined subject, an image rotation unit configured to cause a display image based on the image data to be rotated on a display plane step by step, a count unit configured to count the number of pixels of a specific color included in the display image in a scanning line direction within the display plane and obtain a count value for each of rotated display images, and a determination unit configured to determine a horizontal direction of a photographing angle of the imaging unit based on the count value for each of the rotated display images.Type: GrantFiled: February 21, 2022Date of Patent: May 23, 2023Assignee: LAPIS Semiconductor Co., Ltd.Inventor: Yuki Imatoh