Abstract: A test and measurement apparatus is provided including a control panel; and a display. The display includes a first portion and a second portion. The second portion of the display is covered by the control panel. The control panel is adjustable to reveal at least a portion of the second portion of the display. The second portion of the display is inoperable when covered by the control panel and is operable when revealed.

Abstract: An artifact signal correction system may include a mixing component to generate a waveform corresponding to an artifact such as an error tone, whereupon that waveform may be combined with the input waveform to substantially eliminate the artifact. In preferred embodiments, a method and apparatus for reducing spurious tones in systems of mismatched interleaved digitizers due to interleave error is provided. In various embodiments the method may include reversing the frequency content of an input signal, converting the reversed signal into interleave artifact content, delaying the input signal along a parallel path, and then subtracting the interleave content from the delayed input signal.

Abstract: A device emulator configured to emulate an electronic device to test a computing device. The device emulator includes a plurality of read-write registers that are user configurable to include a set of read registers and a set of write registers, wherein the set of write registers are configured to receive a plurality of requests from the computing device, and wherein the set of read registers are configured to transfer one or more conditional responses of a plurality of conditional responses to the computing device based on the requests; a set of control logic configured to receive the requests from the set of write registers and transfer the conditional responses to the set of read registers; and a circuit device that includes the read-write registers and the set of control logic, wherein the circuit device is configured to operate the control logic to emulate the electronic device.

Abstract: Apparatus and associated systems and methods may relate to a wide bandwidth cable assembly that may include an active amplification stage to receive high frequency signals (e.g., 1 GHz or above) through a transmission line extending distally to a passive, high density signal probe stage. In an illustrative example, the probe stage may receive multiple analog or digital signals from a device under test (DUT). In some embodiments, the probe stage may include probe pins with integrated series resistance to control signal loading, and an equalizer to shape the signal path's frequency response. The amplification stage may provide a virtual ground reference for a termination impedance that may match the transmission line's impedance and may connect in series with a feedback impedance. In one example, a minimally invasive probe head may facilitate measurement of multiple channels of a high speed data bus with minimal signal distortion and/or attenuation.

Abstract: A signal processing system may compensate for the relative phase difference between multiple frequency bands so that the combination of the bands is constructive throughout a substantial portion of the band overlap or crossover region. In one embodiment, a signal combining system may include a comparator for determining a relative phase difference between the two signals within a predefined crossover region, a phase adjusting element for adjusting a phase of one of the two signals; and a combiner for combining the phase-adjusted signal and the other of the two signals.

Abstract: A method for improving bandwidth of an oscilloscope involves, in preferred embodiments, the use of frequency up-conversion and down-conversion techniques. In an illustrative embodiment the technique involves separating an input signal into a high frequency content and a low frequency content, down-converting the high frequency content in the analog domain so that it may be processed by the oscilloscope's analog front end, digitizing the low frequency content and the down-converted high frequency content, and forming a digital representation of the received analog signal from the digitized low frequency content and high frequency content.

Abstract: A system and method for compensation of deterministic jitter in measurements made when utilizing a plurality of time interleaved analog-to-digital converters (ADCs). The system includes edge timing measurement error information for each of the plurality of time interleaved ADCs and a processing element for converting a measured edge time of one or more edges of a waveform into a corrected edge time. The processing element determines the corrected edge time by subtracting the edge timing measurement error corresponding to one or more of the time interleaved ADCs.

Abstract: A method and apparatus for evaluating data are provided. The method comprises the steps of acquiring waveform data, performing one or more measurements on the waveform data to generate measurement data, applying a filter to the generated measurement data and generating a histogram in accordance with the filtered measurement data. One or more rarest values from the histogram are designated in accordance with the filtered measurement data, and an additional filter is generated in accordance with the one or more designated rarest values. The additional filter is applied to the generated measurement data.

Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.

Abstract: A waveform processing system may include a compensation circuit to adjust a voltage supplied to an output stage, wherein a supplied voltage is controlled to substantially maintain constant power dissipation in the output stage, and wherein the compensation circuit is configurable independently from the amplification stage. In an illustrative embodiment, a control circuit may be independently configurable with respect to an amplifier that generates a signal for the output stage, and the control circuit may bias a compensation circuit that provides thermal tail compensation for an output stage transistor. In some embodiments, the bias may operate the compensation circuit (i) to maintain a substantially constant power condition in the output stage transistor to substantially reduce thermal tail effects, and (ii) to maintain the output stage transistor in an unsaturated operating condition.

Abstract: A method and apparatus for correcting for deterministic jitter in a sequential sampling timebase. The value of a fine analog delay is held at a substantially constant nominal rate during a duration of a counting of a digital clock. A time difference between a trigger at which a fine analog delay starts measuring time and the occurrence of a digital pulse of a stable clock used to count a coarse delay is measured. An input waveform is sampled at a sample time having a nominal delay time. After sampling, a desired compensation time is provided for the sample of the input waveform in accordance with combinations of three independent variables defining a calibration table. The waveform is reconstructed by shifting a delay time of a sampled value of the input waveform from its nominal delay time in accordance with a value defined by the calibration table.

Abstract: In one implementation, a termination circuit may include a variable resistance circuit that comprises a resistance network in which the resistance of a parallel combination of two complementary transistors of opposite types is substantially independent of the drain-to-source voltages of the transistors when the gate-to-source voltages of the transistors are substantially equal in magnitude and opposite in sign. In various examples, the network may include a resistor in parallel and/or series with the transistors. Some implementations may adjust a resistance of the network in response to a digital-to-analog converter output signal. In another implementation, an integrated circuit may include a termination stage with an integrated resistor in parallel or series with a circuit having a tunable impedance. In an illustrative embodiment, relative channel width of the first and second transistors may be selected to realize substantially complementary characteristics for drain-to-source voltage vs.

Abstract: A method and apparatus for generating one or more transfer functions for converting waveforms. The method comprises the steps of determining a system description, representative of a circuit, comprising a plurality of system components, each system component comprising at least one component characteristic, the system description further comprising at least one measurement node and at least one output node, each of the at least one measurement nodes representative of a waveform digitizing location in the circuit. One or more transfer functions are determined for converting a waveform from one or more of the at least one measurement nodes to a waveform at one or more of the at least one output nodes. The generated transfer functions are then stored in a computer readable medium.

Abstract: A test probe tip constructed substantially from resistive material. The resistive material is made of resistive conducting material substantially enclosed in and dispersed throughout encapsulating material. The test probe tip has a probing end for probing electronic circuitry and a connection end for interfacing with a probing head. The resistive conducting material forms at least one path through the encapsulating material from the probing end to the connection end. The resistive conducting material may be a plurality of longitudinally-extending resistive/conductive members or a plurality of particulate resistive/conductive members.

Abstract: A guide for tip to transmission path contact includes a guide insulator having at least one passageway defined therein. Each passageway has a tip passageway end and a transmission path passageway end. The tip passageway end is suitable for at least partially accommodating the tip of a probing head. The transmission path passageway end is suitable for at least partially accommodating a transmission path of a circuit board component. The tip contacts a transmission path through a passageway when the transmission path is positioned in the transmission path passageway end and the tip is positioned within the tip passageway end.

Abstract: A method and apparatus for probing an electrical signal. The apparatus comprises simplified circuit, comprising an input pin for receiving an input signal having an inductance and parasitic capacitance associated therewith and a first resistor coupled between the input pin and an output. A first capacitor is coupled between the first resistor and the output, and a ground. A second capacitor and an associated inductance in series are coupled between the junction of the first resistor and first capacitor and a parallel circuit arrangement. The parallel circuit comprises a second resistor and second associated inductance coupled in parallel between the first inductor and ground.

Abstract: A method and apparatus for displaying substantially noise-free segments of serial data waveforms. The method comprises the steps of dividing an acquired waveform into a plurality of waveform slices and categorizing each of the plurality of waveform slices according to at least a sequence of N bit values prior to a bit value being observed. The waveform slices in each category are then averaged resulting in an average pattern for each category. Each of the averaged patterns is then displayed on a display in an overlayed manner.

Abstract: A method and apparatus for acquiring an analog signal. The method of the invention comprising the steps of acquiring a first portion of the analog signal by a first channel, the first portion of the analog signal spanning a first bandwidth range, and acquiring a second portion of the analog signal by a second channel, the second portion of the analog signal spanning a second bandwidth range adjacent the first bandwidth range. At least one spur in the signal acquired by the first channel corresponding to a portion of the analog signal that should have properly been acquired by the second channel is offset with an opposite spur in the second channel.

Abstract: A method and apparatus for acquiring an analog signal. The method of the invention comprising the steps of acquiring a first portion of the analog signal by a first channel, the first portion of the analog signal spanning a first bandwidth range, and acquiring a second portion of the analog signal by a second channel, the second portion of the analog signal spanning a second bandwidth range adjacent the first bandwidth range. At least one spur in the signal acquired by the first channel corresponding to a portion of the analog signal that should have properly been acquired by the second channel is offset with an opposite spur in the second channel.

Abstract: A lossy dielectric device dissipates, absorbs, and/or dampens electric fields. The lossy dielectric device may be used with any transmission path, such as a transmission line or resistor in a probe head. The lossy dielectric device preferably includes a lossy dielectric material contained within a container. The container is positionable and securable substantially adjacent the transmission path to improve the curve of a frequency response. Preferably, the container is insulative, puncture resistant, and thin. In some preferred embodiments, a temporary or permanent connection mechanism is also included.