Patents Assigned to Lightmatter, Inc
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Publication number: 20230388024Abstract: Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.Type: ApplicationFiled: March 27, 2023Publication date: November 30, 2023Applicant: Lightmatter, Inc.Inventors: Mykhailo Tymchenko, Bradford Turcott, Robert Turner, Binoy Shah, Shashank Gupta, James Carr, Ajay Joshi, Nicholas C. Harris, Darius Bunandar
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Publication number: 20230358957Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.Type: ApplicationFiled: July 21, 2023Publication date: November 9, 2023Applicant: Lightmatter, Inc.Inventors: Nicholas C. Harris, Carl Ramey, Michael Gould, Thomas Graham, Darius Bunandar, Ryan Braid, Mykhailo Tymchenko
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Publication number: 20230352465Abstract: Photonic processors are described herein that are configured to perform matrix-matrix (e.g., matrix-vector) multiplication by directly encoding a first value in the output of the light source. Some embodiments relate to a photonic device configured to perform a mathematical operation, the photonic device comprising a modulatable light emitting diode (LED) and a modulatable detector. The modulatable LED being configured to emit light. The modulatable detector being optically coupled to an output of the modulatable LED. The photonic device further comprising, a controller being configured to encode a first value in the light emitted by the modulatable LED and to encode a second value in a characteristic of the modulatable detector; and a receiver configured to determine a result of the mathematical operation based on an electrical signal produced by the modulatable detector.Type: ApplicationFiled: April 27, 2023Publication date: November 2, 2023Applicant: Lightmatter, Inc.Inventors: Nicholas C. Harris, Darius Bunandar
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Publication number: 20230353252Abstract: Systems and methods for performing signed matrix operations using a linear photonic processor are provided. The linear photonic processor is formed as an array of first amplitude modulators and second amplitude modulators, the first amplitude modulators configured to encode elements of a vector into first optical signals and the second amplitude modulators configured to encode a product between the vector elements and matrix elements into second optical signals. An apparatus may be used to implement a signed value of an output of the linear processor. The linear photonic processor may be configured to perform matrix-vector and/or matrix-matrix operations.Type: ApplicationFiled: April 26, 2023Publication date: November 2, 2023Applicant: Lightmatter, Inc.Inventors: Darius Bunandar, Nicholas C. Harris, Michael Gould, Carl Ramey, Tomo Lazovich
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Publication number: 20230314711Abstract: Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.Type: ApplicationFiled: March 27, 2023Publication date: October 5, 2023Applicant: Lightmatter, Inc.Inventors: Hamid Eslampour, Shashank Gupta, James Carr
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Patent number: 11775779Abstract: Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations.Type: GrantFiled: May 3, 2021Date of Patent: October 3, 2023Assignee: Lightmatter, Inc.Inventors: Tyler J. Kenney, Martin B. Z. Forsythe, Tomo Lazovich, Darius Bunandar
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Publication number: 20230308188Abstract: Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.Type: ApplicationFiled: March 27, 2023Publication date: September 28, 2023Applicant: Lightmatter, Inc.Inventors: Carlos Dorta-Quinones, Ryan Braid, Anthony Kopa, Michael Gould, Nathaniel Bowman, Karl C. Buckenmaier, Joseph Stadolnik, III, Shashank Gupta, James Carr, Nicholas C. Harris, Darius Bunandar
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Patent number: 11768662Abstract: Photonic processors are described. The photonic processors described herein are configured to perform matrix-matrix (e.g., matrix-vector) multiplication. Some embodiments relate to photonic processors arranged according to a dual-rail architecture, in which numeric values are encoded in the difference between a pair optical signals (e.g., in the difference between the powers of the optical signals). Relative to other architectures, these photonic processors exhibit increased immunity to noise. Some embodiments relate to photonic processors including modulatable detector-based multipliers. Modulatable detectors are detectors designed so that the photocurrent can be modulated according to an electrical control signal. Photonic processors designed using modulatable detector-based multipliers are significantly more compact than other types of photonic processors.Type: GrantFiled: February 17, 2023Date of Patent: September 26, 2023Assignee: Lightmatter, Inc.Inventors: Nicholas C. Harris, Darius Bunandar, Michael Gould, Carl Ramey, Shashank Gupta, Carlos Dorta-Quinones
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Publication number: 20230289142Abstract: Photonic processors are described. The photonic processors described herein are configured to perform matrix-matrix (e.g., matrix-vector) multiplication. Some embodiments relate to photonic processors arranged according to a dual-rail architecture, in which numeric values are encoded in the difference between a pair optical signals (e.g., in the difference between the powers of the optical signals). Relative to other architectures, these photonic processors exhibit increased immunity to noise. Some embodiments relate to photonic processors including modulatable detector-based multipliers. Modulatable detectors are detectors designed so that the photocurrent can be modulated according to an electrical control signal. Photonic processors designed using modulatable detector-based multipliers are significantly more compact than other types of photonic processors.Type: ApplicationFiled: February 17, 2023Publication date: September 14, 2023Applicant: Lightmatter, Inc.Inventors: Nicholas C. Harris, Darius Bunandar, Michael Gould, Carl Ramey, Shashank Gupta, Carlos Dorta-Quinones
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Patent number: 11754783Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.Type: GrantFiled: May 6, 2021Date of Patent: September 12, 2023Assignee: Lightmatter, Inc.Inventors: Nicholas C. Harris, Carl Ramey, Michael Gould, Thomas Graham, Darius Bunandar, Ryan Braid, Mykhailo Tymchenko
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Patent number: 11709520Abstract: Systems and methods for performing matrix operations using a path-number balanced optical network are provided. The optical network is formed as an array including active optical components and passive optical components arranged at a substantially central location of the array. The optical network includes at least NM active optical components which are used to implement a first matrix of any size N×M by embedding the first matrix in a second matrix of a larger size. The optical network performs matrix-vector and matrix-matrix operations by propagating one or more pluralities of optical signals corresponding to an input vector through the optical network.Type: GrantFiled: October 21, 2021Date of Patent: July 25, 2023Assignee: Lightmatter, Inc.Inventors: Darius Bunandar, Martin B. Z. Forsythe, Michael Gould, Tomo Lazovich
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Patent number: 11700078Abstract: Systems and methods for increasing throughput of a photonic processor by using photonic degrees of freedom (DOF) are provided. The photonic processor includes a multiplexer configured to multiplex, using at least one photonic DOF, multiple encoded optical signals into a multiplexed optical signal. The photonic processor also includes a detector coupled to an output of an optical path including the multiplexer, the detector being configured to generate a first current based on the multiplexed optical signal or a demultiplexed portion of the multiplexed optical signal. The photonic processor further includes a modulator coupled to and output of the detector, the modulator being configured to generate a second current by modulating the first current.Type: GrantFiled: July 23, 2021Date of Patent: July 11, 2023Assignee: Lightmatter, Inc.Inventors: Darius Bunandar, Michael Gould, Nicholas C. Harris, Carl Ramey
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Patent number: 11695378Abstract: Low-noise optical differential receivers are described. Such differential receivers may include a differential amplifier having first and second inputs and first and second outputs, and four photodetectors. A first and a second of such photodetectors are coupled to the first input of the differential amplifier, and a third and a fourth of such photodetectors are coupled to the second input of the differential amplifier. The anode of the first photodetector and the cathode of the second photodetector are coupled to the first input of the differential amplifier. The cathode of the third photodetector and the anode of the fourth photodetector are coupled to the second input of the differential amplifier. The optical receiver may involve two stages of signal subtraction, which may significantly increase noise immunity.Type: GrantFiled: October 26, 2021Date of Patent: July 4, 2023Assignee: Lightmatter, Inc.Inventors: Nicholas C. Harris, Michael Gould, Omer Ozgur Yildirim
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Patent number: 11686902Abstract: Methods and apparatus for tuning a photonics-based component. An opto-electrical detector is configured to output an electrical signal based on a measurement of light intensity of the photonics-based component, the light intensity being proportional to an amount of detuning of the photonics-based component. Analog-to-digital conversion (ADC) circuitry is configured to output a digital signal based on the electrical signal output from the opto-electrical detector. Feedback control circuitry is configured to tune the photonics-based component based, at least in part, on the digital signal output from the ADC circuitry.Type: GrantFiled: June 17, 2022Date of Patent: June 27, 2023Assignee: Lightmatter, Inc.Inventors: Carlos Dorta-Quinones, Carl Ramey, Omer Ozgur Yildirim, Chithira Ravi, Shashank Gupta, Nicholas C. Harris
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Publication number: 20230177284Abstract: Described herein are techniques of using a hybrid analog-digital processor to perform matrix operations. The hybrid analog-digital may store digital values in memory encoded in a low bit number format. The hybrid analog-digital processor may perform, using an analog processor, a matrix operation to obtain output(s). The output(s) may be encoded in the number format. The hybrid analog-digital processor may determine, using the output(s), an unbiased estimate of a matrix operation result. The hybrid analog-digital processor may store, in the memory, the unbiased estimate of the matrix operation result encoded in the number format.Type: ApplicationFiled: December 7, 2022Publication date: June 8, 2023Applicant: Lightmatter, Inc.Inventors: Darius Bunandar, Calvin McCarter, Ayon Basumallik
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Patent number: 11671182Abstract: Systems and methods for performing signed matrix operations using a linear photonic processor are provided. The linear photonic processor is formed as an array of first amplitude modulators and second amplitude modulators, the first amplitude modulators configured to encode elements of a vector into first optical signals and the second amplitude modulators configured to encode a product between the vector elements and matrix elements into second optical signals. An apparatus may be used to implement a signed value of an output of the linear processor. The linear photonic processor may be configured to perform matrix-vector and/or matrix-matrix operations.Type: GrantFiled: June 14, 2022Date of Patent: June 6, 2023Assignee: Lightmatter, Inc.Inventors: Darius Bunandar, Nicholas C. Harris, Michael Gould, Carl Ramey, Tomo Lazovich
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Publication number: 20230111197Abstract: Aspects relate to a photonic processing system, an integrated circuit, and a method of operating an integrated circuit to control components to modulate optical signals. A photonic processing system, comprising: a photonic integrated circuit comprising: a first electrically-controllable photonic component electrically coupling an input pin to a first output pin; and a second electrically-controllable photonic component electrically coupling the input pin to a second output pin.Type: ApplicationFiled: October 17, 2022Publication date: April 13, 2023Applicant: Lightmatter, Inc.Inventors: Carl Ramey, Darius Bunandar, Nicholas C. Harris
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Publication number: 20230114842Abstract: Described herein are photonic communication platforms that permit use by multiple users in a secure way. A platform comprises a substrate, a first photonic circuit monolithically integrated with the substrate, and a second photonic circuit monolithically integrated with the substrate. The first photonic circuit is patterned with a first plurality of photonic modules, the photonic modules of the first plurality being copies of a common template photonic module The second photonic circuit is patterned with a second plurality of photonic modules, the photonic modules of the second plurality being copies of the common template photonic module. A photonic link couples the first photonic circuit to the second photonic circuit. A controller optically isolates the first photonic circuit from the second photonic circuit by optically interrupting the photonic link.Type: ApplicationFiled: October 12, 2022Publication date: April 13, 2023Applicant: Lightmatter, Inc.Inventors: Nicholas C. Harris, Robert Turner
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Publication number: 20230114847Abstract: Described herein are photonic communication platforms that can overcome the memory bottleneck problem, thereby enabling scaling of memory capacity and bandwidth well beyond what is possible with conventional computing systems. Some embodiments provide photonic communication platforms that involve use of photonic modules. Each photonic module includes programmable photonic circuits for placing the module in optical communication with other modules based on the needs of a particular application. The architecture developed by the inventors relies on the use of common photomask sets (or at least one common photomask) to fabricate multiple photonic modules in a single wafer. Photonic modules in multiple wafers can be linked together into a communication platform using optical or electronic means.Type: ApplicationFiled: November 29, 2022Publication date: April 13, 2023Applicant: Lightmatter, Inc.Inventors: Nicholas C. Harris, Carl Ramey, Michael Gould, Thomas Graham, Darius Bunandar, Ryan Braid, Mykhailo Tymchenko
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Publication number: 20230110047Abstract: Described herein are techniques of using a hybrid analog-digital processor to optimize parameters of a system for an objective under one or more constraints. The techniques involve using the hybrid analog-digital processor to optimizing parameter values of the system. The optimizing comprises: determining, using an analog processor of the hybrid analog-digital processor, a parameter gradient for parameter values of the system based on the objective function and the at least one constraint; and updating the parameter values of the system using the parameter gradient.Type: ApplicationFiled: October 12, 2022Publication date: April 13, 2023Applicant: Lightmatter, Inc.Inventor: Darius Bunandar