Abstract: Data processing systems, circuits and methods are disclosed. As one example, a data processing system is disclosed that includes: a buffer circuit, a data processing circuit, and an erasure window set circuit. The buffer circuit is operable to store a data set as a buffered data set, and the data processing circuit is operable to repeatedly apply a data processing algorithm to the buffered data set. The erasure window set circuit is operable to define a location of the erasure window in relation to the buffered data set.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for modifying symbols in a data set prior to re-processing.

Abstract: Systems and method relating generally to data processing, and more particularly to systems and methods for utilizing multiple data streams for data recovery from a storage device.

Abstract: A method for enhancing read performance in a multi-reader two-dimensional magnetic recording system comprising first and second readers includes: receiving first and second analog read signals from the first and second readers, respectively; sampling the first and second analog read signals to generate first and second sampled signals, respectively, each of the first and second sampled signals comprising an integer component, indicative of a value of a corresponding one of the first and second analog read signals, respectively, at an integer multiple of a corresponding sampling period associated therewith, and/or a fractional component, indicative of a value of the corresponding one of the first and second analog read signals, respectively, at an arbitrary point in time between integer multiples of the corresponding sampling period; and combining the integer and/or fractional components of the respective first and second sampled signals to thereby generate a reader offset estimation signal.

Abstract: A clock and data recovery device includes a phase detector, a quantizer, and a loop filter. The phase detector produces a phase error samples at an output representing a phase difference between a phase-adjusted clock and an input data signal. The quantizer, coupled to the output of the phase detector and responsive to high threshold and low threshold values, produces a tri-valued quantized phase error samples at an output. The loop filter filters either the quantized phase error samples or the phase error samples to control the phase-controlled clock. A frequency detector, determining the frequency of jitter present in the input data signal, addresses a look-up table to provide the jitter-frequency dependent high and low threshold values and to control which phase error samples is processed by the loop filter. The frequency detector determines the jitter frequency by taking the ratio of peak values of low pass-filtered phase error samples.

Abstract: Mis-programming of MSB data in flash memory is prevented by using ECC decoding logic on the flash die that error corrects the LSB values prior to the LSB values being used in conjunction with the MSB values to determine the proper reference voltage ranges. Error correcting the LSB page data prior to using it in combination with the MSB page data to determine the reference voltage ranges ensures that the reference voltage ranges will be properly determined and programmed into the flash cells.

Abstract: An anonymous non-emergency help system matches capabilities of potential helpers to a requestor's needs. Helpers identify the type of assistance they are willing to provide and then agree to become available anonymously. The helpers are contacted sequentially for assistance based on proximity to the requestor. The nearest helper may choose to respond or decline the request. This anonymous location process occurs sequentially, awaiting a requestor-defined timeout, until one of the identified individuals agrees to fulfill the request or until there are no other proximate individuals that meet the specific request criteria. A call for help is not broadcast, but helpers are chosen based on their disclosed skills/capabilities, attributes, and their proximity to the requestor. The attributes are related to at least one of speed and trajectory relative to the requestor, time the helper is in a particular location, and altitude difference between the requestor and the helper.

Abstract: An apparatus includes a memory and a controller. The memory includes a plurality of memory devices. Each memory device has a plurality of page types. The plurality of page types are classified based on error rate variations. The controller may be configured to write user data and error-correction data to the memory. The user data and the error-correction data are organized as a super-page. The super-page includes a plurality of sub-pages. The plurality of sub-pages are written across the plurality of memory devices such that the plurality of sub-pages are stored using more than one of the plurality of page types.

Abstract: An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache may comprise one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. The controller is connected to the memory and configured to (A) process normal read/write operations in a first mode and (B) process special read/write operations in a second mode by (i) tracking a write followed by read condition on each of said cache windows and (ii) discarding data on the cache-lines associated with the cache windows after completion of the write followed by a read condition on the cache-lines.

Abstract: A data processing system includes a binary data detector having a hard decision output, a reliability calculator operable to calculate an error pattern reliability metric for each of a number of dominant error patterns associated with the hard decision output, and a converter operable to convert the error pattern reliability metrics to multi-level soft information.

Abstract: A servo system includes an equalizer circuit operable to filter digital servo data samples according to filter tap coefficients to yield equalized data, a detector circuit operable to apply a data detection algorithm to the equalized data to yield hard decisions, a convolution circuit operable to yield ideal digital data based on the hard decisions and on target values, a subtraction circuit operable to subtract the ideal digital data from the equalized data to yield an adaptation error signal, an error gradient calculator operable calculate an error gradient signal based at least in part on the adaptation error signal, and a tap adaptation circuit operable to calculate values of the filter tap coefficients based on the error gradient signal.

Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for synchronizing operations in a data storage system.

Abstract: An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache comprises one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. Each of the cache-lines comprises a plurality of sub-cache lines. Each of the plurality of cache-lines and each of the plurality of sub-cache lines is associated with meta-data indicating one or more of a dirty state and an invalid state. The controller is connected to the memory and configured to (i) recognize sub-cache line boundaries and (ii) process the I/O requests in multiples of a size of said sub-cache lines to minimize cache-fills.

Abstract: Systems, methods, devices, circuits for data processing, and more particularly to data processing including adjacent track interference detection and/or characterization.

Abstract: A method of reading data in a multi-reader two-dimensional magnetic recording system includes determining a position of a multi-reader head, selecting a mode for reading the data of a magnetic recording medium as a function of the position of the multi-reader head, and reading the data of the magnetic recording medium in the selected mode.

Abstract: The present inventions are related to systems and methods for iterative data processing scheduling. In one case a data processing system is disclosed that includes a data detector circuit and a data decoder circuit. The data detector circuit is operable to apply a data detection algorithm to a data set to yield a detected output. The data decoder circuit is operable to repeatedly apply a data decoding algorithm to the detected output to yield a decoded output over a number of passes, where the number of passes is within an allowable number of local iterations selected based at least in part on a read gate signal.

Abstract: Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability.

Abstract: Disclosed is a system and method for using a programmable sequencer to produce a required command for a particular standard, or format, being used by the PCIe disk drive. A PCIe disk drive may support a different standard, or format. A mix of any number of different standards, or formats, is permitted in the system and method. For each message, a different set of instructions can be selected for the conversion process.

Abstract: The disclosure is directed to illumination-based charging of one or more portable devices. According to an embodiment of the disclosure, an illumination-based charging pad includes a platform, a plurality of illumination sources, a plurality of photosensitive detectors, and a controller. The controller performs a scan by activating the illumination sources and detecting reflected illumination from an illuminated surface of at least one portable device disposed upon the platform. The controller determines a set of one or more illumination sources that are at least partially overlaid by the portable device based upon the detected illumination. The controller selects one or more illumination sources for charging the portable device at least partially based upon the set of one or more illumination sources determined to be overlaid by the portable device.

Abstract: An apparatus comprising a decision circuit, a detector circuit and a processing circuit. The decision circuit may be configured to generate a confirmation signal in response to a first lock signal and a second lock signal. The detector circuit may be configured to generate the first lock signal in response to a filtered version of an input signal being above a threshold. The processing circuit may be configured to generate the second lock signal in response to a power signal received from the detector circuit. The processing circuit generates the second lock signal by analyzing the rising edge of a frequency power envelope of the power signal.