Abstract: A diagnosis system for monitoring a status of a switchboard is provided. The diagnosis system for monitoring a status of a switchboard includes a sensor unit installed in a switchboard, wherein the sensor unit comprise a plurality of sensors sensing two or more of a partial discharge (PD) signal, a temperature signal and an acc signal and outputting each switchboard status sensing signal; a data collecting device receiving each switchboard status sensing signal corresponding to two or more of the PD signal, the temperature signal, and the arc signal from the sensor unit wherein the data collecting device collects a plurality of datums for status monitoring and diagnosis control of the switchboard based on each switchboard status sensing signal received; and a remote monitoring device performing the status monitoring and diagnosis control of the switchboard based on a plurality of measuring datums received from the data collecting device.

Abstract: Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for determining a down track distance between two or more read heads on a read/write head assembly.

Abstract: A surgical device has first and second clamp jaws, at least one of which is pivotable relative to the other. The surgical device also has first and second locking suture guides configured to receive at least one locking suture for knotting to hold the first and second clamp jaws in a clamped position.

Abstract: A security apparatus for an energy storage system is provided. The security apparatus includes a sensor input unit receiving security state information including door opening and closing and locking/unlocking from a door opening and closing sensor and a locking/unlocking sensor; a human machine interface (HMI) unit receiving information from a user or showing the information to the user; and a security state machine allowing manipulation of the energy storage system depending on whether security state information obtained through the sensor input unit satisfies a security state condition having a plurality of procedures in order.

Abstract: Described embodiments provide for, in a clock and data recovery (CDR) circuit, detection of loss of acquisition and CDR restarting with corrective integral accumulator register seeding and gearshift restarting. In described embodiments, a mechanism is employed to cause faster loss of lock condition if the CDR circuit directed on an incorrect acquisition trajectory, actual loss of CDR lock is then detected, and CDR acquisition is recovered with corrective integral accumulator seeding.

Abstract: The present disclosure relates to a system for setting offset and gain of an analog input module, the system configured to set the offset and gain of the analog input module by outputting an offset value and a gain value to the analog module, using the analog module formed with a plurality of channels. The system includes a control unit configured to output a control signal for outputting the offset value and the gain value, a setting value providing unit configured to output a setting signal by the control signal from the control unit, wherein the setting signal is in a form of a pulse including the offset value and the gain value, and relay unit configured to be switched for applying the setting signal to the analog input module by the control signal from the control unit.

Abstract: A mover assembly of a circuit breaker is provided. A mover assembly of a circuit breaker according to one aspect includes: a terminal fixed within a circuit breaker; a connector coupled to the terminal; a plurality of movers rotatably installed in the connector; and an elastic member applying elastic force to the movers to tightly attach the movers to the connector, wherein each of the movers includes a first mover and a second mover and the elastic member is positioned between the first mover and the second mover.

Abstract: Disclosed are an apparatus and a method for providing an image to provide real-time image data photographed by an image photographing apparatus. The apparatus includes a real-time image data receiving unit to receive the real-time image data; a real-time image data filtering unit to image-process the real-time image data; a real-time image data storing unit to store the real-time image data of a specific section from among the image-processed real-time image data; and a display unit to display the real-time image data.

Abstract: There is provided a mechanically operated cell (MOC) switch of a vacuum circuit breaker, which is uniformly operated regardless of an insertion stroke of a push rod that operates a MOC switch of a vacuum circuit breaker. The MOC switch outputting an ON/OFF state of a vacuum circuit breaker when the vacuum circuit breaker operates includes: a main bracket; a rotational shaft installed in the main bracket; a connection lever rotatably coupled to the rotational shaft and having one end connected to an auxiliary switch; a roller coupled to the other end of the connection lever; and a horizontal moving unit installed in a portion of the to main bracket and making a horizontal movement to rotate the roller and allowing the other end of the connection lever to make an ascending and descending movement.

Abstract: A phase shift transformer in a multi-level medium voltage inverter is disclosed, wherein structure is modularized to provide layout freedom and to reduce volume and weight of an entire system, and a continuous operation of a motor is enabled, even if one module is faulted.

Abstract: Systems and methods for magnetoresistive asymmetry estimation may include, but are not limited to, operations for: receiving a magnetic read head transducer output; computing a mean value of the magnetic read head transducer output; computing a median value of the magnetic read head transducer output; and applying a correction coefficient to a magnetic read head detector input according to at least the mean value of the magnetic read head transducer output and the median value of the magnetic read head transducer output.

Abstract: An N-way parallel, unrolled decision feedback equalizer for a SerDes receiver can convert between four-tap PAM-2 and two-tap PAM-4 mode, maximizing hardware through the use of mode control multiplexers. Each of N interleaved parallel branches includes an ISI correction stage for generating a partial result approximating intersymbol interference and comparing the partial result to a threshold, a carry look-ahead stage for generating a second partial result based in part on previously generated partial results, and a decision feedback stage for generating a final decision based on previous branches. Mode control multiplexers can select from PAM-2 and PAM-4 operating modes, PAM-2 and MAP-4 inputs at various stages, or from single-bit PAM-2 and two-bit PAM-4 outputs. ISI correction can additionally be reformulated to incorporate comparing raw input symbols to a combination of approximated ISI and a threshold.

Abstract: SRAM devices are disclosed that utilize write assist circuits to improve the logical transitions of bit lines. In one embodiment, an SRAM device includes a pair of complimentary bit lines traversing a memory cell array for writing data to memory cells. The bit lines have a first end and a second end. A pair of complimentary write drivers is proximate to the first end of the bit lines that writes to the bit lines. A write assist circuit is proximate to the second end of the bit lines that receives a pre-charge signal to assist the write drivers in transitioning the bit lines from a logical zero state to a logical one state. The write assist circuit also receives a boost signal to assist the write drivers in transitioning the bit lines from a logical one state to a logical zero state.

Abstract: Described embodiments provide for de-coupling between adaptation of decision feedback equalizer (DFE) filter taps and transmitter (TX) post cursor filtering in group delay (GD)-based adaptation. Consequently, an excessive build-up of transmitter post cursor effects and its excessive equalization cancellation by the DFE may be substantially reduced or eliminated. By breaking this coupling, a transmitter does not over equalize a signal, the DFE does not attempt to “undo” the over equalization, and a variable gain amplifier (VGA) in the receiver front end data path generally does not apply gain to amplify the signal back again due to the reduced DC level. GD-based TX post cursor adaptation may reduce over equalization effect and hence save power and increase performance by not over equalizing the signal.

Abstract: An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) read a plurality of bits in a read channel of the nonvolatile memory. The bits are encoded with a polar code. The circuit is also configured to (ii) generate a plurality of probabilities based on a plurality of log likelihood ratio values of the read channel and (iii) decode the bits based on the probabilities.

Abstract: Systems and methods for resource allocation for a large sector format processing may include, but are not limited to, operations for: determining non-convergence of a magnetic disc sub-sector of a first magnetic disc sector within a processing time frame allocated to the magnetic disc sub-sector; determining a convergence of a second magnetic disc sector occurring in less time than a processing time frame allocated to the second magnetic disc sector; and processing the magnetic disc sub-sector during a portion of the processing time frame allocated to the second magnetic disc sector remaining after processing of the second magnetic disc sector.

Abstract: A method of mitigating an effect of track misregistration on read performance in a system comprising an array-reader includes determining an estimated off-track condition, selecting translation coefficients based on the estimated off-track condition, determining updated equalizer coefficients by applying the translation coefficients to native equalizer coefficients, and applying the updated equalizer coefficients to signals received from the array-reader to output a read signal.

Abstract: A luminaire comprising a reflector having first and second outer edges and defining a downwardly open recess, the reflector defining a downwardly depending peak dividing the downwardly open recess into two troughs; a light source located at each of the first and second outer edges and configured to emit light into the downwardly open recess.

Abstract: A non-binary layered low density parity check decoder includes a variable node processor operable to generate variable node to check node messages and to calculate perceived values based on normalized check node to variable node messages and on normalized decoder inputs, and to output normalized decoded values, and a check node processor operable to generate the check node to variable node messages based on normalized variable node to check node messages.

Abstract: An airfield lighting system is provided, the system including a constant current regulator configured to output a constant current, a plurality of insulating transformers configured to be electrically connected to the constant current regulator to supply an electric power, and a plurality of individual lighting devices each electrically connected to the insulating transformer to turn on or turn off an LED lamp, wherein the individual lighting apparatus includes an LED unit including an ADC (AC-DC Converter) and at least one LED lamp connected to a secondary side of the ADC and transmitting defect information of the LED lamp, and a defect information receiver configured to measure a current and a voltage at a primary side of the ADC, measure an electric energy (electricity) or a resistance value using the measured current and voltage, and generate status information of the LED unit.