Abstract: A foundation forming arrangement is provided for forming a foundation slab. The foundation forming arrangement includes at least one side forming member for forming a side of the foundation slab. The foundation forming arrangement further includes at least one connector that is configured for coupling the side forming members to either a reinforcing steelwork or a forming pod. The foundation forming arrangement can further include a drain, as well as an insulative panel. The foundation forming arrangement can include a forming pod that is configured for connection to the side forming members. The foundation forming arrangement can include securing arrangements for securing the connectors to the top or the base of a forming pod.

Abstract: A docking arrangement (10) for coupling an outlet (16) of a container (12) to an inlet (18) for a component of an additive manufacturing process. The docking arrangement (10) includes a dock (11) configured to receive the container (12) and a gas supply (35) associated with the dock (11). A gas coupler (38a, 38b) is provided and is configured, in use, to couple the gas supply (35) with a gas inlet (32) associated with the container (12) when the container (12) is received within the dock (11).

Abstract: Malfunctions of a circuit is prevented and the reliability of a semiconductor device using the circuit is improved. The semiconductor device includes a first transistor, a second transistor, a load, and a wiring having a function of supplying a power supply potential to the load. A semiconductor layer of the first transistor includes an oxide semiconductor. A semiconductor layer of the second transistor includes an oxide semiconductor. A source and a drain of the first transistor are electrically connected to the wiring. A first gate of the first transistor is supplied with a reference potential. A source and a drain of the second transistor are supplied with the reference potential. A first gate of the second transistor is electrically connected to the wiring. The semiconductor layer of the first transistor includes a region overlapping with the wiring. The semiconductor layer of the second transistor includes a region overlapping with the wiring.

Abstract: A high frequency circuit includes a main module and a diversity module. The main module includes a duplexer that transmits and receives a signal of a first communication band of a first communication system. The diversity module includes a duplexer that transmits and receives a signal of a second communication band of a second communication system, a reception filter that uses a reception band of the first communication band of the first communication system as a pass band, a power amplifier, a low noise amplifier, and a switch that exclusively switches between connection between a reception filter and the low noise amplifier and connection between the reception filter and the low noise amplifier. The first communication band and the second communication band have the same frequency band.

Abstract: A display panel includes a first display area. The first display area includes a display substrate and an optical layer. The display substrate includes a pixel defining layer and a cathode layer disposed on the pixel defining layer. The pixel defining layer includes a plurality of pixel openings and a plurality of supporting portions each disposed between two adjacent pixel openings. A thickness of a part of the cathode layer on each of the pixel opening is greater than a thickness of a part of the cathode layer on each of the supporting portions. The optical layer is disposed on the cathode layer and includes a plurality of first optical structures corresponding to the supporting portions. Each of the first optical structures includes a first surface close to the cathode layer, a second surface opposite to the first surface, and a side surface that is a total reflective surface.

Abstract: A display panel is provided. The display panel includes a plurality of light emitting elements; and an interconnected first voltage supply network configured to provide a first voltage signal to cathodes of the plurality of light emitting elements. The interconnected first voltage supply network includes signal lines in a display area of the display panel, the display area being at least partially surrounded by a peripheral area. The signal lines include a plurality of first signal lines in a fast signal line layer and a plurality of second signal lines in a second signal line layer. The display panel further includes a planarization layer between the first signal line layer and the second signal line layer. The plurality of first signal lines are electrically connected to the plurality of second signal lines.