Abstract: An illuminated keyswitch structure includes a base plate, a keycap, and a light-emitting die package. The light-emitting die package is disposed to illuminate the keycap through the base plate. The light-emitting die package comprises a warm color temperature light-emitting die and a cold color temperature light-emitting die, and the light-emitting die package extends along an arrangement direction. Each of the two light-emitting dies has a short side arranged adjacent to each other, with a long side of each of the two light-emitting dies facing a same direction and configured proximate to each other. A gap between the two adjacent short sides of the two light-emitting dies is not greater than either one of the two adjacent short sides of the two light-emitting dies.

Abstract: Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.

Abstract: Embodiments provide a data encoding method, a data decoding method, and a related device. The method includes a transmitting end device that determines N data symbols at a same symbol location of N links of service data, where N is an integer greater than 1, and quantities of bits in all data symbols are the same. The transmitting end device performs forward error correction (FEC) encoding on the N data symbols to obtain a codeword, where the codeword includes the N data symbols and M overhead symbols, M is an integer greater than or equal to 1 and less than or equal to N, and a quantity of bits in each data symbol is the same as a quantity of bits in each overhead symbol. The transmitting end device sends the N data symbols through N service channels, and sends the M overhead symbols through M overhead channels.

Abstract: A display panel includes a base substrate, a first transistor and a second transistor. The first transistor and the second transistor are formed on the base substrate. The first transistor includes a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The first active layer includes silicon. The second transistor includes a second active layer, a second gate electrode, a second source electrode, and a second drain electrode. The second active layer includes an oxide semiconductor. A length of a channel region of the first transistor is L1. Along a direction perpendicular to the base substrate, a distance between the first gate electrode and the first active layer is D1. The first transistor further includes a third gate electrode. Along the direction perpendicular to the base substrate, a distance between the third gate electrode and the first active layer is D3, and D1<D3.

Abstract: A variable circuit includes a switch including a plurality of input terminals and a plurality of output terminals and an external wiring line. The multiple input terminals include a first input terminal to which a first input signal is inputted and a second input terminal to which a second input signal is inputted. The multiple output terminals include a first output terminal from which a first output signal is outputted and a second output terminal from which a second output signal is outputted. The switch is capable of forming at least one internal connection path electrically connecting any one of the multiple input terminals and any one of the multiple output terminals. The external wiring line is disposed outside the switch and is configured to electrically connect the second output terminal to the second input terminal.

Abstract: A high-speed connector includes an insulating housing, a first terminal assembly received in the insulating housing, a second terminal assembly received in the insulating housing, a third terminal assembly received in the insulating housing, and a fourth terminal assembly received in the insulating housing. The second terminal assembly is opposite to the first terminal assembly along an up-down direction. The third terminal assembly is disposed between the first terminal assembly and the second terminal assembly. The fourth terminal assembly is corresponding to the third terminal assembly. The fourth terminal assembly is disposed between the second terminal assembly and the third terminal assembly.

Abstract: The present disclosure refers to direct current-to-direct current (DC-DC) converters and power supplies including the same. In an embodiment, a DC-DC converter includes a first switching circuit, a second switching circuit, a fourth capacitor coupled to a second node, and an inductor-capacitor (LC) filter coupled to a third node. The first switching circuit includes a first transistor coupled between a first capacitor and an input node, a second transistor coupled between the first capacitor and a second capacitor, a third transistor coupled between a first node and a third capacitor, and a fourth transistor coupled between the third capacitor and a ground node. The second switching circuit includes a fifth transistor coupled between the second capacitor and the third capacitor, a sixth transistor and a seventh transistor coupled between the first capacitor and the third capacitor, and an eighth transistor coupled between the first capacitor and the ground node.

Abstract: The present invention relates to a mobile terminal and a cosmetics automatic recognition system capable of recognizing cosmetics located nearby and recommending a make-up method using the recognized cosmetics. The present invention may comprise a mobile terminal including: an RFID reader unit configured to recognize cosmetics through an RFID tag attached to a cosmetic and receive cosmetic information from the recognized RFID tag and from cosmetics having an RFID tag which stores cosmetic information attached thereto; a control unit configured to generate a cosmetics list consisting of at least one cosmetic recognized by the RFID reader unit; and a display unit configured to display the cosmetics list.

Abstract: Disclosed are an application module startup method and an electronic device. When a first device needs to start an application module that is not installed and that is in an application on the first device or another device that is communicatively connected to the first device, a system module on the first device may query whether the application module is installed on the first device. When it is determined that the application module is not installed on the first device and/or another device, the system module on the first device may communicate with a first server, so that the system module on the first device may download, install, and start a first application module on the first device and/or another device based on a message sent from the first server.

Abstract: A display device includes pixels which displays an image based on image data, a driving voltage generator which provides a driving voltage to each of the pixels, and a driving voltage controller which calculates block pixel numbers corresponding to first to nth grayscale blocks based on the image data, calculates maximum grayscales with respect to the first to nth grayscale blocks based on the image data, determines a maximum grayscale block among the first to nth grayscale blocks by comparing the block pixel numbers to minimum pixel numbers corresponding to the first to nth grayscale blocks, determines a maximum grayscale with respect to the maximum grayscale block based on the maximum grayscales, calculates a load of the image data, calculates a voltage drop amount of the driving voltage based on the load, and calculates a magnitude of the driving voltage based on the maximum grayscale and the voltage drop amount.

Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.

Abstract: In a method of manufacturing a semiconductor device, the semiconductor device includes a non-volatile memory formed in a memory cell area and a ring structure area surrounding the memory cell area. In the method, a protrusion of a substrate is formed in the ring structure area. The protrusion protrudes from an isolation insulating layer. A high-k dielectric film is formed, thereby covering the protrusion and the isolation insulating layer. A poly silicon film is formed over the high-k dielectric film. The poly silicon film and the high-k dielectric film are patterned. Insulating layers are formed over the patterned poly silicon film and high-k dielectric film, thereby sealing the patterned high-k dielectric film.

Abstract: According to various embodiments, an electronic device comprises: at least one processor; and memory operatively connected to the at least one processor, wherein the memory may store instructions which, when executed by the at least one processor, cause the electronic device to: obtain, from a kernel, at least one address for a first memory area accessible through the kernel; store the at least one address in a second memory area accessible through a hypervisor; based on obtaining an address stored in a kernel stack from the kernel, identify whether the obtained address is defective, on the basis of the at least one stored address; and restore the defective address using at least one address stored in the second memory area in response to identifying the defect in the address.

Abstract: A method for decoding image content from an encoded bitstream including a plurality of blocks includes: dividing a block including one or more components of the image content into N single samples and M sample groups corresponding to one of the components, where N and M are greater than or equal to one; decoding each of the N single samples using a symbol variable length code to generate one or more decoded single samples; decoding each of the M sample groups using a common prefix entropy code to generate one or more decoded sample groups, each of the M sample groups including a variable length prefix and one or more fixed length suffixes representing a plurality of samples; concatenating the decoded single samples and the decoded sample groups into a block of residuals; and reconstructing image content based on previously reconstructed neighboring blocks and the block of residuals.