Abstract: A method for indicating antenna panel information of a terminal, a network side device, and a terminal are provided. The indication method applied to a network side device includes: sending configuration information of a first SRS resource set to a terminal, where the configuration information includes an identifier of the first SRS resource set, and the identifier of the first SRS resource set is used to indicate an identifier of an antenna panel of the terminal.
Abstract: A video coding mechanism is disclosed. The mechanism includes receiving a bitstream comprising a picture parameter set (PPS) in a PPS network abstraction layer (NAL) unit and a coded picture comprising a set of video coding layer (VCL) NAL units. A particular VCL NAL unit does not refer to the PPS NAL unit unless a value of a NAL unit header layer identifier (nuh_layer_id) of the PPS NAL unit is less than or equal to a value of a nuh_layer_id of the particular VCL NAL unit. The coded picture is decoded from the set of VCL NAL units based on the PPS in the PPS NAL unit to produce a decoded picture. The decoded picture is forwarded for display as part of a decoded video sequence.
Abstract: A semiconductor device includes an active region extending on a substrate in a first direction, a gate structure including a gate electrode extending on the substrate in a second direction and traversing the active region, a spacer structure extending on opposing sidewalls of the gate electrode in the second direction, and a capping layer on the gate electrode and the spacer structure, a source/drain region on the active region adjacent the gate structure, and a first contact plug connected to the source/drain region and a second contact plug connected to the gate structure. The capping layer includes a lower capping layer and an upper capping layer on the lower capping layer, and the second contact plug penetrates through the capping layer, is connected to the gate electrode and includes a convex sidewall penetrating into the upper capping layer.
Abstract: A ceramic electronic device includes a multilayer chip in which internal electrode layers are alternately stacked with dielectric layers, respectively, and are exposed alternately at a first surface and a second surface of the multilayer chip, wherein, in a capacity section in which the internal electrode layers exposed at the first and second surface overlap each other as viewed in the stacking direction, the dielectric layers are at least three dielectric layers, each dielectric layer including Sn, wherein a dielectric layer having a smaller Sn concentration is closer to an outermost end in the stacking direction than is a dielectric layer having a larger Sn concentration which is located at a center area in the stacking direction, in a relationship of at least two of the at least three dielectric layers in the capacity section.
Abstract: An interface device and a signal transceiving method thereof are provided. The interface device includes a slave circuit and a master circuit. The slave circuit is coupled to the master circuit and includes a first programmable delay line, a first output clock generator, and a first phase detector. The first programmable delay line provides a first adjusting delay amount according to a first adjust signal, and generates a first delayed clock signal by delaying a first clock signal according to the first adjusting delay amount. The first output clock generator generates a second clock signal according to the first delayed clock signal. The first phase detector detects a phase difference of the first clock signal and the second clock signal to generate first phase lead or lag information. The first adjust signal is generated according to the first phase lead or lag information.
Type:
Grant
Filed:
August 31, 2022
Date of Patent:
April 22, 2025
Assignees:
Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
Inventors:
Bi-Yang Li, Igor Elkanovich, Hung-Yi Chang, Shih-Cheng Kao
Abstract: The present disclosure provides a hearing protection method capable of blocking external high-sound-pressure-level energy, including: a second sound pressure energy threshold being greater than a first sound pressure energy threshold; when an external sound energy value is greater than the first sound pressure energy threshold and is less than the second sound pressure energy threshold, enabling a preset active noise cancellation function; and when the external sound energy value is greater than the second sound pressure energy threshold, disabling the preset active noise cancellation function, and blocking high-sound-pressure-level energy by means of passive noise cancellation. The present disclosure can block the external high-sound-pressure-level energy.
Abstract: The present disclosure discloses a data processing method and system, an apparatus, and a computer-readable storage medium, which relate to the field of storage. The data processing method includes determining a root port of a peripheral component interconnect express (PCIe) switch X (PSX) based on a connection topology of a PCIe; controlling a central processing unit (CPU) corresponding to the root port to monitor a read state of memory-mapped remote procedure calls (MRPC) data using a completion timeout mechanism; and in response to the read state being a timeout state, discarding read MRPC data.
Abstract: A method of programming a memory device. The memory device includes a plurality of memory strings, each memory string including a top transistor controlled by a top select gate (TSG) and connected to a bit line (BL), a bottom transistor controlled by a bottom select gate (BSG), and memory cells between the top and bottom transistors, each memory cell connected to a word line (WL). The method includes applying program pulses to a memory cell of the memory device in a program phase, verifying a voltage value of the memory cell in a verify phase, receiving a suspend command and performing a suspend operation, applying a discharge pulse to the memory cell in a discharge phase to thereby discharge the memory cell, wherein the discharge pulse includes a voltage pulse to an unselected top select gate (TSGunsel), and suspending programming or verifying of the memory cell in a suspend phase.
Type:
Grant
Filed:
December 28, 2022
Date of Patent:
April 22, 2025
Assignee:
Yangtze Memory Technologies Co., Ltd.
Inventors:
ZhiChao Du, Yu Wang, Weijun Wan, Ke Jiang
Abstract: Provided is an electronic pen including a tubular housing having an opening at one end, a core body portion including a rod-shaped core body and a pressure member that holds a rear end of the core body and transmits a force applied to the core body, a writing pressure detector that detects a writing pressure applied to the core body, and a tubular holding member that accommodates and holds the core body portion. At least part of a side surface of the core body portion includes a flat surface portion parallel to an axial direction of the pen. An inner edge of the holding member has a cylindrical shape and at least part of the inner edge includes a protruding portion. With the core body portion mounted in the housing, the flat surface portion of the core body portion and the protruding portion of the holding member face each other.